1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 7dd84058dSMasahiro Yamadachoice 865c4ac0aSBin Meng prompt "Mainboard vendor" 999a309f3SBin Meng default VENDOR_EMULATION 10dd84058dSMasahiro Yamada 11*215099a5SGeorge McCollisterconfig VENDOR_ADVANTECH 12*215099a5SGeorge McCollister bool "advantech" 13*215099a5SGeorge McCollister 1482ceba2cSStefan Roeseconfig VENDOR_CONGATEC 1582ceba2cSStefan Roese bool "congatec" 1682ceba2cSStefan Roese 1765c4ac0aSBin Mengconfig VENDOR_COREBOOT 1865c4ac0aSBin Meng bool "coreboot" 198ef07571SSimon Glass 203dcdd17bSBen Stoltzconfig VENDOR_EFI 213dcdd17bSBen Stoltz bool "efi" 223dcdd17bSBen Stoltz 23a65b25d1SBin Mengconfig VENDOR_EMULATION 24a65b25d1SBin Meng bool "emulation" 25a65b25d1SBin Meng 2665c4ac0aSBin Mengconfig VENDOR_GOOGLE 2765c4ac0aSBin Meng bool "Google" 28dd84058dSMasahiro Yamada 2965c4ac0aSBin Mengconfig VENDOR_INTEL 3065c4ac0aSBin Meng bool "Intel" 31ef46bea0SBin Meng 32dd84058dSMasahiro Yamadaendchoice 33dd84058dSMasahiro Yamada 3465c4ac0aSBin Meng# board-specific options below 35*215099a5SGeorge McCollistersource "board/advantech/Kconfig" 3682ceba2cSStefan Roesesource "board/congatec/Kconfig" 3765c4ac0aSBin Mengsource "board/coreboot/Kconfig" 383e9aa320SBen Stoltzsource "board/efi/Kconfig" 39a65b25d1SBin Mengsource "board/emulation/Kconfig" 4065c4ac0aSBin Mengsource "board/google/Kconfig" 4165c4ac0aSBin Mengsource "board/intel/Kconfig" 4265c4ac0aSBin Meng 43029194a3SBin Meng# platform-specific options below 44029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 452f3f477bSSimon Glasssource "arch/x86/cpu/broadwell/Kconfig" 46029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 47029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 48a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 49029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 50029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 51029194a3SBin Meng 52029194a3SBin Meng# architecture-specific options below 53029194a3SBin Meng 54a219639dSSimon Glassconfig AHCI 55a219639dSSimon Glass default y 56a219639dSSimon Glass 57b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 58b724bd7dSSimon Glass default 0x800 59b724bd7dSSimon Glass 6070a09c6cSSimon Glassconfig RAMBASE 6170a09c6cSSimon Glass hex 6270a09c6cSSimon Glass default 0x100000 6370a09c6cSSimon Glass 6470a09c6cSSimon Glassconfig XIP_ROM_SIZE 6570a09c6cSSimon Glass hex 667698d36aSBin Meng depends on X86_RESET_VECTOR 67bbd43d65SSimon Glass default ROM_SIZE 6870a09c6cSSimon Glass 6970a09c6cSSimon Glassconfig CPU_ADDR_BITS 7070a09c6cSSimon Glass int 7170a09c6cSSimon Glass default 36 7270a09c6cSSimon Glass 7365dd74a6SSimon Glassconfig HPET_ADDRESS 7465dd74a6SSimon Glass hex 7565dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 7665dd74a6SSimon Glass 7765dd74a6SSimon Glassconfig SMM_TSEG 7865dd74a6SSimon Glass bool 7965dd74a6SSimon Glass default n 8065dd74a6SSimon Glass 8165dd74a6SSimon Glassconfig SMM_TSEG_SIZE 8265dd74a6SSimon Glass hex 8365dd74a6SSimon Glass 848cb20cccSBin Mengconfig X86_RESET_VECTOR 858cb20cccSBin Meng bool 868cb20cccSBin Meng default n 878cb20cccSBin Meng 88343fb990SBin Mengconfig RESET_SEG_START 89343fb990SBin Meng hex 90343fb990SBin Meng depends on X86_RESET_VECTOR 91343fb990SBin Meng default 0xffff0000 92343fb990SBin Meng 93343fb990SBin Mengconfig RESET_SEG_SIZE 94343fb990SBin Meng hex 95343fb990SBin Meng depends on X86_RESET_VECTOR 96343fb990SBin Meng default 0x10000 97343fb990SBin Meng 98343fb990SBin Mengconfig RESET_VEC_LOC 99343fb990SBin Meng hex 100343fb990SBin Meng depends on X86_RESET_VECTOR 101343fb990SBin Meng default 0xfffffff0 102343fb990SBin Meng 1038cb20cccSBin Mengconfig SYS_X86_START16 1048cb20cccSBin Meng hex 1058cb20cccSBin Meng depends on X86_RESET_VECTOR 1068cb20cccSBin Meng default 0xfffff800 1078cb20cccSBin Meng 10864542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 10964542f46SBin Meng bool 11064542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 11164542f46SBin Meng bool 11264542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 11364542f46SBin Meng bool 11464542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 11564542f46SBin Meng bool 11664542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 11764542f46SBin Meng bool 11864542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 11964542f46SBin Meng bool 12064542f46SBin Meng 12164542f46SBin Mengchoice 12264542f46SBin Meng prompt "ROM chip size" 1237698d36aSBin Meng depends on X86_RESET_VECTOR 12464542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 12564542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 12664542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 12764542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 12864542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 12964542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 13064542f46SBin Meng help 13164542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 13264542f46SBin Meng 13364542f46SBin Meng The build system will take care of creating a u-boot.rom file 13464542f46SBin Meng of the matching size. 13564542f46SBin Meng 13664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 13764542f46SBin Meng bool "512 KB" 13864542f46SBin Meng help 13964542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 14064542f46SBin Meng 14164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 14264542f46SBin Meng bool "1024 KB (1 MB)" 14364542f46SBin Meng help 14464542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 14564542f46SBin Meng 14664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 14764542f46SBin Meng bool "2048 KB (2 MB)" 14864542f46SBin Meng help 14964542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 15064542f46SBin Meng 15164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 15264542f46SBin Meng bool "4096 KB (4 MB)" 15364542f46SBin Meng help 15464542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 15564542f46SBin Meng 15664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 15764542f46SBin Meng bool "8192 KB (8 MB)" 15864542f46SBin Meng help 15964542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 16064542f46SBin Meng 16164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 16264542f46SBin Meng bool "16384 KB (16 MB)" 16364542f46SBin Meng help 16464542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 16564542f46SBin Meng 16664542f46SBin Mengendchoice 16764542f46SBin Meng 16864542f46SBin Meng# Map the config names to an integer (KB). 16964542f46SBin Mengconfig UBOOT_ROMSIZE_KB 17064542f46SBin Meng int 17164542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 17264542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 17364542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 17464542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 17564542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 17664542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 17764542f46SBin Meng 17864542f46SBin Meng# Map the config names to a hex value (bytes). 179fce7b276SSimon Glassconfig ROM_SIZE 180fce7b276SSimon Glass hex 18164542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 18264542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 18364542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 18464542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 18564542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 18664542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 18764542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 188fce7b276SSimon Glass 189fce7b276SSimon Glassconfig HAVE_INTEL_ME 190fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 191fce7b276SSimon Glass help 192fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 193fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 194fce7b276SSimon Glass required for the platform to work. This enforces a particular 195fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 196fce7b276SSimon Glass your board directory. 197fce7b276SSimon Glass 19865dd74a6SSimon Glassconfig X86_RAMTEST 19965dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 20065dd74a6SSimon Glass help 20165dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 20265dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 20365dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 20465dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 20565dd74a6SSimon Glass detecting obvious failures. 20665dd74a6SSimon Glass 2078ce24cd9SSimon Glassconfig HAVE_FSP 2088ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 209e49cceacSSimon Glass depends on !EFI 2108ce24cd9SSimon Glass help 2118ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 2128ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 2138ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 2148ce24cd9SSimon Glass 2158ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 2168ce24cd9SSimon Glass SDRAM so will not boot. 2178ce24cd9SSimon Glass 2188ce24cd9SSimon Glassconfig FSP_FILE 2198ce24cd9SSimon Glass string "Firmware Support Package binary filename" 2208ce24cd9SSimon Glass depends on HAVE_FSP 2218ce24cd9SSimon Glass default "fsp.bin" 2228ce24cd9SSimon Glass help 2238ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 2248ce24cd9SSimon Glass in the board directory. 2258ce24cd9SSimon Glass 2268ce24cd9SSimon Glassconfig FSP_ADDR 2278ce24cd9SSimon Glass hex "Firmware Support Package binary location" 2288ce24cd9SSimon Glass depends on HAVE_FSP 2298ce24cd9SSimon Glass default 0xfffc0000 2308ce24cd9SSimon Glass help 2318ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 2328ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 2338ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 2348ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 2358ce24cd9SSimon Glass 2368ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 2378ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 2388ce24cd9SSimon Glass 2398ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 2408ce24cd9SSimon Glass hex 241d04e30b8SBin Meng depends on HAVE_FSP 2428ce24cd9SSimon Glass default 0x2000000 2438ce24cd9SSimon Glass help 24448aa6c26SBin Meng Stack top address which is used in fsp_init() after DRAM is ready and 2458ce24cd9SSimon Glass CAR is disabled. 2468ce24cd9SSimon Glass 24757b10f59SBin Mengconfig FSP_SYS_MALLOC_F_LEN 24857b10f59SBin Meng hex 24957b10f59SBin Meng depends on HAVE_FSP 25057b10f59SBin Meng default 0x100000 25157b10f59SBin Meng help 25257b10f59SBin Meng Additional size of malloc() pool before relocation. 25357b10f59SBin Meng 2543340f2ccSBin Mengconfig FSP_USE_UPD 2553340f2ccSBin Meng bool 2563340f2ccSBin Meng depends on HAVE_FSP 2573340f2ccSBin Meng default y 2583340f2ccSBin Meng help 2593340f2ccSBin Meng Most FSPs use UPD data region for some FSP customization. But there 2603340f2ccSBin Meng are still some FSPs that might not even have UPD. For such FSPs, 2613340f2ccSBin Meng override this to n in their platform Kconfig files. 2623340f2ccSBin Meng 263dc5be508SBin Mengconfig FSP_BROKEN_HOB 264dc5be508SBin Meng bool 265dc5be508SBin Meng depends on HAVE_FSP 266dc5be508SBin Meng help 267dc5be508SBin Meng Indicate some buggy FSPs that does not report memory used by FSP 268dc5be508SBin Meng itself as reserved in the resource descriptor HOB. Select this to 269dc5be508SBin Meng tell U-Boot to do some additional work to ensure U-Boot relocation 270dc5be508SBin Meng do not overwrite the important boot service data which is used by 271dc5be508SBin Meng FSP, otherwise the subsequent call to fsp_notify() will fail. 272dc5be508SBin Meng 273e2d76e95SBin Mengconfig ENABLE_MRC_CACHE 274e2d76e95SBin Meng bool "Enable MRC cache" 275e2d76e95SBin Meng depends on !EFI && !SYS_COREBOOT 276e2d76e95SBin Meng help 277e2d76e95SBin Meng Enable this feature to cause MRC data to be cached in NV storage 278e2d76e95SBin Meng to be used for speeding up boot time on future reboots and/or 279e2d76e95SBin Meng power cycles. 280e2d76e95SBin Meng 2815c60a3abSBin Meng For platforms that use Intel FSP for the memory initialization, 2825c60a3abSBin Meng please check FSP output HOB via U-Boot command 'fsp hob' to see 2835c60a3abSBin Meng if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h). 2845c60a3abSBin Meng If such GUID does not exist, MRC cache is not avaiable on such 2855c60a3abSBin Meng platform (eg: Intel Queensbay), which means selecting this option 2865c60a3abSBin Meng here does not make any difference. 2875c60a3abSBin Meng 288f7d35bc1SSimon Glassconfig HAVE_MRC 289f7d35bc1SSimon Glass bool "Add a System Agent binary" 290f7d35bc1SSimon Glass depends on !HAVE_FSP 291f7d35bc1SSimon Glass help 292f7d35bc1SSimon Glass Select this option to add a System Agent binary to 293f7d35bc1SSimon Glass the resulting U-Boot image. MRC stands for Memory Reference Code. 294f7d35bc1SSimon Glass It is a binary blob which U-Boot uses to set up SDRAM. 295f7d35bc1SSimon Glass 296f7d35bc1SSimon Glass Note: Without this binary U-Boot will not be able to set up its 297f7d35bc1SSimon Glass SDRAM so will not boot. 298f7d35bc1SSimon Glass 299f7d35bc1SSimon Glassconfig CACHE_MRC_BIN 300f7d35bc1SSimon Glass bool 301f7d35bc1SSimon Glass depends on HAVE_MRC 302f7d35bc1SSimon Glass default n 303f7d35bc1SSimon Glass help 304f7d35bc1SSimon Glass Enable caching for the memory reference code binary. This uses an 305f7d35bc1SSimon Glass MTRR (memory type range register) to turn on caching for the section 306f7d35bc1SSimon Glass of SPI flash that contains the memory reference code. This makes 307f7d35bc1SSimon Glass SDRAM init run faster. 308f7d35bc1SSimon Glass 309f7d35bc1SSimon Glassconfig CACHE_MRC_SIZE_KB 310f7d35bc1SSimon Glass int 311f7d35bc1SSimon Glass depends on HAVE_MRC 312f7d35bc1SSimon Glass default 512 313f7d35bc1SSimon Glass help 314f7d35bc1SSimon Glass Sets the size of the cached area for the memory reference code. 315f7d35bc1SSimon Glass This ends at the end of SPI flash (address 0xffffffff) and is 316f7d35bc1SSimon Glass measured in KB. Typically this is set to 512, providing for 0.5MB 317f7d35bc1SSimon Glass of cached space. 318f7d35bc1SSimon Glass 319f7d35bc1SSimon Glassconfig DCACHE_RAM_BASE 320f7d35bc1SSimon Glass hex 321f7d35bc1SSimon Glass depends on HAVE_MRC 322f7d35bc1SSimon Glass help 323f7d35bc1SSimon Glass Sets the base of the data cache area in memory space. This is the 324f7d35bc1SSimon Glass start address of the cache-as-RAM (CAR) area and the address varies 325f7d35bc1SSimon Glass depending on the CPU. Once CAR is set up, read/write memory becomes 326f7d35bc1SSimon Glass available at this address and can be used temporarily until SDRAM 327f7d35bc1SSimon Glass is working. 328f7d35bc1SSimon Glass 329f7d35bc1SSimon Glassconfig DCACHE_RAM_SIZE 330f7d35bc1SSimon Glass hex 331f7d35bc1SSimon Glass depends on HAVE_MRC 332f7d35bc1SSimon Glass default 0x40000 333f7d35bc1SSimon Glass help 334f7d35bc1SSimon Glass Sets the total size of the data cache area in memory space. This 335f7d35bc1SSimon Glass sets the size of the cache-as-RAM (CAR) area. Note that much of the 336f7d35bc1SSimon Glass CAR space is required by the MRC. The CAR space available to U-Boot 337f7d35bc1SSimon Glass is normally at the start and typically extends to 1/4 or 1/2 of the 338f7d35bc1SSimon Glass available size. 339f7d35bc1SSimon Glass 340f7d35bc1SSimon Glassconfig DCACHE_RAM_MRC_VAR_SIZE 341f7d35bc1SSimon Glass hex 342f7d35bc1SSimon Glass depends on HAVE_MRC 343f7d35bc1SSimon Glass help 344f7d35bc1SSimon Glass This is the amount of CAR (Cache as RAM) reserved for use by the 345f7d35bc1SSimon Glass memory reference code. This depends on the implementation of the 346f7d35bc1SSimon Glass memory reference code and must be set correctly or the board will 347f7d35bc1SSimon Glass not boot. 348f7d35bc1SSimon Glass 3490adf8d35SSimon Glassconfig HAVE_REFCODE 3500adf8d35SSimon Glass bool "Add a Reference Code binary" 3510adf8d35SSimon Glass help 3520adf8d35SSimon Glass Select this option to add a Reference Code binary to the resulting 3530adf8d35SSimon Glass U-Boot image. This is an Intel binary blob that handles system 3540adf8d35SSimon Glass initialisation, in this case the PCH and System Agent. 3550adf8d35SSimon Glass 3560adf8d35SSimon Glass Note: Without this binary (on platforms that need it such as 3570adf8d35SSimon Glass broadwell) U-Boot will be missing some critical setup steps. 3580adf8d35SSimon Glass Various peripherals may fail to work. 3590adf8d35SSimon Glass 3604c71322bSBin Mengconfig SMP 3614c71322bSBin Meng bool "Enable Symmetric Multiprocessing" 3624c71322bSBin Meng default n 3634c71322bSBin Meng help 3644c71322bSBin Meng Enable use of more than one CPU in U-Boot and the Operating System 3654c71322bSBin Meng when loaded. Each CPU will be started up and information can be 3664c71322bSBin Meng obtained using the 'cpu' command. If this option is disabled, then 3674c71322bSBin Meng only one CPU will be enabled regardless of the number of CPUs 3684c71322bSBin Meng available. 3694c71322bSBin Meng 37045b5a378SSimon Glassconfig MAX_CPUS 37145b5a378SSimon Glass int "Maximum number of CPUs permitted" 372063374d2SBin Meng depends on SMP 37345b5a378SSimon Glass default 4 37445b5a378SSimon Glass help 37545b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 37645b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 37745b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 37845b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 37945b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 38045b5a378SSimon Glass each CPU). 38145b5a378SSimon Glass 38245b5a378SSimon Glassconfig AP_STACK_SIZE 38345b5a378SSimon Glass hex 384063374d2SBin Meng depends on SMP 38545b5a378SSimon Glass default 0x1000 38645b5a378SSimon Glass help 38745b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 38845b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 38945b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 39045b5a378SSimon Glass enough space. 39145b5a378SSimon Glass 392786a08e0SBin Mengconfig HAVE_VGA_BIOS 393786a08e0SBin Meng bool "Add a VGA BIOS image" 394786a08e0SBin Meng help 395786a08e0SBin Meng Select this option if you have a VGA BIOS image that you would 396786a08e0SBin Meng like to add to your ROM. 397786a08e0SBin Meng 398786a08e0SBin Mengconfig VGA_BIOS_FILE 399786a08e0SBin Meng string "VGA BIOS image filename" 400786a08e0SBin Meng depends on HAVE_VGA_BIOS 401786a08e0SBin Meng default "vga.bin" 402786a08e0SBin Meng help 403786a08e0SBin Meng The filename of the VGA BIOS image in the board directory. 404786a08e0SBin Meng 405786a08e0SBin Mengconfig VGA_BIOS_ADDR 406786a08e0SBin Meng hex "VGA BIOS image location" 407786a08e0SBin Meng depends on HAVE_VGA_BIOS 408786a08e0SBin Meng default 0xfff90000 409786a08e0SBin Meng help 410786a08e0SBin Meng The location of VGA BIOS image in the SPI flash. For example, base 411786a08e0SBin Meng address of 0xfff90000 indicates that the image will be put at offset 412786a08e0SBin Meng 0x90000 from the beginning of a 1MB flash device. 413786a08e0SBin Meng 414b5b6b019SBin Mengmenu "System tables" 4158744bef5SBin Meng depends on !EFI && !SYS_COREBOOT 416b5b6b019SBin Meng 417b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 418b5b6b019SBin Meng bool "Generate a PIRQ table" 419b5b6b019SBin Meng default n 420b5b6b019SBin Meng help 421b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 422b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 423b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 424b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 425b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 426b5b6b019SBin Meng 4276388e357SSimon Glassconfig GENERATE_SFI_TABLE 4286388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 4296388e357SSimon Glass help 4306388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 4316388e357SSimon Glass for platform firmware to pass information to the operating system 4326388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 4336388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 4346388e357SSimon Glass used instead. 4356388e357SSimon Glass 4366388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 4376388e357SSimon Glass the OS. 4386388e357SSimon Glass 4396388e357SSimon Glass For more information, see http://simplefirmware.org 4406388e357SSimon Glass 44107545d86SBin Mengconfig GENERATE_MP_TABLE 44207545d86SBin Meng bool "Generate an MP (Multi-Processor) table" 44307545d86SBin Meng default n 44407545d86SBin Meng help 44507545d86SBin Meng Generate an MP (Multi-Processor) table for this board. The MP table 44607545d86SBin Meng provides a way for the operating system to support for symmetric 44707545d86SBin Meng multiprocessing as well as symmetric I/O interrupt handling with 44807545d86SBin Meng the local APIC and I/O APIC. 44907545d86SBin Meng 450867bcb63SSaket Sinhaconfig GENERATE_ACPI_TABLE 451867bcb63SSaket Sinha bool "Generate an ACPI (Advanced Configuration and Power Interface) table" 452867bcb63SSaket Sinha default n 453fcf5c041SMiao Yan select QFW if QEMU 454867bcb63SSaket Sinha help 455867bcb63SSaket Sinha The Advanced Configuration and Power Interface (ACPI) specification 456867bcb63SSaket Sinha provides an open standard for device configuration and management 457867bcb63SSaket Sinha by the operating system. It defines platform-independent interfaces 458867bcb63SSaket Sinha for configuration and power management monitoring. 459867bcb63SSaket Sinha 460721e992aSBin Mengconfig GENERATE_SMBIOS_TABLE 461721e992aSBin Meng bool "Generate an SMBIOS (System Management BIOS) table" 462721e992aSBin Meng default y 463721e992aSBin Meng help 464721e992aSBin Meng The System Management BIOS (SMBIOS) specification addresses how 465721e992aSBin Meng motherboard and system vendors present management information about 466721e992aSBin Meng their products in a standard format by extending the BIOS interface 467721e992aSBin Meng on Intel architecture systems. 468721e992aSBin Meng 469721e992aSBin Meng Check http://www.dmtf.org/standards/smbios for details. 470721e992aSBin Meng 4715ce378cfSBin Mengconfig SMBIOS_MANUFACTURER 4725ce378cfSBin Meng string "SMBIOS Manufacturer" 4735ce378cfSBin Meng depends on GENERATE_SMBIOS_TABLE 4745ce378cfSBin Meng default SYS_VENDOR 4755ce378cfSBin Meng help 4765ce378cfSBin Meng The board manufacturer to store in SMBIOS structures. 4775ce378cfSBin Meng Change this to override the default one (CONFIG_SYS_VENDOR). 4785ce378cfSBin Meng 4795ce378cfSBin Mengconfig SMBIOS_PRODUCT_NAME 4805ce378cfSBin Meng string "SMBIOS Product Name" 4815ce378cfSBin Meng depends on GENERATE_SMBIOS_TABLE 4825ce378cfSBin Meng default SYS_BOARD 4835ce378cfSBin Meng help 4845ce378cfSBin Meng The product name to store in SMBIOS structures. 4855ce378cfSBin Meng Change this to override the default one (CONFIG_SYS_BOARD). 4865ce378cfSBin Meng 487b5b6b019SBin Mengendmenu 488b5b6b019SBin Meng 489b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 490b5b6b019SBin Meng int 491b5b6b019SBin Meng default 8 492b5b6b019SBin Meng help 493b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 494b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 495b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 496b5b6b019SBin Meng 497b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 498b5b6b019SBin Meng int 499b5b6b019SBin Meng default 128 500b5b6b019SBin Meng help 501b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 502b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 503b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 504b5b6b019SBin Meng change it according to your needs. 505b5b6b019SBin Meng 5062d934e57SSimon Glassconfig PCIE_ECAM_BASE 5072d934e57SSimon Glass hex 5082d934e57SSimon Glass default 0xe0000000 5092d934e57SSimon Glass help 5102d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 5112d934e57SSimon Glass is only available through the Enhanced Configuration Access 5122d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 5132d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 5142d934e57SSimon Glass configuration space through I/O access, but memory access is more 5152d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 5162d934e57SSimon Glass should be set to a region that does not conflict with memory 5172d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 5182d934e57SSimon Glass passed to pci_set_region(). 5192d934e57SSimon Glass 5201ed6648bSBin Mengconfig PCIE_ECAM_SIZE 5211ed6648bSBin Meng hex 5221ed6648bSBin Meng default 0x10000000 5231ed6648bSBin Meng help 5241ed6648bSBin Meng This is the size of memory-mapped address of PCI configuration space, 5251ed6648bSBin Meng which is only available through the Enhanced Configuration Access 5261ed6648bSBin Meng Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, 5271ed6648bSBin Meng so a default 0x10000000 size covers all of the 256 buses which is the 5281ed6648bSBin Meng maximum number of PCI buses as defined by the PCI specification. 5291ed6648bSBin Meng 5301eb39a50SBin Mengconfig I8259_PIC 5311eb39a50SBin Meng bool 5321eb39a50SBin Meng default y 5331eb39a50SBin Meng help 5341eb39a50SBin Meng Intel 8259 ISA compatible chipset incorporates two 8259 (master and 5351eb39a50SBin Meng slave) interrupt controllers. Include this to have U-Boot set up 5361eb39a50SBin Meng the interrupt correctly. 5371eb39a50SBin Meng 5381eb39a50SBin Mengconfig I8254_TIMER 5391eb39a50SBin Meng bool 5401eb39a50SBin Meng default y 5411eb39a50SBin Meng help 5421eb39a50SBin Meng Intel 8254 timer contains three counters which have fixed uses. 5431eb39a50SBin Meng Include this to have U-Boot set up the timer correctly. 5441eb39a50SBin Meng 5456b44ae6bSSimon Glassconfig I8042_KEYB 5466b44ae6bSSimon Glass default y 5476b44ae6bSSimon Glass 5486b44ae6bSSimon Glassconfig DM_KEYBOARD 5496b44ae6bSSimon Glass default y 5506b44ae6bSSimon Glass 5513cf23719SBin Mengconfig SEABIOS 5523cf23719SBin Meng bool "Support booting SeaBIOS" 5533cf23719SBin Meng help 5543cf23719SBin Meng SeaBIOS is an open source implementation of a 16-bit X86 BIOS. 5553cf23719SBin Meng It can run in an emulator or natively on X86 hardware with the use 5563cf23719SBin Meng of coreboot/U-Boot. By turning on this option, U-Boot prepares 5573cf23719SBin Meng all the configuration tables that are necessary to boot SeaBIOS. 5583cf23719SBin Meng 5593cf23719SBin Meng Check http://www.seabios.org/SeaBIOS for details. 5603cf23719SBin Meng 561789b6dceSBin Mengconfig HIGH_TABLE_SIZE 562789b6dceSBin Meng hex "Size of configuration tables which reside in high memory" 563789b6dceSBin Meng default 0x10000 564789b6dceSBin Meng depends on SEABIOS 565789b6dceSBin Meng help 566789b6dceSBin Meng SeaBIOS itself resides in E seg and F seg, where U-Boot puts all 567789b6dceSBin Meng configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot 568789b6dceSBin Meng puts a copy of configuration tables in high memory region which 569789b6dceSBin Meng is reserved on the stack before relocation. The region size is 570789b6dceSBin Meng determined by this option. 571789b6dceSBin Meng 572789b6dceSBin Meng Increse it if the default size does not fit the board's needs. 573789b6dceSBin Meng This is most likely due to a large ACPI DSDT table is used. 574789b6dceSBin Meng 575e49cceacSSimon Glasssource "arch/x86/lib/efi/Kconfig" 576e49cceacSSimon Glass 577dd84058dSMasahiro Yamadaendmenu 578