1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 7dd84058dSMasahiro Yamadachoice 8a66ad67fSSimon Glass prompt "Run U-Boot in 32/64-bit mode" 9a66ad67fSSimon Glass default X86_RUN_32BIT 10a66ad67fSSimon Glass help 11a66ad67fSSimon Glass U-Boot can be built as a 32-bit binary which runs in 32-bit mode 12a66ad67fSSimon Glass even on 64-bit machines. In this case SPL is not used, and U-Boot 13a66ad67fSSimon Glass runs directly from the reset vector (via 16-bit start-up). 14a66ad67fSSimon Glass 15a66ad67fSSimon Glass Alternatively it can be run as a 64-bit binary, thus requiring a 16a66ad67fSSimon Glass 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit 17a66ad67fSSimon Glass start-up) then jumps to U-Boot in 64-bit mode. 18a66ad67fSSimon Glass 19a66ad67fSSimon Glass For now, 32-bit mode is recommended, as 64-bit is still 20a66ad67fSSimon Glass experimental and is missing a lot of features. 21a66ad67fSSimon Glass 22a66ad67fSSimon Glassconfig X86_RUN_32BIT 23a66ad67fSSimon Glass bool "32-bit" 24a66ad67fSSimon Glass help 25a66ad67fSSimon Glass Build U-Boot as a 32-bit binary with no SPL. This is the currently 26a66ad67fSSimon Glass supported normal setup. U-Boot will stay in 32-bit mode even on 27a66ad67fSSimon Glass 64-bit machines. When booting a 64-bit kernel, U-Boot will switch 28a66ad67fSSimon Glass to 64-bit just before starting the kernel. Only the bottom 4GB of 29a66ad67fSSimon Glass memory can be accessed through normal means, although 30a66ad67fSSimon Glass arch_phys_memset() can be used for basic access to other memory. 31a66ad67fSSimon Glass 32a66ad67fSSimon Glassconfig X86_RUN_64BIT 33a66ad67fSSimon Glass bool "64-bit" 34a66ad67fSSimon Glass select X86_64 35a66ad67fSSimon Glass select SUPPORT_SPL 36a66ad67fSSimon Glass select SPL 37a66ad67fSSimon Glass select SPL_SEPARATE_BSS 38a66ad67fSSimon Glass help 39a66ad67fSSimon Glass Build U-Boot as a 64-bit binary with a 32-bit SPL. This is 40a66ad67fSSimon Glass experimental and many features are missing. U-Boot SPL starts up, 41a66ad67fSSimon Glass runs through the 16-bit and 32-bit init, then switches to 64-bit 42a66ad67fSSimon Glass mode and jumps to U-Boot proper. 43a66ad67fSSimon Glass 44a66ad67fSSimon Glassendchoice 45a66ad67fSSimon Glass 46a66ad67fSSimon Glassconfig X86_64 47a66ad67fSSimon Glass bool 48a66ad67fSSimon Glass 49a66ad67fSSimon Glassconfig SPL_X86_64 50a66ad67fSSimon Glass bool 51a66ad67fSSimon Glass depends on SPL 52a66ad67fSSimon Glass 53a66ad67fSSimon Glasschoice 5465c4ac0aSBin Meng prompt "Mainboard vendor" 5599a309f3SBin Meng default VENDOR_EMULATION 56dd84058dSMasahiro Yamada 57215099a5SGeorge McCollisterconfig VENDOR_ADVANTECH 58215099a5SGeorge McCollister bool "advantech" 59215099a5SGeorge McCollister 6082ceba2cSStefan Roeseconfig VENDOR_CONGATEC 6182ceba2cSStefan Roese bool "congatec" 6282ceba2cSStefan Roese 6365c4ac0aSBin Mengconfig VENDOR_COREBOOT 6465c4ac0aSBin Meng bool "coreboot" 658ef07571SSimon Glass 66b1ad6c69SStefan Roeseconfig VENDOR_DFI 67b1ad6c69SStefan Roese bool "dfi" 68b1ad6c69SStefan Roese 693dcdd17bSBen Stoltzconfig VENDOR_EFI 703dcdd17bSBen Stoltz bool "efi" 713dcdd17bSBen Stoltz 72a65b25d1SBin Mengconfig VENDOR_EMULATION 73a65b25d1SBin Meng bool "emulation" 74a65b25d1SBin Meng 7565c4ac0aSBin Mengconfig VENDOR_GOOGLE 7665c4ac0aSBin Meng bool "Google" 77dd84058dSMasahiro Yamada 7865c4ac0aSBin Mengconfig VENDOR_INTEL 7965c4ac0aSBin Meng bool "Intel" 80ef46bea0SBin Meng 81dd84058dSMasahiro Yamadaendchoice 82dd84058dSMasahiro Yamada 837a96fd8eSAndy Shevchenko# subarchitectures-specific options below 847a96fd8eSAndy Shevchenkoconfig INTEL_MID 857a96fd8eSAndy Shevchenko bool "Intel MID platform support" 86bb416465SFelipe Balbi select REGMAP 87bb416465SFelipe Balbi select SYSCON 887a96fd8eSAndy Shevchenko help 897a96fd8eSAndy Shevchenko Select to build a U-Boot capable of supporting Intel MID 907a96fd8eSAndy Shevchenko (Mobile Internet Device) platform systems which do not have 917a96fd8eSAndy Shevchenko the PCI legacy interfaces. 927a96fd8eSAndy Shevchenko 937a96fd8eSAndy Shevchenko If you are building for a PC class system say N here. 947a96fd8eSAndy Shevchenko 957a96fd8eSAndy Shevchenko Intel MID platforms are based on an Intel processor and 967a96fd8eSAndy Shevchenko chipset which consume less power than most of the x86 977a96fd8eSAndy Shevchenko derivatives. 987a96fd8eSAndy Shevchenko 9965c4ac0aSBin Meng# board-specific options below 100215099a5SGeorge McCollistersource "board/advantech/Kconfig" 10182ceba2cSStefan Roesesource "board/congatec/Kconfig" 10265c4ac0aSBin Mengsource "board/coreboot/Kconfig" 103b1ad6c69SStefan Roesesource "board/dfi/Kconfig" 1043e9aa320SBen Stoltzsource "board/efi/Kconfig" 105a65b25d1SBin Mengsource "board/emulation/Kconfig" 10665c4ac0aSBin Mengsource "board/google/Kconfig" 10765c4ac0aSBin Mengsource "board/intel/Kconfig" 10865c4ac0aSBin Meng 109029194a3SBin Meng# platform-specific options below 110029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 111de9ac9a1SBin Mengsource "arch/x86/cpu/braswell/Kconfig" 1122f3f477bSSimon Glasssource "arch/x86/cpu/broadwell/Kconfig" 113029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 114029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 1154f1dacd4SBin Mengsource "arch/x86/cpu/efi/Kconfig" 116a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 117029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 118029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 119e71de54aSFelipe Balbisource "arch/x86/cpu/tangier/Kconfig" 120029194a3SBin Meng 121029194a3SBin Meng# architecture-specific options below 122029194a3SBin Meng 123a219639dSSimon Glassconfig AHCI 124a219639dSSimon Glass default y 125a219639dSSimon Glass 126b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 127b724bd7dSSimon Glass default 0x800 128b724bd7dSSimon Glass 12970a09c6cSSimon Glassconfig RAMBASE 13070a09c6cSSimon Glass hex 13170a09c6cSSimon Glass default 0x100000 13270a09c6cSSimon Glass 13370a09c6cSSimon Glassconfig XIP_ROM_SIZE 13470a09c6cSSimon Glass hex 1357698d36aSBin Meng depends on X86_RESET_VECTOR 136bbd43d65SSimon Glass default ROM_SIZE 13770a09c6cSSimon Glass 13870a09c6cSSimon Glassconfig CPU_ADDR_BITS 13970a09c6cSSimon Glass int 14070a09c6cSSimon Glass default 36 14170a09c6cSSimon Glass 14265dd74a6SSimon Glassconfig HPET_ADDRESS 14365dd74a6SSimon Glass hex 14465dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 14565dd74a6SSimon Glass 14665dd74a6SSimon Glassconfig SMM_TSEG 14765dd74a6SSimon Glass bool 14865dd74a6SSimon Glass default n 14965dd74a6SSimon Glass 15065dd74a6SSimon Glassconfig SMM_TSEG_SIZE 15165dd74a6SSimon Glass hex 15265dd74a6SSimon Glass 1538cb20cccSBin Mengconfig X86_RESET_VECTOR 1548cb20cccSBin Meng bool 1558cb20cccSBin Meng default n 156d6a0c78aSMasahiro Yamada select BINMAN 1578cb20cccSBin Meng 15813f1dc64SSimon Glass# The following options control where the 16-bit and 32-bit init lies 15913f1dc64SSimon Glass# If SPL is enabled then it normally holds this init code, and U-Boot proper 16013f1dc64SSimon Glass# is normally a 64-bit build. 16113f1dc64SSimon Glass# 16213f1dc64SSimon Glass# The 16-bit init refers to the reset vector and the small amount of code to 16313f1dc64SSimon Glass# get the processor into 32-bit mode. It may be in SPL or in U-Boot proper, 16413f1dc64SSimon Glass# or missing altogether if U-Boot is started from EFI or coreboot. 16513f1dc64SSimon Glass# 16613f1dc64SSimon Glass# The 32-bit init refers to processor init, running binary blobs including 16713f1dc64SSimon Glass# FSP, setting up interrupts and anything else that needs to be done in 16813f1dc64SSimon Glass# 32-bit code. It is normally in the same place as 16-bit init if that is 16913f1dc64SSimon Glass# enabled (i.e. they are both in SPL, or both in U-Boot proper). 17013f1dc64SSimon Glassconfig X86_16BIT_INIT 17113f1dc64SSimon Glass bool 17213f1dc64SSimon Glass depends on X86_RESET_VECTOR 17313f1dc64SSimon Glass default y if X86_RESET_VECTOR && !SPL 17413f1dc64SSimon Glass help 17513f1dc64SSimon Glass This is enabled when 16-bit init is in U-Boot proper 17613f1dc64SSimon Glass 17713f1dc64SSimon Glassconfig SPL_X86_16BIT_INIT 17813f1dc64SSimon Glass bool 17913f1dc64SSimon Glass depends on X86_RESET_VECTOR 18013f1dc64SSimon Glass default y if X86_RESET_VECTOR && SPL 18113f1dc64SSimon Glass help 18213f1dc64SSimon Glass This is enabled when 16-bit init is in SPL 18313f1dc64SSimon Glass 18413f1dc64SSimon Glassconfig X86_32BIT_INIT 18513f1dc64SSimon Glass bool 18613f1dc64SSimon Glass depends on X86_RESET_VECTOR 18713f1dc64SSimon Glass default y if X86_RESET_VECTOR && !SPL 18813f1dc64SSimon Glass help 18913f1dc64SSimon Glass This is enabled when 32-bit init is in U-Boot proper 19013f1dc64SSimon Glass 19113f1dc64SSimon Glassconfig SPL_X86_32BIT_INIT 19213f1dc64SSimon Glass bool 19313f1dc64SSimon Glass depends on X86_RESET_VECTOR 19413f1dc64SSimon Glass default y if X86_RESET_VECTOR && SPL 19513f1dc64SSimon Glass help 19613f1dc64SSimon Glass This is enabled when 32-bit init is in SPL 19713f1dc64SSimon Glass 198343fb990SBin Mengconfig RESET_SEG_START 199343fb990SBin Meng hex 200343fb990SBin Meng depends on X86_RESET_VECTOR 201343fb990SBin Meng default 0xffff0000 202343fb990SBin Meng 203343fb990SBin Mengconfig RESET_SEG_SIZE 204343fb990SBin Meng hex 205343fb990SBin Meng depends on X86_RESET_VECTOR 206343fb990SBin Meng default 0x10000 207343fb990SBin Meng 208343fb990SBin Mengconfig RESET_VEC_LOC 209343fb990SBin Meng hex 210343fb990SBin Meng depends on X86_RESET_VECTOR 211343fb990SBin Meng default 0xfffffff0 212343fb990SBin Meng 2138cb20cccSBin Mengconfig SYS_X86_START16 2148cb20cccSBin Meng hex 2158cb20cccSBin Meng depends on X86_RESET_VECTOR 2168cb20cccSBin Meng default 0xfffff800 2178cb20cccSBin Meng 218446d4e04SAndy Shevchenkoconfig X86_LOAD_FROM_32_BIT 219446d4e04SAndy Shevchenko bool "Boot from a 32-bit program" 220446d4e04SAndy Shevchenko help 221446d4e04SAndy Shevchenko Define this to boot U-Boot from a 32-bit program which sets 222446d4e04SAndy Shevchenko the GDT differently. This can be used to boot directly from 223446d4e04SAndy Shevchenko any stage of coreboot, for example, bypassing the normal 224446d4e04SAndy Shevchenko payload-loading feature. 225446d4e04SAndy Shevchenko 22664542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 22764542f46SBin Meng bool 22864542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 22964542f46SBin Meng bool 23064542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 23164542f46SBin Meng bool 23264542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 23364542f46SBin Meng bool 23464542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 23564542f46SBin Meng bool 23664542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 23764542f46SBin Meng bool 23864542f46SBin Meng 23964542f46SBin Mengchoice 24064542f46SBin Meng prompt "ROM chip size" 2417698d36aSBin Meng depends on X86_RESET_VECTOR 24264542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 24364542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 24464542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 24564542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 24664542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 24764542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 24864542f46SBin Meng help 24964542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 25064542f46SBin Meng 25164542f46SBin Meng The build system will take care of creating a u-boot.rom file 25264542f46SBin Meng of the matching size. 25364542f46SBin Meng 25464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 25564542f46SBin Meng bool "512 KB" 25664542f46SBin Meng help 25764542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 25864542f46SBin Meng 25964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 26064542f46SBin Meng bool "1024 KB (1 MB)" 26164542f46SBin Meng help 26264542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 26364542f46SBin Meng 26464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 26564542f46SBin Meng bool "2048 KB (2 MB)" 26664542f46SBin Meng help 26764542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 26864542f46SBin Meng 26964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 27064542f46SBin Meng bool "4096 KB (4 MB)" 27164542f46SBin Meng help 27264542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 27364542f46SBin Meng 27464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 27564542f46SBin Meng bool "8192 KB (8 MB)" 27664542f46SBin Meng help 27764542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 27864542f46SBin Meng 27964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 28064542f46SBin Meng bool "16384 KB (16 MB)" 28164542f46SBin Meng help 28264542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 28364542f46SBin Meng 28464542f46SBin Mengendchoice 28564542f46SBin Meng 28664542f46SBin Meng# Map the config names to an integer (KB). 28764542f46SBin Mengconfig UBOOT_ROMSIZE_KB 28864542f46SBin Meng int 28964542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 29064542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 29164542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 29264542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 29364542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 29464542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 29564542f46SBin Meng 29664542f46SBin Meng# Map the config names to a hex value (bytes). 297fce7b276SSimon Glassconfig ROM_SIZE 298fce7b276SSimon Glass hex 29964542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 30064542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 30164542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 30264542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 30364542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 30464542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 30564542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 306fce7b276SSimon Glass 307fce7b276SSimon Glassconfig HAVE_INTEL_ME 308fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 309fce7b276SSimon Glass help 310fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 311fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 312fce7b276SSimon Glass required for the platform to work. This enforces a particular 313fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 314fce7b276SSimon Glass your board directory. 315fce7b276SSimon Glass 31665dd74a6SSimon Glassconfig X86_RAMTEST 31765dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 31865dd74a6SSimon Glass help 31965dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 32065dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 32165dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 32265dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 32365dd74a6SSimon Glass detecting obvious failures. 32465dd74a6SSimon Glass 3253dc0f844SStefan Roeseconfig FLASH_DESCRIPTOR_FILE 3263dc0f844SStefan Roese string "Flash descriptor binary filename" 3273dc0f844SStefan Roese depends on HAVE_INTEL_ME 3283dc0f844SStefan Roese default "descriptor.bin" 3293dc0f844SStefan Roese help 3303dc0f844SStefan Roese The filename of the file to use as flash descriptor in the 3313dc0f844SStefan Roese board directory. 3323dc0f844SStefan Roese 3333dc0f844SStefan Roeseconfig INTEL_ME_FILE 3343dc0f844SStefan Roese string "Intel Management Engine binary filename" 3353dc0f844SStefan Roese depends on HAVE_INTEL_ME 3363dc0f844SStefan Roese default "me.bin" 3373dc0f844SStefan Roese help 3383dc0f844SStefan Roese The filename of the file to use as Intel Management Engine in the 3393dc0f844SStefan Roese board directory. 3403dc0f844SStefan Roese 3418ce24cd9SSimon Glassconfig HAVE_FSP 3428ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 343e49cceacSSimon Glass depends on !EFI 3448ce24cd9SSimon Glass help 3458ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 3468ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 3478ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 3488ce24cd9SSimon Glass 3498ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 3508ce24cd9SSimon Glass SDRAM so will not boot. 3518ce24cd9SSimon Glass 3528ce24cd9SSimon Glassconfig FSP_FILE 3538ce24cd9SSimon Glass string "Firmware Support Package binary filename" 3548ce24cd9SSimon Glass depends on HAVE_FSP 3558ce24cd9SSimon Glass default "fsp.bin" 3568ce24cd9SSimon Glass help 3578ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 3588ce24cd9SSimon Glass in the board directory. 3598ce24cd9SSimon Glass 3608ce24cd9SSimon Glassconfig FSP_ADDR 3618ce24cd9SSimon Glass hex "Firmware Support Package binary location" 3628ce24cd9SSimon Glass depends on HAVE_FSP 3638ce24cd9SSimon Glass default 0xfffc0000 3648ce24cd9SSimon Glass help 3658ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 3668ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 3678ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 3688ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 3698ce24cd9SSimon Glass 3708ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 3718ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 3728ce24cd9SSimon Glass 3738ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 3748ce24cd9SSimon Glass hex 375d04e30b8SBin Meng depends on HAVE_FSP 3768ce24cd9SSimon Glass default 0x2000000 3778ce24cd9SSimon Glass help 37848aa6c26SBin Meng Stack top address which is used in fsp_init() after DRAM is ready and 3798ce24cd9SSimon Glass CAR is disabled. 3808ce24cd9SSimon Glass 38157b10f59SBin Mengconfig FSP_SYS_MALLOC_F_LEN 38257b10f59SBin Meng hex 38357b10f59SBin Meng depends on HAVE_FSP 38457b10f59SBin Meng default 0x100000 38557b10f59SBin Meng help 38657b10f59SBin Meng Additional size of malloc() pool before relocation. 38757b10f59SBin Meng 3883340f2ccSBin Mengconfig FSP_USE_UPD 3893340f2ccSBin Meng bool 3903340f2ccSBin Meng depends on HAVE_FSP 3913340f2ccSBin Meng default y 3923340f2ccSBin Meng help 3933340f2ccSBin Meng Most FSPs use UPD data region for some FSP customization. But there 3943340f2ccSBin Meng are still some FSPs that might not even have UPD. For such FSPs, 3953340f2ccSBin Meng override this to n in their platform Kconfig files. 3963340f2ccSBin Meng 397dc5be508SBin Mengconfig FSP_BROKEN_HOB 398dc5be508SBin Meng bool 399dc5be508SBin Meng depends on HAVE_FSP 400dc5be508SBin Meng help 401dc5be508SBin Meng Indicate some buggy FSPs that does not report memory used by FSP 402dc5be508SBin Meng itself as reserved in the resource descriptor HOB. Select this to 403dc5be508SBin Meng tell U-Boot to do some additional work to ensure U-Boot relocation 404dc5be508SBin Meng do not overwrite the important boot service data which is used by 405dc5be508SBin Meng FSP, otherwise the subsequent call to fsp_notify() will fail. 406dc5be508SBin Meng 407e2d76e95SBin Mengconfig ENABLE_MRC_CACHE 408e2d76e95SBin Meng bool "Enable MRC cache" 409e2d76e95SBin Meng depends on !EFI && !SYS_COREBOOT 410e2d76e95SBin Meng help 411e2d76e95SBin Meng Enable this feature to cause MRC data to be cached in NV storage 412e2d76e95SBin Meng to be used for speeding up boot time on future reboots and/or 413e2d76e95SBin Meng power cycles. 414e2d76e95SBin Meng 4155c60a3abSBin Meng For platforms that use Intel FSP for the memory initialization, 4165c60a3abSBin Meng please check FSP output HOB via U-Boot command 'fsp hob' to see 4175c60a3abSBin Meng if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h). 4185c60a3abSBin Meng If such GUID does not exist, MRC cache is not avaiable on such 4195c60a3abSBin Meng platform (eg: Intel Queensbay), which means selecting this option 4205c60a3abSBin Meng here does not make any difference. 4215c60a3abSBin Meng 422f7d35bc1SSimon Glassconfig HAVE_MRC 423f7d35bc1SSimon Glass bool "Add a System Agent binary" 424f7d35bc1SSimon Glass depends on !HAVE_FSP 425f7d35bc1SSimon Glass help 426f7d35bc1SSimon Glass Select this option to add a System Agent binary to 427f7d35bc1SSimon Glass the resulting U-Boot image. MRC stands for Memory Reference Code. 428f7d35bc1SSimon Glass It is a binary blob which U-Boot uses to set up SDRAM. 429f7d35bc1SSimon Glass 430f7d35bc1SSimon Glass Note: Without this binary U-Boot will not be able to set up its 431f7d35bc1SSimon Glass SDRAM so will not boot. 432f7d35bc1SSimon Glass 433f7d35bc1SSimon Glassconfig CACHE_MRC_BIN 434f7d35bc1SSimon Glass bool 435f7d35bc1SSimon Glass depends on HAVE_MRC 436f7d35bc1SSimon Glass default n 437f7d35bc1SSimon Glass help 438f7d35bc1SSimon Glass Enable caching for the memory reference code binary. This uses an 439f7d35bc1SSimon Glass MTRR (memory type range register) to turn on caching for the section 440f7d35bc1SSimon Glass of SPI flash that contains the memory reference code. This makes 441f7d35bc1SSimon Glass SDRAM init run faster. 442f7d35bc1SSimon Glass 443f7d35bc1SSimon Glassconfig CACHE_MRC_SIZE_KB 444f7d35bc1SSimon Glass int 445f7d35bc1SSimon Glass depends on HAVE_MRC 446f7d35bc1SSimon Glass default 512 447f7d35bc1SSimon Glass help 448f7d35bc1SSimon Glass Sets the size of the cached area for the memory reference code. 449f7d35bc1SSimon Glass This ends at the end of SPI flash (address 0xffffffff) and is 450f7d35bc1SSimon Glass measured in KB. Typically this is set to 512, providing for 0.5MB 451f7d35bc1SSimon Glass of cached space. 452f7d35bc1SSimon Glass 453f7d35bc1SSimon Glassconfig DCACHE_RAM_BASE 454f7d35bc1SSimon Glass hex 455f7d35bc1SSimon Glass depends on HAVE_MRC 456f7d35bc1SSimon Glass help 457f7d35bc1SSimon Glass Sets the base of the data cache area in memory space. This is the 458f7d35bc1SSimon Glass start address of the cache-as-RAM (CAR) area and the address varies 459f7d35bc1SSimon Glass depending on the CPU. Once CAR is set up, read/write memory becomes 460f7d35bc1SSimon Glass available at this address and can be used temporarily until SDRAM 461f7d35bc1SSimon Glass is working. 462f7d35bc1SSimon Glass 463f7d35bc1SSimon Glassconfig DCACHE_RAM_SIZE 464f7d35bc1SSimon Glass hex 465f7d35bc1SSimon Glass depends on HAVE_MRC 466f7d35bc1SSimon Glass default 0x40000 467f7d35bc1SSimon Glass help 468f7d35bc1SSimon Glass Sets the total size of the data cache area in memory space. This 469f7d35bc1SSimon Glass sets the size of the cache-as-RAM (CAR) area. Note that much of the 470f7d35bc1SSimon Glass CAR space is required by the MRC. The CAR space available to U-Boot 471f7d35bc1SSimon Glass is normally at the start and typically extends to 1/4 or 1/2 of the 472f7d35bc1SSimon Glass available size. 473f7d35bc1SSimon Glass 474f7d35bc1SSimon Glassconfig DCACHE_RAM_MRC_VAR_SIZE 475f7d35bc1SSimon Glass hex 476f7d35bc1SSimon Glass depends on HAVE_MRC 477f7d35bc1SSimon Glass help 478f7d35bc1SSimon Glass This is the amount of CAR (Cache as RAM) reserved for use by the 479f7d35bc1SSimon Glass memory reference code. This depends on the implementation of the 480f7d35bc1SSimon Glass memory reference code and must be set correctly or the board will 481f7d35bc1SSimon Glass not boot. 482f7d35bc1SSimon Glass 4830adf8d35SSimon Glassconfig HAVE_REFCODE 4840adf8d35SSimon Glass bool "Add a Reference Code binary" 4850adf8d35SSimon Glass help 4860adf8d35SSimon Glass Select this option to add a Reference Code binary to the resulting 4870adf8d35SSimon Glass U-Boot image. This is an Intel binary blob that handles system 4880adf8d35SSimon Glass initialisation, in this case the PCH and System Agent. 4890adf8d35SSimon Glass 4900adf8d35SSimon Glass Note: Without this binary (on platforms that need it such as 4910adf8d35SSimon Glass broadwell) U-Boot will be missing some critical setup steps. 4920adf8d35SSimon Glass Various peripherals may fail to work. 4930adf8d35SSimon Glass 4944c71322bSBin Mengconfig SMP 4954c71322bSBin Meng bool "Enable Symmetric Multiprocessing" 4964c71322bSBin Meng default n 4974c71322bSBin Meng help 4984c71322bSBin Meng Enable use of more than one CPU in U-Boot and the Operating System 4994c71322bSBin Meng when loaded. Each CPU will be started up and information can be 5004c71322bSBin Meng obtained using the 'cpu' command. If this option is disabled, then 5014c71322bSBin Meng only one CPU will be enabled regardless of the number of CPUs 5024c71322bSBin Meng available. 5034c71322bSBin Meng 50445b5a378SSimon Glassconfig MAX_CPUS 50545b5a378SSimon Glass int "Maximum number of CPUs permitted" 506063374d2SBin Meng depends on SMP 50745b5a378SSimon Glass default 4 50845b5a378SSimon Glass help 50945b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 51045b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 51145b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 51245b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 51345b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 51445b5a378SSimon Glass each CPU). 51545b5a378SSimon Glass 51645b5a378SSimon Glassconfig AP_STACK_SIZE 51745b5a378SSimon Glass hex 518063374d2SBin Meng depends on SMP 51945b5a378SSimon Glass default 0x1000 52045b5a378SSimon Glass help 52145b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 52245b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 52345b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 52445b5a378SSimon Glass enough space. 52545b5a378SSimon Glass 5262ddb1a17SBin Mengconfig CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED 5272ddb1a17SBin Meng bool 5282ddb1a17SBin Meng help 5292ddb1a17SBin Meng This option indicates that the turbo mode setting is not package 5302ddb1a17SBin Meng scoped. i.e. turbo_enable() needs to be called on not just the 5312ddb1a17SBin Meng bootstrap processor (BSP). 5322ddb1a17SBin Meng 533786a08e0SBin Mengconfig HAVE_VGA_BIOS 534786a08e0SBin Meng bool "Add a VGA BIOS image" 535786a08e0SBin Meng help 536786a08e0SBin Meng Select this option if you have a VGA BIOS image that you would 537786a08e0SBin Meng like to add to your ROM. 538786a08e0SBin Meng 539786a08e0SBin Mengconfig VGA_BIOS_FILE 540786a08e0SBin Meng string "VGA BIOS image filename" 541786a08e0SBin Meng depends on HAVE_VGA_BIOS 542786a08e0SBin Meng default "vga.bin" 543786a08e0SBin Meng help 544786a08e0SBin Meng The filename of the VGA BIOS image in the board directory. 545786a08e0SBin Meng 546786a08e0SBin Mengconfig VGA_BIOS_ADDR 547786a08e0SBin Meng hex "VGA BIOS image location" 548786a08e0SBin Meng depends on HAVE_VGA_BIOS 549786a08e0SBin Meng default 0xfff90000 550786a08e0SBin Meng help 551786a08e0SBin Meng The location of VGA BIOS image in the SPI flash. For example, base 552786a08e0SBin Meng address of 0xfff90000 indicates that the image will be put at offset 553786a08e0SBin Meng 0x90000 from the beginning of a 1MB flash device. 554786a08e0SBin Meng 555ae3ca125SBin Mengconfig HAVE_VBT 556ae3ca125SBin Meng bool "Add a Video BIOS Table (VBT) image" 557ae3ca125SBin Meng depends on HAVE_FSP 558ae3ca125SBin Meng help 559ae3ca125SBin Meng Select this option if you have a Video BIOS Table (VBT) image that 560ae3ca125SBin Meng you would like to add to your ROM. This is normally required if you 561ae3ca125SBin Meng are using an Intel FSP firmware that is complaint with spec 1.1 or 562ae3ca125SBin Meng later to initialize the integrated graphics device (IGD). 563ae3ca125SBin Meng 564ae3ca125SBin Meng Video BIOS Table, or VBT, provides platform and board specific 565ae3ca125SBin Meng configuration information to the driver that is not discoverable 566ae3ca125SBin Meng or available through other means. By other means the most used 567ae3ca125SBin Meng method here is to read EDID table from the attached monitor, over 568ae3ca125SBin Meng Display Data Channel (DDC) using two pin I2C serial interface. VBT 569ae3ca125SBin Meng configuration is related to display hardware and is available via 570ae3ca125SBin Meng the ACPI OpRegion or, on older systems, in the PCI ROM (Option ROM). 571ae3ca125SBin Meng 572ae3ca125SBin Mengconfig VBT_FILE 573ae3ca125SBin Meng string "Video BIOS Table (VBT) image filename" 574ae3ca125SBin Meng depends on HAVE_VBT 575ae3ca125SBin Meng default "vbt.bin" 576ae3ca125SBin Meng help 577ae3ca125SBin Meng The filename of the file to use as Video BIOS Table (VBT) image 578ae3ca125SBin Meng in the board directory. 579ae3ca125SBin Meng 580ae3ca125SBin Mengconfig VBT_ADDR 581ae3ca125SBin Meng hex "Video BIOS Table (VBT) image location" 582ae3ca125SBin Meng depends on HAVE_VBT 583ae3ca125SBin Meng default 0xfff90000 584ae3ca125SBin Meng help 585ae3ca125SBin Meng The location of Video BIOS Table (VBT) image in the SPI flash. For 586ae3ca125SBin Meng example, base address of 0xfff90000 indicates that the image will 587ae3ca125SBin Meng be put at offset 0x90000 from the beginning of a 1MB flash device. 588ae3ca125SBin Meng 5895df91f1cSBin Mengconfig VIDEO_FSP 5905df91f1cSBin Meng bool "Enable FSP framebuffer driver support" 5915df91f1cSBin Meng depends on HAVE_VBT && DM_VIDEO 5925df91f1cSBin Meng help 5935df91f1cSBin Meng Turn on this option to enable a framebuffer driver when U-Boot is 5945df91f1cSBin Meng using Video BIOS Table (VBT) image for FSP firmware to initialize 5955df91f1cSBin Meng the integrated graphics device. 5965df91f1cSBin Meng 597c3df28f6SAndy Shevchenkoconfig ROM_TABLE_ADDR 598c3df28f6SAndy Shevchenko hex 599c3df28f6SAndy Shevchenko default 0xf0000 600c3df28f6SAndy Shevchenko help 601c3df28f6SAndy Shevchenko All x86 tables happen to like the address range from 0x0f0000 602c3df28f6SAndy Shevchenko to 0x100000. We use 0xf0000 as the starting address to store 603c3df28f6SAndy Shevchenko those tables, including PIRQ routing table, Multi-Processor 604c3df28f6SAndy Shevchenko table and ACPI table. 605c3df28f6SAndy Shevchenko 606c3df28f6SAndy Shevchenkoconfig ROM_TABLE_SIZE 607c3df28f6SAndy Shevchenko hex 608c3df28f6SAndy Shevchenko default 0x10000 609c3df28f6SAndy Shevchenko 610b5b6b019SBin Mengmenu "System tables" 6118744bef5SBin Meng depends on !EFI && !SYS_COREBOOT 612b5b6b019SBin Meng 613b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 614b5b6b019SBin Meng bool "Generate a PIRQ table" 615b5b6b019SBin Meng default n 616b5b6b019SBin Meng help 617b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 618b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 619b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 620b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 621b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 622b5b6b019SBin Meng 6236388e357SSimon Glassconfig GENERATE_SFI_TABLE 6246388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 6256388e357SSimon Glass help 6266388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 6276388e357SSimon Glass for platform firmware to pass information to the operating system 6286388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 6296388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 6306388e357SSimon Glass used instead. 6316388e357SSimon Glass 6326388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 6336388e357SSimon Glass the OS. 6346388e357SSimon Glass 6356388e357SSimon Glass For more information, see http://simplefirmware.org 6366388e357SSimon Glass 63707545d86SBin Mengconfig GENERATE_MP_TABLE 63807545d86SBin Meng bool "Generate an MP (Multi-Processor) table" 63907545d86SBin Meng default n 64007545d86SBin Meng help 64107545d86SBin Meng Generate an MP (Multi-Processor) table for this board. The MP table 64207545d86SBin Meng provides a way for the operating system to support for symmetric 64307545d86SBin Meng multiprocessing as well as symmetric I/O interrupt handling with 64407545d86SBin Meng the local APIC and I/O APIC. 64507545d86SBin Meng 646867bcb63SSaket Sinhaconfig GENERATE_ACPI_TABLE 647867bcb63SSaket Sinha bool "Generate an ACPI (Advanced Configuration and Power Interface) table" 648867bcb63SSaket Sinha default n 649fcf5c041SMiao Yan select QFW if QEMU 650867bcb63SSaket Sinha help 651867bcb63SSaket Sinha The Advanced Configuration and Power Interface (ACPI) specification 652867bcb63SSaket Sinha provides an open standard for device configuration and management 653867bcb63SSaket Sinha by the operating system. It defines platform-independent interfaces 654867bcb63SSaket Sinha for configuration and power management monitoring. 655867bcb63SSaket Sinha 656b5b6b019SBin Mengendmenu 657b5b6b019SBin Meng 6584372c111SBin Mengconfig HAVE_ACPI_RESUME 6594372c111SBin Meng bool "Enable ACPI S3 resume" 660aa9c5956SBin Meng select ENABLE_MRC_CACHE 6614372c111SBin Meng help 6624372c111SBin Meng Select this to enable ACPI S3 resume. S3 is an ACPI-defined sleeping 6634372c111SBin Meng state where all system context is lost except system memory. U-Boot 6644372c111SBin Meng is responsible for restoring the machine state as it was before sleep. 6654372c111SBin Meng It needs restore the memory controller, without overwriting memory 6664372c111SBin Meng which is not marked as reserved. For the peripherals which lose their 6674372c111SBin Meng registers, U-Boot needs to write the original value. When everything 6684372c111SBin Meng is done, U-Boot needs to find out the wakeup vector provided by OSes 6694372c111SBin Meng and jump there. 6704372c111SBin Meng 67168769ebcSBin Mengconfig S3_VGA_ROM_RUN 67268769ebcSBin Meng bool "Re-run VGA option ROMs on S3 resume" 67368769ebcSBin Meng depends on HAVE_ACPI_RESUME 67468769ebcSBin Meng help 67568769ebcSBin Meng Execute VGA option ROMs in U-Boot when resuming from S3. Normally 67668769ebcSBin Meng this is needed when graphics console is being used in the kernel. 67768769ebcSBin Meng 67868769ebcSBin Meng Turning it off can reduce some resume time, but be aware that your 67968769ebcSBin Meng graphics console won't work without VGA options ROMs. Set it to N 68068769ebcSBin Meng if your kernel is only on a serial console. 68168769ebcSBin Meng 6827d0d2efeSBin Mengconfig STACK_SIZE 6837d0d2efeSBin Meng hex 6847d0d2efeSBin Meng depends on HAVE_ACPI_RESUME 6857d0d2efeSBin Meng default 0x1000 6867d0d2efeSBin Meng help 6877d0d2efeSBin Meng Estimated U-Boot's runtime stack size that needs to be reserved 6887d0d2efeSBin Meng during an ACPI S3 resume. 6897d0d2efeSBin Meng 690b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 691b5b6b019SBin Meng int 692b5b6b019SBin Meng default 8 693b5b6b019SBin Meng help 694b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 695b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 696b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 697b5b6b019SBin Meng 698b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 699b5b6b019SBin Meng int 700b5b6b019SBin Meng default 128 701b5b6b019SBin Meng help 702b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 703b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 704b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 705b5b6b019SBin Meng change it according to your needs. 706b5b6b019SBin Meng 7072d934e57SSimon Glassconfig PCIE_ECAM_BASE 7082d934e57SSimon Glass hex 7092d934e57SSimon Glass default 0xe0000000 7102d934e57SSimon Glass help 7112d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 7122d934e57SSimon Glass is only available through the Enhanced Configuration Access 7132d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 7142d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 7152d934e57SSimon Glass configuration space through I/O access, but memory access is more 7162d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 7172d934e57SSimon Glass should be set to a region that does not conflict with memory 7182d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 7192d934e57SSimon Glass passed to pci_set_region(). 7202d934e57SSimon Glass 7211ed6648bSBin Mengconfig PCIE_ECAM_SIZE 7221ed6648bSBin Meng hex 7231ed6648bSBin Meng default 0x10000000 7241ed6648bSBin Meng help 7251ed6648bSBin Meng This is the size of memory-mapped address of PCI configuration space, 7261ed6648bSBin Meng which is only available through the Enhanced Configuration Access 7271ed6648bSBin Meng Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, 7281ed6648bSBin Meng so a default 0x10000000 size covers all of the 256 buses which is the 7291ed6648bSBin Meng maximum number of PCI buses as defined by the PCI specification. 7301ed6648bSBin Meng 7311eb39a50SBin Mengconfig I8259_PIC 732*2677a15eSBin Meng bool "Enable Intel 8259 compatible interrupt controller" 7331eb39a50SBin Meng default y 7341eb39a50SBin Meng help 7351eb39a50SBin Meng Intel 8259 ISA compatible chipset incorporates two 8259 (master and 7361eb39a50SBin Meng slave) interrupt controllers. Include this to have U-Boot set up 7371eb39a50SBin Meng the interrupt correctly. 7381eb39a50SBin Meng 739da4cfa6bSHannes Schmelzerconfig APIC 740*2677a15eSBin Meng bool "Enable Intel Advanced Programmable Interrupt Controller" 741da4cfa6bSHannes Schmelzer default y 742da4cfa6bSHannes Schmelzer help 743da4cfa6bSHannes Schmelzer The (A)dvanced (P)rogrammable (I)nterrupt (C)ontroller is responsible 744da4cfa6bSHannes Schmelzer for catching interrupts and distributing them to one or more CPU 745da4cfa6bSHannes Schmelzer cores. In most cases there are some LAPICs (local) for each core and 746da4cfa6bSHannes Schmelzer one I/O APIC. This conjunction is found on most modern x86 systems. 747da4cfa6bSHannes Schmelzer 748fcfc8a82SBin Mengconfig PINCTRL_ICH6 749fcfc8a82SBin Meng bool 750fcfc8a82SBin Meng help 751fcfc8a82SBin Meng Intel ICH6 compatible chipset pinctrl driver. It needs to work 752fcfc8a82SBin Meng together with the ICH6 compatible gpio driver. 753fcfc8a82SBin Meng 7541eb39a50SBin Mengconfig I8254_TIMER 7551eb39a50SBin Meng bool 7561eb39a50SBin Meng default y 7571eb39a50SBin Meng help 7581eb39a50SBin Meng Intel 8254 timer contains three counters which have fixed uses. 7591eb39a50SBin Meng Include this to have U-Boot set up the timer correctly. 7601eb39a50SBin Meng 7613cf23719SBin Mengconfig SEABIOS 7623cf23719SBin Meng bool "Support booting SeaBIOS" 7633cf23719SBin Meng help 7643cf23719SBin Meng SeaBIOS is an open source implementation of a 16-bit X86 BIOS. 7653cf23719SBin Meng It can run in an emulator or natively on X86 hardware with the use 7663cf23719SBin Meng of coreboot/U-Boot. By turning on this option, U-Boot prepares 7673cf23719SBin Meng all the configuration tables that are necessary to boot SeaBIOS. 7683cf23719SBin Meng 7693cf23719SBin Meng Check http://www.seabios.org/SeaBIOS for details. 7703cf23719SBin Meng 771789b6dceSBin Mengconfig HIGH_TABLE_SIZE 772789b6dceSBin Meng hex "Size of configuration tables which reside in high memory" 773789b6dceSBin Meng default 0x10000 774789b6dceSBin Meng depends on SEABIOS 775789b6dceSBin Meng help 776789b6dceSBin Meng SeaBIOS itself resides in E seg and F seg, where U-Boot puts all 777789b6dceSBin Meng configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot 778789b6dceSBin Meng puts a copy of configuration tables in high memory region which 779789b6dceSBin Meng is reserved on the stack before relocation. The region size is 780789b6dceSBin Meng determined by this option. 781789b6dceSBin Meng 782789b6dceSBin Meng Increse it if the default size does not fit the board's needs. 783789b6dceSBin Meng This is most likely due to a large ACPI DSDT table is used. 784789b6dceSBin Meng 785dd84058dSMasahiro Yamadaendmenu 786