1if ARCH_SOCFPGA 2 3config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE 4 default 0xa2 5 6config TARGET_SOCFPGA_ARRIA5 7 bool 8 select TARGET_SOCFPGA_GEN5 9 10config TARGET_SOCFPGA_ARRIA10 11 bool 12 select ALTERA_SDRAM 13 select SPL_BOARD_INIT if SPL 14 select DM_I2C 15 select DM_RESET 16 select SPL_DM_RESET if SPL 17 select REGMAP 18 select SPL_REGMAP if SPL 19 select SYSCON 20 select SPL_SYSCON if SPL 21 select ETH_DESIGNWARE_SOCFPGA 22 23config TARGET_SOCFPGA_CYCLONE5 24 bool 25 select TARGET_SOCFPGA_GEN5 26 27config TARGET_SOCFPGA_GEN5 28 bool 29 select ALTERA_SDRAM 30 31config TARGET_SOCFPGA_STRATIX10 32 bool 33 select ARMV8_MULTIENTRY 34 select ARMV8_SET_SMPEN 35 select ARMV8_SPIN_TABLE 36 37choice 38 prompt "Altera SOCFPGA board select" 39 optional 40 41config TARGET_SOCFPGA_ARRIA10_SOCDK 42 bool "Altera SOCFPGA SoCDK (Arria 10)" 43 select TARGET_SOCFPGA_ARRIA10 44 45config TARGET_SOCFPGA_ARRIA5_SOCDK 46 bool "Altera SOCFPGA SoCDK (Arria V)" 47 select TARGET_SOCFPGA_ARRIA5 48 49config TARGET_SOCFPGA_CYCLONE5_SOCDK 50 bool "Altera SOCFPGA SoCDK (Cyclone V)" 51 select TARGET_SOCFPGA_CYCLONE5 52 53config TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 54 bool "Devboards DBM-SoC1 (Cyclone V)" 55 select TARGET_SOCFPGA_CYCLONE5 56 57config TARGET_SOCFPGA_EBV_SOCRATES 58 bool "EBV SoCrates (Cyclone V)" 59 select TARGET_SOCFPGA_CYCLONE5 60 61config TARGET_SOCFPGA_IS1 62 bool "IS1 (Cyclone V)" 63 select TARGET_SOCFPGA_CYCLONE5 64 65config TARGET_SOCFPGA_SAMTEC_VINING_FPGA 66 bool "samtec VIN|ING FPGA (Cyclone V)" 67 select BOARD_LATE_INIT 68 select TARGET_SOCFPGA_CYCLONE5 69 70config TARGET_SOCFPGA_SR1500 71 bool "SR1500 (Cyclone V)" 72 select TARGET_SOCFPGA_CYCLONE5 73 74config TARGET_SOCFPGA_STRATIX10_SOCDK 75 bool "Intel SOCFPGA SoCDK (Stratix 10)" 76 select TARGET_SOCFPGA_STRATIX10 77 78config TARGET_SOCFPGA_TERASIC_DE0_NANO 79 bool "Terasic DE0-Nano-Atlas (Cyclone V)" 80 select TARGET_SOCFPGA_CYCLONE5 81 82config TARGET_SOCFPGA_TERASIC_DE10_NANO 83 bool "Terasic DE10-Nano (Cyclone V)" 84 select TARGET_SOCFPGA_CYCLONE5 85 86config TARGET_SOCFPGA_TERASIC_DE1_SOC 87 bool "Terasic DE1-SoC (Cyclone V)" 88 select TARGET_SOCFPGA_CYCLONE5 89 90config TARGET_SOCFPGA_TERASIC_SOCKIT 91 bool "Terasic SoCkit (Cyclone V)" 92 select TARGET_SOCFPGA_CYCLONE5 93 94endchoice 95 96config SYS_BOARD 97 default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 98 default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK 99 default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 100 default "dbm-soc1" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 101 default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 102 default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 103 default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 104 default "is1" if TARGET_SOCFPGA_IS1 105 default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 106 default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 107 default "sr1500" if TARGET_SOCFPGA_SR1500 108 default "stratix10-socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK 109 default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 110 111config SYS_VENDOR 112 default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 113 default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK 114 default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 115 default "altera" if TARGET_SOCFPGA_STRATIX10_SOCDK 116 default "devboards" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 117 default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 118 default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 119 default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 120 default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC 121 default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO 122 default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 123 124config SYS_SOC 125 default "socfpga" 126 127config SYS_CONFIG_NAME 128 default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 129 default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK 130 default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 131 default "socfpga_dbm_soc1" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 132 default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 133 default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 134 default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 135 default "socfpga_is1" if TARGET_SOCFPGA_IS1 136 default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 137 default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 138 default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 139 default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK 140 default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 141 142endif 143