xref: /openbmc/u-boot/arch/arm/mach-aspeed/ast2600/cache.c (revision e465bea8ab969792135f1c4fae34ac3bafbc49f0)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) ASPEED Technology Inc.
4  * Chia-Wei Wang <chiawei_wang@aspeedtech.com>
5  */
6 
7 #include <common.h>
8 #include <asm/system.h>
9 
10 DECLARE_GLOBAL_DATA_PTR;
11 
enable_caches(void)12 void enable_caches(void)
13 {
14 #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
15 	enum dcache_option opt = DCACHE_WRITETHROUGH;
16 #else
17 	enum dcache_option opt = DCACHE_WRITEBACK;
18 #endif
19 	/* enable D-cache as well as MMU */
20 	dcache_enable();
21 
22 	/* setup cache attribute for DRAM region */
23 	mmu_set_region_dcache_behaviour(ASPEED_DRAM_BASE,
24 				       gd->ram_size,
25 				       opt);
26 }
27