1// SPDX-License-Identifier: GPL-2.0+ 2/dts-v1/; 3 4#include "ast2600-u-boot.dtsi" 5 6/ { 7 model = "AST2600 GB200NVL BMC"; 8 compatible = "nvidia,gb200nvl-bmc", "aspeed,ast2600"; 9 10 memory { 11 device_type = "memory"; 12 reg = <0x80000000 0x40000000>; 13 }; 14 15 chosen { 16 stdout-path = &uart5; 17 }; 18 19 aliases { 20 mmc0 = &emmc_slot0; 21 mmc1 = &sdhci_slot0; 22 mmc2 = &sdhci_slot1; 23 spi0 = &fmc; 24 spi1 = &spi1; 25 spi2 = &spi2; 26 ethernet0 = &mac0; 27 ethernet1 = &mac1; 28 ethernet2 = &mac2; 29 ethernet3 = &mac3; 30 }; 31 32 cpus { 33 cpu@0 { 34 clock-frequency = <800000000>; 35 }; 36 cpu@1 { 37 clock-frequency = <800000000>; 38 }; 39 }; 40}; 41 42&uart5 { 43 u-boot,dm-pre-reloc; 44 status = "okay"; 45}; 46 47&sdrammc { 48 clock-frequency = <400000000>; 49}; 50 51&wdt1 { 52 status = "okay"; 53}; 54 55&wdt2 { 56 status = "okay"; 57}; 58 59&wdt3 { 60 status = "okay"; 61}; 62 63&fmc { 64 status = "okay"; 65 66 pinctrl-names = "default"; 67 pinctrl-0 = <&pinctrl_fmcquad_default>; 68 69 flash@0 { 70 compatible = "spi-flash", "sst,w25q256"; 71 status = "okay"; 72 spi-max-frequency = <50000000>; 73 spi-tx-bus-width = <4>; 74 spi-rx-bus-width = <4>; 75 }; 76 77 flash@1 { 78 compatible = "spi-flash", "sst,w25q256"; 79 status = "okay"; 80 spi-max-frequency = <50000000>; 81 spi-tx-bus-width = <4>; 82 spi-rx-bus-width = <4>; 83 }; 84 85 flash@2 { 86 compatible = "spi-flash", "sst,w25q256"; 87 status = "okay"; 88 spi-max-frequency = <50000000>; 89 spi-tx-bus-width = <4>; 90 spi-rx-bus-width = <4>; 91 }; 92}; 93 94&spi1 { 95 status = "okay"; 96 num-cs = <1>; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default 99 &pinctrl_spi1cs1_default &pinctrl_spi1wp_default 100 &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; 101 102 flash@0 { 103 compatible = "spi-flash", "sst,w25q256"; 104 status = "okay"; 105 spi-max-frequency = <50000000>; 106 spi-tx-bus-width = <4>; 107 spi-rx-bus-width = <4>; 108 }; 109 110 flash@1 { 111 compatible = "spi-flash", "sst,w25q256"; 112 status = "disabled"; 113 spi-max-frequency = <50000000>; 114 spi-tx-bus-width = <4>; 115 spi-rx-bus-width = <4>; 116 }; 117}; 118 119&spi2 { 120 status = "okay"; 121 pinctrl-names = "default"; 122 pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default 123 &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; 124 num-cs = <1>; 125 flash@0 { 126 compatible = "spi-flash", "sst,w25q256"; 127 status = "okay"; 128 spi-max-frequency = <50000000>; 129 spi-tx-bus-width = <4>; 130 spi-rx-bus-width = <4>; 131 }; 132}; 133 134&i2c4 { 135 status = "okay"; 136 pinctrl-names = "default"; 137 pinctrl-0 = <&pinctrl_i2c5_default>; 138}; 139 140&i2c5 { 141 status = "okay"; 142 pinctrl-names = "default"; 143 pinctrl-0 = <&pinctrl_i2c6_default>; 144}; 145 146&i2c6 { 147 status = "okay"; 148 pinctrl-names = "default"; 149 pinctrl-0 = <&pinctrl_i2c7_default>; 150}; 151 152&i2c7 { 153 status = "okay"; 154 pinctrl-names = "default"; 155 pinctrl-0 = <&pinctrl_i2c8_default>; 156}; 157 158&i2c8 { 159 status = "okay"; 160 pinctrl-names = "default"; 161 pinctrl-0 = <&pinctrl_i2c9_default>; 162}; 163 164&i2c10 { 165 status = "okay"; 166 pinctrl-names = "default"; 167 pinctrl-0 = <&pinctrl_i2c11_default>; 168}; 169 170&pcie_phy1 { 171 status = "okay"; 172}; 173 174&pcie_bridge { 175 status = "okay"; 176}; 177 178&ehci1 { 179 status = "okay"; 180}; 181 182&scu { 183 mac0-clk-delay = <0x10 0x0a 184 0x10 0x10 185 0x10 0x10>; 186 mac1-clk-delay = <0x10 0x0a 187 0x10 0x10 188 0x10 0x10>; 189 mac2-clk-delay = <0x08 0x04 190 0x08 0x04 191 0x08 0x04>; 192 mac3-clk-delay = <0x08 0x04 193 0x08 0x04 194 0x08 0x04>; 195}; 196 197&hace { 198 u-boot,dm-pre-reloc; 199 status = "okay"; 200}; 201 202&acry { 203 u-boot,dm-pre-reloc; 204 status = "okay"; 205}; 206 207&display_port { 208 status = "okay"; 209}; 210