13ebdd119Saurel32 /*
23ebdd119Saurel32 NetWinder Floating Point Emulator
33ebdd119Saurel32 (c) Rebel.COM, 1998,1999
43ebdd119Saurel32
53ebdd119Saurel32 Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
63ebdd119Saurel32
73ebdd119Saurel32 This program is free software; you can redistribute it and/or modify
83ebdd119Saurel32 it under the terms of the GNU General Public License as published by
93ebdd119Saurel32 the Free Software Foundation; either version 2 of the License, or
103ebdd119Saurel32 (at your option) any later version.
113ebdd119Saurel32
123ebdd119Saurel32 This program is distributed in the hope that it will be useful,
133ebdd119Saurel32 but WITHOUT ANY WARRANTY; without even the implied warranty of
143ebdd119Saurel32 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
153ebdd119Saurel32 GNU General Public License for more details.
163ebdd119Saurel32
173ebdd119Saurel32 You should have received a copy of the GNU General Public License
1870539e18SBlue Swirl along with this program; if not, see <http://www.gnu.org/licenses/>.
193ebdd119Saurel32 */
203ebdd119Saurel32
21d39594e9SPeter Maydell #include "qemu/osdep.h"
223ebdd119Saurel32 #include "fpa11.h"
233ebdd119Saurel32
243ebdd119Saurel32 #include "fpopcode.h"
253ebdd119Saurel32
263ebdd119Saurel32 //#include "fpmodule.h"
273ebdd119Saurel32 //#include "fpmodule.inl"
283ebdd119Saurel32
293ebdd119Saurel32 //#include <asm/system.h>
303ebdd119Saurel32
313ebdd119Saurel32
32b9d38e95SBlue Swirl FPA11* qemufpa = NULL;
333ebdd119Saurel32 CPUARMState* user_registers;
343ebdd119Saurel32
353ebdd119Saurel32 /* Reset the FPA11 chip. Called to initialize and reset the emulator. */
resetFPA11(void)363ebdd119Saurel32 void resetFPA11(void)
373ebdd119Saurel32 {
383ebdd119Saurel32 int i;
393ebdd119Saurel32 FPA11 *fpa11 = GET_FPA11();
403ebdd119Saurel32
413ebdd119Saurel32 /* initialize the register type array */
423ebdd119Saurel32 for (i=0;i<=7;i++)
433ebdd119Saurel32 {
443ebdd119Saurel32 fpa11->fType[i] = typeNone;
453ebdd119Saurel32 }
463ebdd119Saurel32
473ebdd119Saurel32 /* FPSR: set system id to FP_EMULATOR, set AC, clear all other bits */
483ebdd119Saurel32 fpa11->fpsr = FP_EMULATOR | BIT_AC;
493ebdd119Saurel32
503ebdd119Saurel32 /* FPCR: set SB, AB and DA bits, clear all others */
51eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
523ebdd119Saurel32 fpa11->fpcr = MASK_RESET;
533ebdd119Saurel32 #endif
54*d1ff9967SPeter Maydell
55*d1ff9967SPeter Maydell /*
56*d1ff9967SPeter Maydell * Real FPA11 hardware does not handle NaNs, but always takes an
57*d1ff9967SPeter Maydell * exception for them to be software-emulated (ARM7500FE datasheet
58*d1ff9967SPeter Maydell * section 10.4). There is no documented architectural requirement
59*d1ff9967SPeter Maydell * for NaN propagation rules and it will depend on how the OS
60*d1ff9967SPeter Maydell * level software emulation opted to do it. We here use prop_s_ab
61*d1ff9967SPeter Maydell * which matches the later VFP hardware choice and how QEMU's
62*d1ff9967SPeter Maydell * fpa11 emulation has worked in the past. The real Linux kernel
63*d1ff9967SPeter Maydell * does something slightly different: arch/arm/nwfpe/softfloat-specialize
64*d1ff9967SPeter Maydell * propagateFloat64NaN() has the curious behaviour that it prefers
65*d1ff9967SPeter Maydell * the QNaN over the SNaN, but if both are QNaN it picks A and
66*d1ff9967SPeter Maydell * if both are SNaN it picks B. In theory we could add this as
67*d1ff9967SPeter Maydell * a NaN propagation rule, but in practice FPA11 emulation is so
68*d1ff9967SPeter Maydell * close to totally dead that it's not worth trying to match it at
69*d1ff9967SPeter Maydell * this late date.
70*d1ff9967SPeter Maydell */
71*d1ff9967SPeter Maydell set_float_2nan_prop_rule(float_2nan_prop_s_ab, &fpa11->fp_status);
723ebdd119Saurel32 }
733ebdd119Saurel32
SetRoundingMode(const unsigned int opcode)743ebdd119Saurel32 void SetRoundingMode(const unsigned int opcode)
753ebdd119Saurel32 {
763ebdd119Saurel32 int rounding_mode;
773ebdd119Saurel32 FPA11 *fpa11 = GET_FPA11();
783ebdd119Saurel32
79eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
803ebdd119Saurel32 fpa11->fpcr &= ~MASK_ROUNDING_MODE;
813ebdd119Saurel32 #endif
823ebdd119Saurel32 switch (opcode & MASK_ROUNDING_MODE)
833ebdd119Saurel32 {
843ebdd119Saurel32 default:
853ebdd119Saurel32 case ROUND_TO_NEAREST:
863ebdd119Saurel32 rounding_mode = float_round_nearest_even;
87eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
883ebdd119Saurel32 fpa11->fpcr |= ROUND_TO_NEAREST;
893ebdd119Saurel32 #endif
903ebdd119Saurel32 break;
913ebdd119Saurel32
923ebdd119Saurel32 case ROUND_TO_PLUS_INFINITY:
933ebdd119Saurel32 rounding_mode = float_round_up;
94eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
953ebdd119Saurel32 fpa11->fpcr |= ROUND_TO_PLUS_INFINITY;
963ebdd119Saurel32 #endif
973ebdd119Saurel32 break;
983ebdd119Saurel32
993ebdd119Saurel32 case ROUND_TO_MINUS_INFINITY:
1003ebdd119Saurel32 rounding_mode = float_round_down;
101eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
1023ebdd119Saurel32 fpa11->fpcr |= ROUND_TO_MINUS_INFINITY;
1033ebdd119Saurel32 #endif
1043ebdd119Saurel32 break;
1053ebdd119Saurel32
1063ebdd119Saurel32 case ROUND_TO_ZERO:
1073ebdd119Saurel32 rounding_mode = float_round_to_zero;
108eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
1093ebdd119Saurel32 fpa11->fpcr |= ROUND_TO_ZERO;
1103ebdd119Saurel32 #endif
1113ebdd119Saurel32 break;
1123ebdd119Saurel32 }
1133ebdd119Saurel32 set_float_rounding_mode(rounding_mode, &fpa11->fp_status);
1143ebdd119Saurel32 }
1153ebdd119Saurel32
SetRoundingPrecision(const unsigned int opcode)1163ebdd119Saurel32 void SetRoundingPrecision(const unsigned int opcode)
1173ebdd119Saurel32 {
1188da5f1dbSRichard Henderson FloatX80RoundPrec rounding_precision;
1193ebdd119Saurel32 FPA11 *fpa11 = GET_FPA11();
120eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
1213ebdd119Saurel32 fpa11->fpcr &= ~MASK_ROUNDING_PRECISION;
1223ebdd119Saurel32 #endif
1238da5f1dbSRichard Henderson switch (opcode & MASK_ROUNDING_PRECISION) {
1243ebdd119Saurel32 case ROUND_SINGLE:
1258da5f1dbSRichard Henderson rounding_precision = floatx80_precision_s;
126eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
1273ebdd119Saurel32 fpa11->fpcr |= ROUND_SINGLE;
1283ebdd119Saurel32 #endif
1293ebdd119Saurel32 break;
1303ebdd119Saurel32
1313ebdd119Saurel32 case ROUND_DOUBLE:
1328da5f1dbSRichard Henderson rounding_precision = floatx80_precision_d;
133eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
1343ebdd119Saurel32 fpa11->fpcr |= ROUND_DOUBLE;
1353ebdd119Saurel32 #endif
1363ebdd119Saurel32 break;
1373ebdd119Saurel32
1383ebdd119Saurel32 case ROUND_EXTENDED:
1398da5f1dbSRichard Henderson rounding_precision = floatx80_precision_x;
140eb38c52cSblueswir1 #ifdef MAINTAIN_FPCR
1413ebdd119Saurel32 fpa11->fpcr |= ROUND_EXTENDED;
1423ebdd119Saurel32 #endif
1433ebdd119Saurel32 break;
1443ebdd119Saurel32
1458da5f1dbSRichard Henderson default:
1468da5f1dbSRichard Henderson rounding_precision = floatx80_precision_x;
1478da5f1dbSRichard Henderson break;
1483ebdd119Saurel32 }
1493ebdd119Saurel32 set_floatx80_rounding_precision(rounding_precision, &fpa11->fp_status);
1503ebdd119Saurel32 }
1513ebdd119Saurel32
1523ebdd119Saurel32 /* Emulate the instruction in the opcode. */
1533ebdd119Saurel32 /* ??? This is not thread safe. */
EmulateAll(unsigned int opcode,FPA11 * qfpa,CPUARMState * qregs)1543ebdd119Saurel32 unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs)
1553ebdd119Saurel32 {
1563ebdd119Saurel32 unsigned int nRc = 0;
1573ebdd119Saurel32 // unsigned long flags;
1583ebdd119Saurel32 FPA11 *fpa11;
15957964855SPeter Maydell unsigned int cp;
1603ebdd119Saurel32 // save_flags(flags); sti();
1613ebdd119Saurel32
16257964855SPeter Maydell /* Check that this is really an FPA11 instruction: the coprocessor
16357964855SPeter Maydell * field in bits [11:8] must be 1 or 2.
16457964855SPeter Maydell */
16557964855SPeter Maydell cp = (opcode >> 8) & 0xf;
16657964855SPeter Maydell if (cp != 1 && cp != 2) {
16757964855SPeter Maydell return 0;
16857964855SPeter Maydell }
16957964855SPeter Maydell
1703ebdd119Saurel32 qemufpa=qfpa;
1713ebdd119Saurel32 user_registers=qregs;
1723ebdd119Saurel32
1733ebdd119Saurel32 #if 0
1743ebdd119Saurel32 fprintf(stderr,"emulating FP insn 0x%08x, PC=0x%08x\n",
1757cb4db8fSPeter Maydell opcode, qregs[ARM_REG_PC]);
1763ebdd119Saurel32 #endif
1773ebdd119Saurel32 fpa11 = GET_FPA11();
1783ebdd119Saurel32
1793ebdd119Saurel32 if (fpa11->initflag == 0) /* good place for __builtin_expect */
1803ebdd119Saurel32 {
1813ebdd119Saurel32 resetFPA11();
1823ebdd119Saurel32 SetRoundingMode(ROUND_TO_NEAREST);
1833ebdd119Saurel32 SetRoundingPrecision(ROUND_EXTENDED);
1843ebdd119Saurel32 fpa11->initflag = 1;
1853ebdd119Saurel32 }
1863ebdd119Saurel32
1873ebdd119Saurel32 set_float_exception_flags(0, &fpa11->fp_status);
1883ebdd119Saurel32
1893ebdd119Saurel32 if (TEST_OPCODE(opcode,MASK_CPRT))
1903ebdd119Saurel32 {
1913ebdd119Saurel32 //fprintf(stderr,"emulating CPRT\n");
1923ebdd119Saurel32 /* Emulate conversion opcodes. */
1933ebdd119Saurel32 /* Emulate register transfer opcodes. */
1943ebdd119Saurel32 /* Emulate comparison opcodes. */
1953ebdd119Saurel32 nRc = EmulateCPRT(opcode);
1963ebdd119Saurel32 }
1973ebdd119Saurel32 else if (TEST_OPCODE(opcode,MASK_CPDO))
1983ebdd119Saurel32 {
1993ebdd119Saurel32 //fprintf(stderr,"emulating CPDO\n");
2003ebdd119Saurel32 /* Emulate monadic arithmetic opcodes. */
2013ebdd119Saurel32 /* Emulate dyadic arithmetic opcodes. */
2023ebdd119Saurel32 nRc = EmulateCPDO(opcode);
2033ebdd119Saurel32 }
2043ebdd119Saurel32 else if (TEST_OPCODE(opcode,MASK_CPDT))
2053ebdd119Saurel32 {
2063ebdd119Saurel32 //fprintf(stderr,"emulating CPDT\n");
2073ebdd119Saurel32 /* Emulate load/store opcodes. */
2083ebdd119Saurel32 /* Emulate load/store multiple opcodes. */
2093ebdd119Saurel32 nRc = EmulateCPDT(opcode);
2103ebdd119Saurel32 }
2113ebdd119Saurel32 else
2123ebdd119Saurel32 {
2133ebdd119Saurel32 /* Invalid instruction detected. Return FALSE. */
2143ebdd119Saurel32 nRc = 0;
2153ebdd119Saurel32 }
2163ebdd119Saurel32
2173ebdd119Saurel32 // restore_flags(flags);
2183ebdd119Saurel32 if(nRc == 1 && get_float_exception_flags(&fpa11->fp_status))
2193ebdd119Saurel32 {
2203ebdd119Saurel32 //printf("fef 0x%x\n",float_exception_flags);
22122e41040SMichael S. Tsirkin nRc = -get_float_exception_flags(&fpa11->fp_status);
2223ebdd119Saurel32 }
2233ebdd119Saurel32
2243ebdd119Saurel32 //printf("returning %d\n",nRc);
2253ebdd119Saurel32 return(nRc);
2263ebdd119Saurel32 }
2273ebdd119Saurel32
2283ebdd119Saurel32 #if 0
2293ebdd119Saurel32 unsigned int EmulateAll1(unsigned int opcode)
2303ebdd119Saurel32 {
2313ebdd119Saurel32 switch ((opcode >> 24) & 0xf)
2323ebdd119Saurel32 {
2333ebdd119Saurel32 case 0xc:
2343ebdd119Saurel32 case 0xd:
2353ebdd119Saurel32 if ((opcode >> 20) & 0x1)
2363ebdd119Saurel32 {
2373ebdd119Saurel32 switch ((opcode >> 8) & 0xf)
2383ebdd119Saurel32 {
2393ebdd119Saurel32 case 0x1: return PerformLDF(opcode); break;
2403ebdd119Saurel32 case 0x2: return PerformLFM(opcode); break;
2413ebdd119Saurel32 default: return 0;
2423ebdd119Saurel32 }
2433ebdd119Saurel32 }
2443ebdd119Saurel32 else
2453ebdd119Saurel32 {
2463ebdd119Saurel32 switch ((opcode >> 8) & 0xf)
2473ebdd119Saurel32 {
2483ebdd119Saurel32 case 0x1: return PerformSTF(opcode); break;
2493ebdd119Saurel32 case 0x2: return PerformSFM(opcode); break;
2503ebdd119Saurel32 default: return 0;
2513ebdd119Saurel32 }
2523ebdd119Saurel32 }
2533ebdd119Saurel32 break;
2543ebdd119Saurel32
2553ebdd119Saurel32 case 0xe:
2563ebdd119Saurel32 if (opcode & 0x10)
2573ebdd119Saurel32 return EmulateCPDO(opcode);
2583ebdd119Saurel32 else
2593ebdd119Saurel32 return EmulateCPRT(opcode);
2603ebdd119Saurel32 break;
2613ebdd119Saurel32
2623ebdd119Saurel32 default: return 0;
2633ebdd119Saurel32 }
2643ebdd119Saurel32 }
2653ebdd119Saurel32 #endif
266