Merge tag 'pull-target-arm-20241105' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
* Fix MMU indexes for AArch32 Secure PL1&0 in a less complex and buggy way
*

Merge tag 'pull-target-arm-20241105' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
* Fix MMU indexes for AArch32 Secure PL1&0 in a less complex and buggy way
* Fix SVE SDOT/UDOT/USDOT (4-way, indexed)
* softfloat: set 2-operand NaN propagation rule at runtime
* disas: Fix build against Capstone v6 (again)
* hw/rtc/ds1338: Trace send and receive operations
* hw/timer/imx_gpt: Convert DPRINTF to trace events
* hw/watchdog/wdt_imx2: Remove redundant assignment
* hw/sensor/tmp105: Convert printf() to trace event, add tracing for read/write access
* hw/net/npcm_gmac: Change error log to trace event
* target/arm: Enable FEAT_CMOW for -cpu max

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# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 05 Nov 2024 11:19:06 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20241105' of https://git.linaro.org/people/pmaydell/qemu-arm: (31 commits)
target/arm: Enable FEAT_CMOW for -cpu max
hw/net/npcm_gmac: Change error log to trace event
hw/sensor/tmp105: Convert printf() to trace event, add tracing for read/write access
hw/watchdog/wdt_imx2: Remove redundant assignment
hw/timer/imx_gpt: Convert DPRINTF to trace events
hw/rtc/ds1338: Trace send and receive operations
disas: Fix build against Capstone v6 (again)
target/arm: Fix SVE SDOT/UDOT/USDOT (4-way, indexed)
target/arm: Add new MMU indexes for AArch32 Secure PL1&0
Revert "target/arm: Fix usage of MMU indexes when EL3 is AArch32"
softfloat: Remove fallback rule from pickNaN()
target/rx: Explicitly set 2-NaN propagation rule
target/openrisc: Explicitly set 2-NaN propagation rule
target/microblaze: Explicitly set 2-NaN propagation rule
target/microblaze: Move setting of float rounding mode to reset
target/alpha: Explicitly set 2-NaN propagation rule
target/i386: Set 2-NaN propagation rule explicitly
target/xtensa: Explicitly set 2-NaN propagation rule
target/xtensa: Factor out calls to set_use_first_nan()
target/sparc: Explicitly set 2-NaN propagation rule
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

target/arm: Explicitly set 2-NaN propagation rule

Set the 2-NaN propagation rule explicitly in the float_status words
we use. We wrap this plus the pre-existing setting of the
tininess-before-round

target/arm: Explicitly set 2-NaN propagation rule

Set the 2-NaN propagation rule explicitly in the float_status words
we use. We wrap this plus the pre-existing setting of the
tininess-before-rounding flag in a new function
arm_set_default_fp_behaviours() to avoid repetition, since we have a
lot of float_status words at this point.

The situation with FPA11 emulation in linux-user is a little odd, and
arguably "correct" behaviour there would be to exactly match a real
Linux kernel's FPA11 emulation. However FPA11 emulation is
essentially dead at this point and so it seems better to continue
with QEMU's current behaviour and leave a comment describing the
situation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241025141254.2141506-4-peter.maydell@linaro.org

show more ...

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-fpu-20210603' into staging

Finish conversion of float128 and floatx80 to FloatParts.
Implement float128_muladd and float128_{min,max}*.
Opt

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-fpu-20210603' into staging

Finish conversion of float128 and floatx80 to FloatParts.
Implement float128_muladd and float128_{min,max}*.
Optimize int-to-float conversion with hard-float.

# gpg: Signature made Thu 03 Jun 2021 22:13:10 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-fpu-20210603: (29 commits)
softfloat: Use hard-float for {u}int64_to_float{32,64}
tests/fp: Enable more tests
softfloat: Convert modrem operations to FloatParts
softfloat: Move floatN_log2 to softfloat-parts.c.inc
softfloat: Convert float32_exp2 to FloatParts
softfloat: Convert floatx80 compare to FloatParts
softfloat: Convert floatx80_scalbn to FloatParts
softfloat: Convert floatx80 to integer to FloatParts
softfloat: Convert floatx80 float conversions to FloatParts
softfloat: Convert integer to floatx80 to FloatParts
softfloat: Convert floatx80_round_to_int to FloatParts
softfloat: Convert floatx80_round to FloatParts
softfloat: Convert floatx80_sqrt to FloatParts
softfloat: Convert floatx80_div to FloatParts
softfloat: Convert floatx80_mul to FloatParts
softfloat: Convert floatx80_add/sub to FloatParts
tests/fp/fp-test: Reverse order of floatx80 precision tests
softfloat: Adjust parts_uncanon_normal for floatx80
softfloat: Introduce Floatx80RoundPrec
softfloat: Reduce FloatFmt
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

softfloat: Introduce Floatx80RoundPrec

Use an enumeration instead of raw 32/64/80 values.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linar

softfloat: Introduce Floatx80RoundPrec

Use an enumeration instead of raw 32/64/80 values.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'origin/master' into HEAD

Resolve conflicts around apb.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180111' into staging

target-arm queue:
* add aarch64_be linux-user target
* Virt: ACPI: fix qemu assert due to re-assigned tab

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180111' into staging

target-arm queue:
* add aarch64_be linux-user target
* Virt: ACPI: fix qemu assert due to re-assigned table data address
* imx_fec: various bug fixes and cleanups
* hw/timer/pxa2xx_timer: replace hw_error() -> qemu_log_mask()
* hw/sd/pxa2xx_mmci: add read/write() trace events
* linux-user/arm/nwfpe: Check coprocessor number for FPA emulation
* target/arm: Make disas_thumb2_insn() generate its own UNDEF exceptions
* hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI
* hw/intc/arm_gic: reserved register addresses are RAZ/WI

# gpg: Signature made Thu 11 Jan 2018 13:37:25 GMT
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180111: (26 commits)
hw/intc/arm_gic: reserved register addresses are RAZ/WI
hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI
target/arm: Make disas_thumb2_insn() generate its own UNDEF exceptions
linux-user/arm/nwfpe: Check coprocessor number for FPA emulation
hw/sd/pxa2xx_mmci: add read/write() trace events
hw/timer/pxa2xx_timer: replace hw_error() -> qemu_log_mask()
imx_fec: Reserve full FSL_IMX25_FEC_SIZE page for the register file
imx_fec: Fix a typo in imx_enet_receive()
imx_fec: Use correct length for packet size
imx_fec: Add support for multiple Tx DMA rings
imx_fec: Emulate SHIFT16 in ENETx_RACC
imx_fec: Use MIN instead of explicit ternary operator
imx_fec: Use ENET_FTRL to determine truncation length
imx_fec: Move Tx frame buffer away from the stack
imx_fec: Change queue flushing heuristics
imx_fec: Refactor imx_eth_enable_rx()
imx_fec: Do not link to netdev
Virt: ACPI: fix qemu assert due to re-assigned table data address
target/arm: Fix stlxp for aarch64_be
linux-user: Activate armeb handler registration
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user/arm/nwfpe: Check coprocessor number for FPA emulation

Our copy of the nwfpe code for emulating of the old FPA11 floating
point unit doesn't check the coprocessor number in the instruction

linux-user/arm/nwfpe: Check coprocessor number for FPA emulation

Our copy of the nwfpe code for emulating of the old FPA11 floating
point unit doesn't check the coprocessor number in the instruction
when it emulates it. This means that we might treat some
instructions which should really UNDEF as being FPA11 instructions by
accident.

The kernel's copy of the nwfpe code doesn't make this error; I suspect
the bug was noticed and fixed as part of the process of mainlining
the nwfpe code more than a decade ago.

Add a check that the coprocessor number (which is always in bits
[11:8] of the instruction) is either 1 or 2, which is where the
FPA11 lives.

Reported-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user: Clean up includes

Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Signe

linux-user: Clean up includes

Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1453832250-766-10-git-send-email-peter.maydell@linaro.org

show more ...

Merge remote branch 'origin/master' into pci

Conflicts:
exec.c

linux-user/arm/nwfpe: rename REG_PC to ARM_REG_PC

The REG_PC constant used in the ARM nwfpe code is fine in the kernel
but when used in qemu can clash with a definition in the host system
include fi

linux-user/arm/nwfpe: rename REG_PC to ARM_REG_PC

The REG_PC constant used in the ARM nwfpe code is fine in the kernel
but when used in qemu can clash with a definition in the host system
include files (in particular on Ubuntu Lucid SPARC, including signal.h
will define a REG_PC). Rename the constant to avoid this issue.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

show more ...

Update to a hopefully more future proof FSF address

See also 8167ee883931cb20c6264fc19d040ce2dc6ceaaa,
530e7615ce3c01882e582c84dc6304ab98a3d5c5 and
fad6cb1a565bb73f83fc0e2654489457b489e436.

Signed-

Update to a hopefully more future proof FSF address

See also 8167ee883931cb20c6264fc19d040ce2dc6ceaaa,
530e7615ce3c01882e582c84dc6304ab98a3d5c5 and
fad6cb1a565bb73f83fc0e2654489457b489e436.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

show more ...

linux-user: fix up oversealous nitpicking

Looks like linux-user code was correct, just unreadable: what it wanted
to do with "-=" was really assign a negative number, not decrement. Fix
up accordin

linux-user: fix up oversealous nitpicking

Looks like linux-user code was correct, just unreadable: what it wanted
to do with "-=" was really assign a negative number, not decrement. Fix
up accordingly.

Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

show more ...

linux-user: fix old style decrement usage

Modern compilers do not parse "=-" as decrement:
you must use "-=" for that.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Blue Swirl <

linux-user: fix old style decrement usage

Modern compilers do not parse "=-" as decrement:
you must use "-=" for that.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

show more ...

Fix Sparse warnings about using plain integer as NULL pointer

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

Fix compiler warnings in nwfpe code.

Signed-off-by: Paul Brook <paul@codesourcery.com>

Remove unnecessary trailing newlines

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162

Fix most warnings that would be caused by gcc flag -Wundef

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5173 c046a42c-6fe2-441c-8c8c-71466251a162

Move target-arm/nwfpe into linux-user/arm/nwfpe



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4185 c046a42c-6fe2-441c-8c8c-71466251a162