1 /* 2 * QEMU HPPA hardware system emulator. 3 * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de> 4 * 5 * This work is licensed under the GNU GPL license version 2 or later. 6 */ 7 8 #include "qemu/osdep.h" 9 #include "qemu/datadir.h" 10 #include "cpu.h" 11 #include "elf.h" 12 #include "hw/loader.h" 13 #include "qemu/error-report.h" 14 #include "sysemu/reset.h" 15 #include "sysemu/sysemu.h" 16 #include "sysemu/runstate.h" 17 #include "hw/rtc/mc146818rtc.h" 18 #include "hw/timer/i8254.h" 19 #include "hw/char/serial.h" 20 #include "hw/char/parallel.h" 21 #include "hw/intc/i8259.h" 22 #include "hw/input/lasips2.h" 23 #include "hw/net/lasi_82596.h" 24 #include "hw/nmi.h" 25 #include "hw/pci/pci.h" 26 #include "hw/pci/pci_device.h" 27 #include "hw/pci-host/dino.h" 28 #include "hw/misc/lasi.h" 29 #include "hppa_hardware.h" 30 #include "qemu/units.h" 31 #include "qapi/error.h" 32 #include "net/net.h" 33 #include "qemu/log.h" 34 35 #define MIN_SEABIOS_HPPA_VERSION 10 /* require at least this fw version */ 36 37 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 38 39 #define enable_lasi_lan() 0 40 41 static DeviceState *lasi_dev; 42 43 static void hppa_powerdown_req(Notifier *n, void *opaque) 44 { 45 hwaddr soft_power_reg = HPA_POWER_BUTTON; 46 uint32_t val; 47 48 val = ldl_be_phys(&address_space_memory, soft_power_reg); 49 if ((val >> 8) == 0) { 50 /* immediately shut down when under hardware control */ 51 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 52 return; 53 } 54 55 /* clear bit 31 to indicate that the power switch was pressed. */ 56 val &= ~1; 57 stl_be_phys(&address_space_memory, soft_power_reg, val); 58 } 59 60 static Notifier hppa_system_powerdown_notifier = { 61 .notify = hppa_powerdown_req 62 }; 63 64 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ 65 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) 66 { 67 return 0; 68 } 69 70 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) 71 { 72 } 73 74 static const MemoryRegionOps hppa_pci_ignore_ops = { 75 .read = ignore_read, 76 .write = ignore_write, 77 .endianness = DEVICE_BIG_ENDIAN, 78 .valid = { 79 .min_access_size = 1, 80 .max_access_size = 8, 81 }, 82 .impl = { 83 .min_access_size = 1, 84 .max_access_size = 8, 85 }, 86 }; 87 88 static ISABus *hppa_isa_bus(void) 89 { 90 ISABus *isa_bus; 91 qemu_irq *isa_irqs; 92 MemoryRegion *isa_region; 93 94 isa_region = g_new(MemoryRegion, 1); 95 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 96 NULL, "isa-io", 0x800); 97 memory_region_add_subregion(get_system_memory(), IDE_HPA, 98 isa_region); 99 100 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 101 &error_abort); 102 isa_irqs = i8259_init(isa_bus, NULL); 103 isa_bus_register_input_irqs(isa_bus, isa_irqs); 104 105 return isa_bus; 106 } 107 108 /* 109 * Helper functions to emulate RTC clock and DebugOutputPort 110 */ 111 static time_t rtc_ref; 112 113 static uint64_t io_cpu_read(void *opaque, hwaddr addr, unsigned size) 114 { 115 uint64_t val = 0; 116 117 switch (addr) { 118 case 0: /* RTC clock */ 119 val = time(NULL); 120 val += rtc_ref; 121 break; 122 case 8: /* DebugOutputPort */ 123 return 0xe9; /* readback */ 124 } 125 return val; 126 } 127 128 static void io_cpu_write(void *opaque, hwaddr addr, 129 uint64_t val, unsigned size) 130 { 131 unsigned char ch; 132 Chardev *debugout; 133 134 switch (addr) { 135 case 0: /* RTC clock */ 136 rtc_ref = val - time(NULL); 137 break; 138 case 8: /* DebugOutputPort */ 139 ch = val; 140 debugout = serial_hd(0); 141 if (debugout) { 142 qemu_chr_fe_write_all(debugout->be, &ch, 1); 143 } else { 144 fprintf(stderr, "%c", ch); 145 } 146 break; 147 } 148 } 149 150 static const MemoryRegionOps hppa_io_helper_ops = { 151 .read = io_cpu_read, 152 .write = io_cpu_write, 153 .endianness = DEVICE_BIG_ENDIAN, 154 .valid = { 155 .min_access_size = 1, 156 .max_access_size = 8, 157 }, 158 .impl = { 159 .min_access_size = 1, 160 .max_access_size = 8, 161 }, 162 }; 163 164 165 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr) 166 { 167 addr &= (0x10000000 - 1); 168 return addr; 169 } 170 171 static HPPACPU *cpu[HPPA_MAX_CPUS]; 172 static uint64_t firmware_entry; 173 174 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 175 Error **errp) 176 { 177 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 178 } 179 180 static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus) 181 { 182 FWCfgState *fw_cfg; 183 uint64_t val; 184 const char qemu_version[] = QEMU_VERSION; 185 MachineClass *mc = MACHINE_GET_CLASS(ms); 186 int len; 187 188 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); 189 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 190 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 191 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 192 193 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 194 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 195 g_memdup(&val, sizeof(val)), sizeof(val)); 196 197 val = cpu_to_le64(HPPA_TLB_ENTRIES - HPPA_BTLB_ENTRIES); 198 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 199 g_memdup(&val, sizeof(val)), sizeof(val)); 200 201 val = cpu_to_le64(HPPA_BTLB_ENTRIES); 202 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 203 g_memdup(&val, sizeof(val)), sizeof(val)); 204 205 len = strlen(mc->name) + 1; 206 fw_cfg_add_file(fw_cfg, "/etc/hppa/machine", 207 g_memdup(mc->name, len), len); 208 209 val = cpu_to_le64(HPA_POWER_BUTTON); 210 fw_cfg_add_file(fw_cfg, "/etc/hppa/power-button-addr", 211 g_memdup(&val, sizeof(val)), sizeof(val)); 212 213 val = cpu_to_le64(CPU_HPA + 16); 214 fw_cfg_add_file(fw_cfg, "/etc/hppa/rtc-addr", 215 g_memdup(&val, sizeof(val)), sizeof(val)); 216 217 val = cpu_to_le64(CPU_HPA + 24); 218 fw_cfg_add_file(fw_cfg, "/etc/hppa/DebugOutputPort", 219 g_memdup(&val, sizeof(val)), sizeof(val)); 220 221 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); 222 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 223 224 fw_cfg_add_file(fw_cfg, "/etc/qemu-version", 225 g_memdup(qemu_version, sizeof(qemu_version)), 226 sizeof(qemu_version)); 227 228 fw_cfg_add_extra_pci_roots(pci_bus, fw_cfg); 229 230 return fw_cfg; 231 } 232 233 static LasiState *lasi_init(void) 234 { 235 DeviceState *dev; 236 237 dev = qdev_new(TYPE_LASI_CHIP); 238 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 239 240 return LASI_CHIP(dev); 241 } 242 243 static DinoState *dino_init(MemoryRegion *addr_space) 244 { 245 DeviceState *dev; 246 247 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); 248 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), 249 &error_fatal); 250 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 251 252 return DINO_PCI_HOST_BRIDGE(dev); 253 } 254 255 /* 256 * Step 1: Create CPUs and Memory 257 */ 258 static void machine_HP_common_init_cpus(MachineState *machine) 259 { 260 MemoryRegion *addr_space = get_system_memory(); 261 MemoryRegion *cpu_region; 262 long i; 263 unsigned int smp_cpus = machine->smp.cpus; 264 char *name; 265 266 /* Create CPUs. */ 267 for (i = 0; i < smp_cpus; i++) { 268 name = g_strdup_printf("cpu%ld-io-eir", i); 269 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 270 271 cpu_region = g_new(MemoryRegion, 1); 272 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 273 cpu[i], name, 4); 274 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, 275 cpu_region); 276 g_free(name); 277 } 278 279 /* RTC and DebugOutputPort on CPU #0 */ 280 cpu_region = g_new(MemoryRegion, 1); 281 memory_region_init_io(cpu_region, OBJECT(cpu[0]), &hppa_io_helper_ops, 282 cpu[0], "cpu0-io-rtc", 2 * sizeof(uint64_t)); 283 memory_region_add_subregion(addr_space, CPU_HPA + 16, cpu_region); 284 285 /* Main memory region. */ 286 if (machine->ram_size > 3 * GiB) { 287 error_report("RAM size is currently restricted to 3GB"); 288 exit(EXIT_FAILURE); 289 } 290 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 291 } 292 293 /* 294 * Last creation step: Add SCSI discs, NICs, graphics & load firmware 295 */ 296 static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus) 297 { 298 const char *kernel_filename = machine->kernel_filename; 299 const char *kernel_cmdline = machine->kernel_cmdline; 300 const char *initrd_filename = machine->initrd_filename; 301 MachineClass *mc = MACHINE_GET_CLASS(machine); 302 DeviceState *dev; 303 char *firmware_filename; 304 uint64_t firmware_low, firmware_high; 305 long size; 306 uint64_t kernel_entry = 0, kernel_low, kernel_high; 307 MemoryRegion *addr_space = get_system_memory(); 308 MemoryRegion *rom_region; 309 long i; 310 unsigned int smp_cpus = machine->smp.cpus; 311 SysBusDevice *s; 312 313 /* SCSI disk setup. */ 314 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 315 lsi53c8xx_handle_legacy_cmdline(dev); 316 317 /* Graphics setup. */ 318 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 319 vga_interface_created = true; 320 dev = qdev_new("artist"); 321 s = SYS_BUS_DEVICE(dev); 322 sysbus_realize_and_unref(s, &error_fatal); 323 sysbus_mmio_map(s, 0, LASI_GFX_HPA); 324 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); 325 } 326 327 /* Network setup. */ 328 if (enable_lasi_lan()) { 329 lasi_82596_init(addr_space, LASI_LAN_HPA, 330 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); 331 } 332 333 for (i = 0; i < nb_nics; i++) { 334 if (!enable_lasi_lan()) { 335 pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL); 336 } 337 } 338 339 /* register power switch emulation */ 340 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 341 342 /* fw_cfg configuration interface */ 343 create_fw_cfg(machine, pci_bus); 344 345 /* Load firmware. Given that this is not "real" firmware, 346 but one explicitly written for the emulation, we might as 347 well load it directly from an ELF image. */ 348 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 349 machine->firmware ?: "hppa-firmware.img"); 350 if (firmware_filename == NULL) { 351 error_report("no firmware provided"); 352 exit(1); 353 } 354 355 size = load_elf(firmware_filename, NULL, NULL, NULL, 356 &firmware_entry, &firmware_low, &firmware_high, NULL, 357 true, EM_PARISC, 0, 0); 358 359 /* Unfortunately, load_elf sign-extends reading elf32. */ 360 firmware_entry = (target_ureg)firmware_entry; 361 firmware_low = (target_ureg)firmware_low; 362 firmware_high = (target_ureg)firmware_high; 363 364 if (size < 0) { 365 error_report("could not load firmware '%s'", firmware_filename); 366 exit(1); 367 } 368 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 369 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 370 firmware_low, firmware_high, firmware_entry); 371 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) { 372 error_report("Firmware overlaps with memory or IO space"); 373 exit(1); 374 } 375 g_free(firmware_filename); 376 377 rom_region = g_new(MemoryRegion, 1); 378 memory_region_init_ram(rom_region, NULL, "firmware", 379 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 380 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region); 381 382 /* Load kernel */ 383 if (kernel_filename) { 384 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, 385 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 386 true, EM_PARISC, 0, 0); 387 388 /* Unfortunately, load_elf sign-extends reading elf32. */ 389 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry); 390 kernel_low = (target_ureg)kernel_low; 391 kernel_high = (target_ureg)kernel_high; 392 393 if (size < 0) { 394 error_report("could not load kernel '%s'", kernel_filename); 395 exit(1); 396 } 397 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 398 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 399 ", size %" PRIu64 " kB\n", 400 kernel_low, kernel_high, kernel_entry, size / KiB); 401 402 if (kernel_cmdline) { 403 cpu[0]->env.gr[24] = 0x4000; 404 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], 405 TARGET_PAGE_SIZE, kernel_cmdline); 406 } 407 408 if (initrd_filename) { 409 ram_addr_t initrd_base; 410 int64_t initrd_size; 411 412 initrd_size = get_image_size(initrd_filename); 413 if (initrd_size < 0) { 414 error_report("could not load initial ram disk '%s'", 415 initrd_filename); 416 exit(1); 417 } 418 419 /* Load the initrd image high in memory. 420 Mirror the algorithm used by palo: 421 (1) Due to sign-extension problems and PDC, 422 put the initrd no higher than 1G. 423 (2) Reserve 64k for stack. */ 424 initrd_base = MIN(machine->ram_size, 1 * GiB); 425 initrd_base = initrd_base - 64 * KiB; 426 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 427 428 if (initrd_base < kernel_high) { 429 error_report("kernel and initial ram disk too large!"); 430 exit(1); 431 } 432 433 load_image_targphys(initrd_filename, initrd_base, initrd_size); 434 cpu[0]->env.gr[23] = initrd_base; 435 cpu[0]->env.gr[22] = initrd_base + initrd_size; 436 } 437 } 438 439 if (!kernel_entry) { 440 /* When booting via firmware, tell firmware if we want interactive 441 * mode (kernel_entry=1), and to boot from CD (gr[24]='d') 442 * or hard disc * (gr[24]='c'). 443 */ 444 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; 445 cpu[0]->env.gr[24] = machine->boot_config.order[0]; 446 } 447 448 /* We jump to the firmware entry routine and pass the 449 * various parameters in registers. After firmware initialization, 450 * firmware will start the Linux kernel with ramdisk and cmdline. 451 */ 452 cpu[0]->env.gr[26] = machine->ram_size; 453 cpu[0]->env.gr[25] = kernel_entry; 454 455 /* tell firmware how many SMP CPUs to present in inventory table */ 456 cpu[0]->env.gr[21] = smp_cpus; 457 458 /* tell firmware fw_cfg port */ 459 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 460 } 461 462 /* 463 * Create HP B160L workstation 464 */ 465 static void machine_HP_B160L_init(MachineState *machine) 466 { 467 DeviceState *dev, *dino_dev; 468 MemoryRegion *addr_space = get_system_memory(); 469 ISABus *isa_bus; 470 PCIBus *pci_bus; 471 472 /* Create CPUs and RAM. */ 473 machine_HP_common_init_cpus(machine); 474 475 /* Init Lasi chip */ 476 lasi_dev = DEVICE(lasi_init()); 477 memory_region_add_subregion(addr_space, LASI_HPA, 478 sysbus_mmio_get_region( 479 SYS_BUS_DEVICE(lasi_dev), 0)); 480 481 /* Init Dino (PCI host bus chip). */ 482 dino_dev = DEVICE(dino_init(addr_space)); 483 memory_region_add_subregion(addr_space, DINO_HPA, 484 sysbus_mmio_get_region( 485 SYS_BUS_DEVICE(dino_dev), 0)); 486 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 487 assert(pci_bus); 488 489 /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */ 490 isa_bus = hppa_isa_bus(); 491 assert(isa_bus); 492 493 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ 494 serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0, 495 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, 496 serial_hd(0), DEVICE_BIG_ENDIAN); 497 498 serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0, 499 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, 500 serial_hd(1), DEVICE_BIG_ENDIAN); 501 502 /* Parallel port */ 503 parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0, 504 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 505 parallel_hds[0]); 506 507 /* PS/2 Keyboard/Mouse */ 508 dev = qdev_new(TYPE_LASIPS2); 509 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 510 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 511 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); 512 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA, 513 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 514 0)); 515 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA + 0x100, 516 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 517 1)); 518 519 /* Add SCSI discs, NICs, graphics & load firmware */ 520 machine_HP_common_init_tail(machine, pci_bus); 521 } 522 523 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason) 524 { 525 unsigned int smp_cpus = ms->smp.cpus; 526 int i; 527 528 qemu_devices_reset(reason); 529 530 /* Start all CPUs at the firmware entry point. 531 * Monarch CPU will initialize firmware, secondary CPUs 532 * will enter a small idle loop and wait for rendevouz. */ 533 for (i = 0; i < smp_cpus; i++) { 534 CPUState *cs = CPU(cpu[i]); 535 536 cpu_set_pc(cs, firmware_entry); 537 cpu[i]->env.psw = PSW_Q; 538 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 539 540 cs->exception_index = -1; 541 cs->halted = 0; 542 543 /* clear any existing TLB and BTLB entries */ 544 memset(cpu[i]->env.tlb, 0, sizeof(cpu[i]->env.tlb)); 545 cpu[i]->env.tlb_last = HPPA_BTLB_ENTRIES; 546 } 547 548 /* already initialized by machine_hppa_init()? */ 549 if (cpu[0]->env.gr[26] == ms->ram_size) { 550 return; 551 } 552 553 cpu[0]->env.gr[26] = ms->ram_size; 554 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ 555 cpu[0]->env.gr[24] = 'c'; 556 /* gr22/gr23 unused, no initrd while reboot. */ 557 cpu[0]->env.gr[21] = smp_cpus; 558 /* tell firmware fw_cfg port */ 559 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 560 } 561 562 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 563 { 564 CPUState *cs; 565 566 CPU_FOREACH(cs) { 567 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 568 } 569 } 570 571 static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data) 572 { 573 MachineClass *mc = MACHINE_CLASS(oc); 574 NMIClass *nc = NMI_CLASS(oc); 575 576 mc->desc = "HP B160L workstation"; 577 mc->default_cpu_type = TYPE_HPPA_CPU; 578 mc->init = machine_HP_B160L_init; 579 mc->reset = hppa_machine_reset; 580 mc->block_default_type = IF_SCSI; 581 mc->max_cpus = HPPA_MAX_CPUS; 582 mc->default_cpus = 1; 583 mc->is_default = true; 584 mc->default_ram_size = 512 * MiB; 585 mc->default_boot_order = "cd"; 586 mc->default_ram_id = "ram"; 587 mc->default_nic = "tulip"; 588 589 nc->nmi_monitor_handler = hppa_nmi; 590 } 591 592 static const TypeInfo HP_B160L_machine_init_typeinfo = { 593 .name = MACHINE_TYPE_NAME("B160L"), 594 .parent = TYPE_MACHINE, 595 .class_init = HP_B160L_machine_init_class_init, 596 .interfaces = (InterfaceInfo[]) { 597 { TYPE_NMI }, 598 { } 599 }, 600 }; 601 602 static void hppa_machine_init_register_types(void) 603 { 604 type_register_static(&HP_B160L_machine_init_typeinfo); 605 } 606 607 type_init(hppa_machine_init_register_types) 608