1 /* 2 * QEMU HPPA hardware system emulator. 3 * Copyright 2018 Helge Deller <deller@gmx.de> 4 */ 5 6 #include "qemu/osdep.h" 7 #include "qemu/datadir.h" 8 #include "cpu.h" 9 #include "elf.h" 10 #include "hw/loader.h" 11 #include "qemu/error-report.h" 12 #include "sysemu/reset.h" 13 #include "sysemu/sysemu.h" 14 #include "sysemu/runstate.h" 15 #include "hw/rtc/mc146818rtc.h" 16 #include "hw/timer/i8254.h" 17 #include "hw/char/serial.h" 18 #include "hw/net/lasi_82596.h" 19 #include "hw/nmi.h" 20 #include "dino.h" 21 #include "hppa_sys.h" 22 #include "qemu/units.h" 23 #include "qapi/error.h" 24 #include "net/net.h" 25 #include "qemu/log.h" 26 #include "net/net.h" 27 28 #define MAX_IDE_BUS 2 29 30 #define MIN_SEABIOS_HPPA_VERSION 1 /* require at least this fw version */ 31 32 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 33 34 static void hppa_powerdown_req(Notifier *n, void *opaque) 35 { 36 hwaddr soft_power_reg = HPA_POWER_BUTTON; 37 uint32_t val; 38 39 val = ldl_be_phys(&address_space_memory, soft_power_reg); 40 if ((val >> 8) == 0) { 41 /* immediately shut down when under hardware control */ 42 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 43 return; 44 } 45 46 /* clear bit 31 to indicate that the power switch was pressed. */ 47 val &= ~1; 48 stl_be_phys(&address_space_memory, soft_power_reg, val); 49 } 50 51 static Notifier hppa_system_powerdown_notifier = { 52 .notify = hppa_powerdown_req 53 }; 54 55 56 static ISABus *hppa_isa_bus(void) 57 { 58 ISABus *isa_bus; 59 qemu_irq *isa_irqs; 60 MemoryRegion *isa_region; 61 62 isa_region = g_new(MemoryRegion, 1); 63 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 64 NULL, "isa-io", 0x800); 65 memory_region_add_subregion(get_system_memory(), IDE_HPA, 66 isa_region); 67 68 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 69 &error_abort); 70 isa_irqs = i8259_init(isa_bus, 71 /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */ 72 NULL); 73 isa_bus_irqs(isa_bus, isa_irqs); 74 75 return isa_bus; 76 } 77 78 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr) 79 { 80 addr &= (0x10000000 - 1); 81 return addr; 82 } 83 84 static HPPACPU *cpu[HPPA_MAX_CPUS]; 85 static uint64_t firmware_entry; 86 87 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 88 Error **errp) 89 { 90 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 91 } 92 93 static FWCfgState *create_fw_cfg(MachineState *ms) 94 { 95 FWCfgState *fw_cfg; 96 uint64_t val; 97 98 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); 99 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 100 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 101 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 102 103 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 104 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 105 g_memdup(&val, sizeof(val)), sizeof(val)); 106 107 val = cpu_to_le64(HPPA_TLB_ENTRIES); 108 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 109 g_memdup(&val, sizeof(val)), sizeof(val)); 110 111 val = cpu_to_le64(HPPA_BTLB_ENTRIES); 112 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 113 g_memdup(&val, sizeof(val)), sizeof(val)); 114 115 val = cpu_to_le64(HPA_POWER_BUTTON); 116 fw_cfg_add_file(fw_cfg, "/etc/power-button-addr", 117 g_memdup(&val, sizeof(val)), sizeof(val)); 118 119 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]); 120 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 121 122 return fw_cfg; 123 } 124 125 static void machine_hppa_init(MachineState *machine) 126 { 127 const char *kernel_filename = machine->kernel_filename; 128 const char *kernel_cmdline = machine->kernel_cmdline; 129 const char *initrd_filename = machine->initrd_filename; 130 DeviceState *dev, *dino_dev; 131 PCIBus *pci_bus; 132 ISABus *isa_bus; 133 char *firmware_filename; 134 uint64_t firmware_low, firmware_high; 135 long size; 136 uint64_t kernel_entry = 0, kernel_low, kernel_high; 137 MemoryRegion *addr_space = get_system_memory(); 138 MemoryRegion *rom_region; 139 MemoryRegion *cpu_region; 140 long i; 141 unsigned int smp_cpus = machine->smp.cpus; 142 SysBusDevice *s; 143 144 /* Create CPUs. */ 145 for (i = 0; i < smp_cpus; i++) { 146 char *name = g_strdup_printf("cpu%ld-io-eir", i); 147 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 148 149 cpu_region = g_new(MemoryRegion, 1); 150 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 151 cpu[i], name, 4); 152 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, 153 cpu_region); 154 g_free(name); 155 } 156 157 /* Main memory region. */ 158 if (machine->ram_size > 3 * GiB) { 159 error_report("RAM size is currently restricted to 3GB"); 160 exit(EXIT_FAILURE); 161 } 162 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 163 164 165 /* Init Lasi chip */ 166 lasi_init(addr_space); 167 168 /* Init Dino (PCI host bus chip). */ 169 dino_dev = DEVICE(dino_init(addr_space)); 170 memory_region_add_subregion(addr_space, DINO_HPA, 171 sysbus_mmio_get_region( 172 SYS_BUS_DEVICE(dino_dev), 0)); 173 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 174 assert(pci_bus); 175 176 /* Create ISA bus. */ 177 isa_bus = hppa_isa_bus(); 178 assert(isa_bus); 179 180 /* Realtime clock, used by firmware for PDC_TOD call. */ 181 mc146818_rtc_init(isa_bus, 2000, NULL); 182 183 /* Serial code setup. */ 184 if (serial_hd(0)) { 185 uint32_t addr = DINO_UART_HPA + 0x800; 186 serial_mm_init(addr_space, addr, 0, 187 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 188 115200, serial_hd(0), DEVICE_BIG_ENDIAN); 189 } 190 191 /* fw_cfg configuration interface */ 192 create_fw_cfg(machine); 193 194 /* SCSI disk setup. */ 195 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 196 lsi53c8xx_handle_legacy_cmdline(dev); 197 198 /* Graphics setup. */ 199 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 200 dev = qdev_new("artist"); 201 s = SYS_BUS_DEVICE(dev); 202 sysbus_realize_and_unref(s, &error_fatal); 203 sysbus_mmio_map(s, 0, LASI_GFX_HPA); 204 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); 205 } 206 207 /* Network setup. */ 208 for (i = 0; i < nb_nics; i++) { 209 if (!enable_lasi_lan()) { 210 pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL); 211 } 212 } 213 214 /* register power switch emulation */ 215 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 216 217 /* Load firmware. Given that this is not "real" firmware, 218 but one explicitly written for the emulation, we might as 219 well load it directly from an ELF image. */ 220 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 221 machine->firmware ?: "hppa-firmware.img"); 222 if (firmware_filename == NULL) { 223 error_report("no firmware provided"); 224 exit(1); 225 } 226 227 size = load_elf(firmware_filename, NULL, NULL, NULL, 228 &firmware_entry, &firmware_low, &firmware_high, NULL, 229 true, EM_PARISC, 0, 0); 230 231 /* Unfortunately, load_elf sign-extends reading elf32. */ 232 firmware_entry = (target_ureg)firmware_entry; 233 firmware_low = (target_ureg)firmware_low; 234 firmware_high = (target_ureg)firmware_high; 235 236 if (size < 0) { 237 error_report("could not load firmware '%s'", firmware_filename); 238 exit(1); 239 } 240 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 241 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 242 firmware_low, firmware_high, firmware_entry); 243 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) { 244 error_report("Firmware overlaps with memory or IO space"); 245 exit(1); 246 } 247 g_free(firmware_filename); 248 249 rom_region = g_new(MemoryRegion, 1); 250 memory_region_init_ram(rom_region, NULL, "firmware", 251 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 252 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region); 253 254 /* Load kernel */ 255 if (kernel_filename) { 256 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, 257 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 258 true, EM_PARISC, 0, 0); 259 260 /* Unfortunately, load_elf sign-extends reading elf32. */ 261 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry); 262 kernel_low = (target_ureg)kernel_low; 263 kernel_high = (target_ureg)kernel_high; 264 265 if (size < 0) { 266 error_report("could not load kernel '%s'", kernel_filename); 267 exit(1); 268 } 269 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 270 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 271 ", size %" PRIu64 " kB\n", 272 kernel_low, kernel_high, kernel_entry, size / KiB); 273 274 if (kernel_cmdline) { 275 cpu[0]->env.gr[24] = 0x4000; 276 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], 277 TARGET_PAGE_SIZE, kernel_cmdline); 278 } 279 280 if (initrd_filename) { 281 ram_addr_t initrd_base; 282 int64_t initrd_size; 283 284 initrd_size = get_image_size(initrd_filename); 285 if (initrd_size < 0) { 286 error_report("could not load initial ram disk '%s'", 287 initrd_filename); 288 exit(1); 289 } 290 291 /* Load the initrd image high in memory. 292 Mirror the algorithm used by palo: 293 (1) Due to sign-extension problems and PDC, 294 put the initrd no higher than 1G. 295 (2) Reserve 64k for stack. */ 296 initrd_base = MIN(machine->ram_size, 1 * GiB); 297 initrd_base = initrd_base - 64 * KiB; 298 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 299 300 if (initrd_base < kernel_high) { 301 error_report("kernel and initial ram disk too large!"); 302 exit(1); 303 } 304 305 load_image_targphys(initrd_filename, initrd_base, initrd_size); 306 cpu[0]->env.gr[23] = initrd_base; 307 cpu[0]->env.gr[22] = initrd_base + initrd_size; 308 } 309 } 310 311 if (!kernel_entry) { 312 /* When booting via firmware, tell firmware if we want interactive 313 * mode (kernel_entry=1), and to boot from CD (gr[24]='d') 314 * or hard disc * (gr[24]='c'). 315 */ 316 kernel_entry = boot_menu ? 1 : 0; 317 cpu[0]->env.gr[24] = machine->boot_order[0]; 318 } 319 320 /* We jump to the firmware entry routine and pass the 321 * various parameters in registers. After firmware initialization, 322 * firmware will start the Linux kernel with ramdisk and cmdline. 323 */ 324 cpu[0]->env.gr[26] = machine->ram_size; 325 cpu[0]->env.gr[25] = kernel_entry; 326 327 /* tell firmware how many SMP CPUs to present in inventory table */ 328 cpu[0]->env.gr[21] = smp_cpus; 329 330 /* tell firmware fw_cfg port */ 331 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 332 } 333 334 static void hppa_machine_reset(MachineState *ms) 335 { 336 unsigned int smp_cpus = ms->smp.cpus; 337 int i; 338 339 qemu_devices_reset(); 340 341 /* Start all CPUs at the firmware entry point. 342 * Monarch CPU will initialize firmware, secondary CPUs 343 * will enter a small idle look and wait for rendevouz. */ 344 for (i = 0; i < smp_cpus; i++) { 345 cpu_set_pc(CPU(cpu[i]), firmware_entry); 346 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 347 } 348 349 /* already initialized by machine_hppa_init()? */ 350 if (cpu[0]->env.gr[26] == ms->ram_size) { 351 return; 352 } 353 354 cpu[0]->env.gr[26] = ms->ram_size; 355 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ 356 cpu[0]->env.gr[24] = 'c'; 357 /* gr22/gr23 unused, no initrd while reboot. */ 358 cpu[0]->env.gr[21] = smp_cpus; 359 /* tell firmware fw_cfg port */ 360 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 361 } 362 363 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 364 { 365 CPUState *cs; 366 367 CPU_FOREACH(cs) { 368 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 369 } 370 } 371 372 static void machine_hppa_machine_init(MachineClass *mc) 373 { 374 mc->desc = "HPPA B160L machine"; 375 mc->default_cpu_type = TYPE_HPPA_CPU; 376 mc->init = machine_hppa_init; 377 mc->reset = hppa_machine_reset; 378 mc->block_default_type = IF_SCSI; 379 mc->max_cpus = HPPA_MAX_CPUS; 380 mc->default_cpus = 1; 381 mc->is_default = true; 382 mc->default_ram_size = 512 * MiB; 383 mc->default_boot_order = "cd"; 384 mc->default_ram_id = "ram"; 385 } 386 387 static void machine_hppa_machine_init_class_init(ObjectClass *oc, void *data) 388 { 389 MachineClass *mc = MACHINE_CLASS(oc); 390 machine_hppa_machine_init(mc); 391 392 NMIClass *nc = NMI_CLASS(oc); 393 nc->nmi_monitor_handler = hppa_nmi; 394 } 395 396 static const TypeInfo machine_hppa_machine_init_typeinfo = { 397 .name = ("hppa" "-machine"), 398 .parent = "machine", 399 .class_init = machine_hppa_machine_init_class_init, 400 .interfaces = (InterfaceInfo[]) { 401 { TYPE_NMI }, 402 { } 403 }, 404 }; 405 406 static void machine_hppa_machine_init_register_types(void) 407 { 408 type_register_static(&machine_hppa_machine_init_typeinfo); 409 } 410 411 type_init(machine_hppa_machine_init_register_types) 412