1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Watchdog Timer Driver
4 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
5 *
6 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
7 *
8 * Based on softdog.c by Alan Cox,
9 * 83977f_wdt.c by Jose Goncalves,
10 * it87.c by Chris Gauthron, Jean Delvare
11 *
12 * Data-sheets: Publicly available at the ITE website
13 * http://www.ite.com.tw/
14 *
15 * Support of the watchdog timers, which are available on
16 * IT8607, IT8620, IT8622, IT8625, IT8628, IT8655, IT8665, IT8686,
17 * IT8702, IT8712, IT8716, IT8718, IT8720, IT8721, IT8726, IT8728,
18 * IT8772, IT8783 and IT8784.
19 */
20
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23 #include <linux/bits.h>
24 #include <linux/dmi.h>
25 #include <linux/init.h>
26 #include <linux/io.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/types.h>
31 #include <linux/watchdog.h>
32
33 #define WATCHDOG_NAME "IT87 WDT"
34
35 /* Defaults for Module Parameter */
36 #define DEFAULT_TIMEOUT 60
37 #define DEFAULT_TESTMODE 0
38 #define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
39
40 /* IO Ports */
41 #define REG 0x2e
42 #define VAL 0x2f
43
44 /* Logical device Numbers LDN */
45 #define EC 0x04
46 #define GPIO 0x07
47
48 /* Configuration Registers and Functions */
49 #define LDNREG 0x07
50 #define CHIPID 0x20
51 #define CHIPREV 0x22
52
53 /* Chip Id numbers */
54 #define NO_DEV_ID 0xffff
55 #define IT8607_ID 0x8607
56 #define IT8620_ID 0x8620
57 #define IT8622_ID 0x8622
58 #define IT8625_ID 0x8625
59 #define IT8628_ID 0x8628
60 #define IT8655_ID 0x8655
61 #define IT8665_ID 0x8665
62 #define IT8686_ID 0x8686
63 #define IT8702_ID 0x8702
64 #define IT8705_ID 0x8705
65 #define IT8712_ID 0x8712
66 #define IT8716_ID 0x8716
67 #define IT8718_ID 0x8718
68 #define IT8720_ID 0x8720
69 #define IT8721_ID 0x8721
70 #define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
71 #define IT8728_ID 0x8728
72 #define IT8772_ID 0x8772
73 #define IT8783_ID 0x8783
74 #define IT8784_ID 0x8784
75 #define IT8786_ID 0x8786
76
77 /* Environment Controller Configuration Registers LDN=0x04 */
78 #define SCR1 0xfa
79
80 /* Environment Controller Bits SCR1 */
81 #define WDT_PWRGD 0x20
82
83 /* GPIO Configuration Registers LDN=0x07 */
84 #define WDTCTRL 0x71
85 #define WDTCFG 0x72
86 #define WDTVALLSB 0x73
87 #define WDTVALMSB 0x74
88
89 /* GPIO Bits WDTCFG */
90 #define WDT_TOV1 0x80
91 #define WDT_KRST 0x40
92 #define WDT_TOVE 0x20
93 #define WDT_PWROK 0x10 /* not in it8721 */
94 #define WDT_INT_MASK 0x0f
95
96 static unsigned int max_units, chip_type;
97
98 static unsigned int timeout = DEFAULT_TIMEOUT;
99 static int testmode = DEFAULT_TESTMODE;
100 static bool nowayout = DEFAULT_NOWAYOUT;
101
102 module_param(timeout, int, 0);
103 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
104 __MODULE_STRING(DEFAULT_TIMEOUT));
105 module_param(testmode, int, 0);
106 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
107 __MODULE_STRING(DEFAULT_TESTMODE));
108 module_param(nowayout, bool, 0);
109 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
110 __MODULE_STRING(WATCHDOG_NOWAYOUT));
111
112 /* Superio Chip */
113
superio_enter(void)114 static inline int superio_enter(void)
115 {
116 /*
117 * Try to reserve REG and REG + 1 for exclusive access.
118 */
119 if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
120 return -EBUSY;
121
122 outb(0x87, REG);
123 outb(0x01, REG);
124 outb(0x55, REG);
125 outb(0x55, REG);
126 return 0;
127 }
128
superio_exit(void)129 static inline void superio_exit(void)
130 {
131 outb(0x02, REG);
132 outb(0x02, VAL);
133 release_region(REG, 2);
134 }
135
superio_select(int ldn)136 static inline void superio_select(int ldn)
137 {
138 outb(LDNREG, REG);
139 outb(ldn, VAL);
140 }
141
superio_inb(int reg)142 static inline int superio_inb(int reg)
143 {
144 outb(reg, REG);
145 return inb(VAL);
146 }
147
superio_outb(int val,int reg)148 static inline void superio_outb(int val, int reg)
149 {
150 outb(reg, REG);
151 outb(val, VAL);
152 }
153
superio_inw(int reg)154 static inline int superio_inw(int reg)
155 {
156 int val;
157 outb(reg++, REG);
158 val = inb(VAL) << 8;
159 outb(reg, REG);
160 val |= inb(VAL);
161 return val;
162 }
163
164 /* Internal function, should be called after superio_select(GPIO) */
_wdt_update_timeout(unsigned int t)165 static void _wdt_update_timeout(unsigned int t)
166 {
167 unsigned char cfg = WDT_KRST;
168
169 if (testmode)
170 cfg = 0;
171
172 if (t <= max_units)
173 cfg |= WDT_TOV1;
174 else
175 t /= 60;
176
177 if (chip_type != IT8721_ID)
178 cfg |= WDT_PWROK;
179
180 superio_outb(cfg, WDTCFG);
181 superio_outb(t, WDTVALLSB);
182 if (max_units > 255)
183 superio_outb(t >> 8, WDTVALMSB);
184 }
185
wdt_update_timeout(unsigned int t)186 static int wdt_update_timeout(unsigned int t)
187 {
188 int ret;
189
190 ret = superio_enter();
191 if (ret)
192 return ret;
193
194 superio_select(GPIO);
195 _wdt_update_timeout(t);
196 superio_exit();
197
198 return 0;
199 }
200
wdt_round_time(int t)201 static int wdt_round_time(int t)
202 {
203 t += 59;
204 t -= t % 60;
205 return t;
206 }
207
208 /* watchdog timer handling */
209
wdt_start(struct watchdog_device * wdd)210 static int wdt_start(struct watchdog_device *wdd)
211 {
212 return wdt_update_timeout(wdd->timeout);
213 }
214
wdt_stop(struct watchdog_device * wdd)215 static int wdt_stop(struct watchdog_device *wdd)
216 {
217 return wdt_update_timeout(0);
218 }
219
220 /**
221 * wdt_set_timeout - set a new timeout value with watchdog ioctl
222 * @t: timeout value in seconds
223 *
224 * The hardware device has a 8 or 16 bit watchdog timer (depends on
225 * chip version) that can be configured to count seconds or minutes.
226 *
227 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
228 */
229
wdt_set_timeout(struct watchdog_device * wdd,unsigned int t)230 static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
231 {
232 int ret = 0;
233
234 if (t > max_units)
235 t = wdt_round_time(t);
236
237 wdd->timeout = t;
238
239 if (watchdog_hw_running(wdd))
240 ret = wdt_update_timeout(t);
241
242 return ret;
243 }
244
245 enum {
246 IT87_WDT_OUTPUT_THROUGH_PWRGD = BIT(0),
247 };
248
249 static const struct dmi_system_id it87_quirks[] = {
250 {
251 /* Qotom Q30900P (IT8786) */
252 .matches = {
253 DMI_EXACT_MATCH(DMI_BOARD_NAME, "QCML04"),
254 },
255 .driver_data = (void *)IT87_WDT_OUTPUT_THROUGH_PWRGD,
256 },
257 {}
258 };
259
260 static const struct watchdog_info ident = {
261 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
262 .firmware_version = 1,
263 .identity = WATCHDOG_NAME,
264 };
265
266 static const struct watchdog_ops wdt_ops = {
267 .owner = THIS_MODULE,
268 .start = wdt_start,
269 .stop = wdt_stop,
270 .set_timeout = wdt_set_timeout,
271 };
272
273 static struct watchdog_device wdt_dev = {
274 .info = &ident,
275 .ops = &wdt_ops,
276 .min_timeout = 1,
277 };
278
it87_wdt_init(void)279 static int __init it87_wdt_init(void)
280 {
281 const struct dmi_system_id *dmi_id;
282 u8 chip_rev;
283 u8 ctrl;
284 int quirks = 0;
285 int rc;
286
287 rc = superio_enter();
288 if (rc)
289 return rc;
290
291 chip_type = superio_inw(CHIPID);
292 chip_rev = superio_inb(CHIPREV) & 0x0f;
293 superio_exit();
294
295 dmi_id = dmi_first_match(it87_quirks);
296 if (dmi_id)
297 quirks = (long)dmi_id->driver_data;
298
299 switch (chip_type) {
300 case IT8702_ID:
301 max_units = 255;
302 break;
303 case IT8712_ID:
304 max_units = (chip_rev < 8) ? 255 : 65535;
305 break;
306 case IT8716_ID:
307 case IT8726_ID:
308 max_units = 65535;
309 break;
310 case IT8607_ID:
311 case IT8620_ID:
312 case IT8622_ID:
313 case IT8625_ID:
314 case IT8628_ID:
315 case IT8655_ID:
316 case IT8665_ID:
317 case IT8686_ID:
318 case IT8718_ID:
319 case IT8720_ID:
320 case IT8721_ID:
321 case IT8728_ID:
322 case IT8772_ID:
323 case IT8783_ID:
324 case IT8784_ID:
325 case IT8786_ID:
326 max_units = 65535;
327 break;
328 case IT8705_ID:
329 pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
330 chip_type, chip_rev);
331 return -ENODEV;
332 case NO_DEV_ID:
333 pr_err("no device\n");
334 return -ENODEV;
335 default:
336 pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
337 chip_type, chip_rev);
338 return -ENODEV;
339 }
340
341 rc = superio_enter();
342 if (rc)
343 return rc;
344
345 superio_select(GPIO);
346 superio_outb(WDT_TOV1, WDTCFG);
347
348 switch (chip_type) {
349 case IT8784_ID:
350 case IT8786_ID:
351 ctrl = superio_inb(WDTCTRL);
352 ctrl &= 0x08;
353 superio_outb(ctrl, WDTCTRL);
354 break;
355 default:
356 superio_outb(0x00, WDTCTRL);
357 }
358
359 if (quirks & IT87_WDT_OUTPUT_THROUGH_PWRGD) {
360 superio_select(EC);
361 ctrl = superio_inb(SCR1);
362 if (!(ctrl & WDT_PWRGD)) {
363 ctrl |= WDT_PWRGD;
364 superio_outb(ctrl, SCR1);
365 }
366 }
367
368 superio_exit();
369
370 if (timeout < 1 || timeout > max_units * 60) {
371 timeout = DEFAULT_TIMEOUT;
372 pr_warn("Timeout value out of range, use default %d sec\n",
373 DEFAULT_TIMEOUT);
374 }
375
376 if (timeout > max_units)
377 timeout = wdt_round_time(timeout);
378
379 wdt_dev.timeout = timeout;
380 wdt_dev.max_timeout = max_units * 60;
381
382 watchdog_stop_on_reboot(&wdt_dev);
383 rc = watchdog_register_device(&wdt_dev);
384 if (rc) {
385 pr_err("Cannot register watchdog device (err=%d)\n", rc);
386 return rc;
387 }
388
389 pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
390 chip_type, chip_rev, timeout, nowayout, testmode);
391
392 return 0;
393 }
394
it87_wdt_exit(void)395 static void __exit it87_wdt_exit(void)
396 {
397 watchdog_unregister_device(&wdt_dev);
398 }
399
400 module_init(it87_wdt_init);
401 module_exit(it87_wdt_exit);
402
403 MODULE_AUTHOR("Oliver Schuster");
404 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
405 MODULE_LICENSE("GPL");
406