14fa9c49fSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 27ac6653aSJeff Kirsher /******************************************************************************* 37ac6653aSJeff Kirsher Copyright (C) 2007-2009 STMicroelectronics Ltd 47ac6653aSJeff Kirsher 57ac6653aSJeff Kirsher 67ac6653aSJeff Kirsher Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 77ac6653aSJeff Kirsher *******************************************************************************/ 87ac6653aSJeff Kirsher 9bd4242dfSRayagond Kokatanur #ifndef __STMMAC_H__ 10bd4242dfSRayagond Kokatanur #define __STMMAC_H__ 11bd4242dfSRayagond Kokatanur 12bfab27a1SGiuseppe CAVALLARO #define STMMAC_RESOURCE_NAME "stmmaceth" 13ba1377ffSGiuseppe CAVALLARO 14ba1377ffSGiuseppe CAVALLARO #include <linux/clk.h> 15d5a05e69SVincent Whitchurch #include <linux/hrtimer.h> 163cd1cfcbSJose Abreu #include <linux/if_vlan.h> 177ac6653aSJeff Kirsher #include <linux/stmmac.h> 18eeef2f6bSJose Abreu #include <linux/phylink.h> 1933d5e332SGiuseppe CAVALLARO #include <linux/pci.h> 207ac6653aSJeff Kirsher #include "common.h" 2192ba6888SRayagond Kokatanur #include <linux/ptp_clock_kernel.h> 22d6228b7cSArtem Panfilov #include <linux/net_tstamp.h> 23c5e4ddbdSChen-Yu Tsai #include <linux/reset.h> 242af6106aSJose Abreu #include <net/page_pool.h> 257ac6653aSJeff Kirsher 26e56788cfSJoachim Eastwood struct stmmac_resources { 27e56788cfSJoachim Eastwood void __iomem *addr; 2883216e39SMichael Walle u8 mac[ETH_ALEN]; 29e56788cfSJoachim Eastwood int wol_irq; 30e56788cfSJoachim Eastwood int lpi_irq; 31e56788cfSJoachim Eastwood int irq; 328532f613SOng Boon Leong int sfty_ce_irq; 338532f613SOng Boon Leong int sfty_ue_irq; 348532f613SOng Boon Leong int rx_irq[MTL_MAX_RX_QUEUES]; 358532f613SOng Boon Leong int tx_irq[MTL_MAX_TX_QUEUES]; 36e56788cfSJoachim Eastwood }; 37e56788cfSJoachim Eastwood 38be8b38a7SOng Boon Leong enum stmmac_txbuf_type { 39be8b38a7SOng Boon Leong STMMAC_TXBUF_T_SKB, 40be8b38a7SOng Boon Leong STMMAC_TXBUF_T_XDP_TX, 418b278a5bSOng Boon Leong STMMAC_TXBUF_T_XDP_NDO, 42132c32eeSOng Boon Leong STMMAC_TXBUF_T_XSK_TX, 43be8b38a7SOng Boon Leong }; 44be8b38a7SOng Boon Leong 45362b37beSGiuseppe CAVALLARO struct stmmac_tx_info { 46362b37beSGiuseppe CAVALLARO dma_addr_t buf; 47362b37beSGiuseppe CAVALLARO bool map_as_page; 48553e2ab3SGiuseppe Cavallaro unsigned len; 492a6d8e17SGiuseppe Cavallaro bool last_segment; 5096951366SGiuseppe Cavallaro bool is_jumbo; 51be8b38a7SOng Boon Leong enum stmmac_txbuf_type buf_type; 52362b37beSGiuseppe CAVALLARO }; 53362b37beSGiuseppe CAVALLARO 54579a25a8SJose Abreu #define STMMAC_TBS_AVAIL BIT(0) 55579a25a8SJose Abreu #define STMMAC_TBS_EN BIT(1) 56579a25a8SJose Abreu 57ce736788SJoao Pinto /* Frequently used values are kept adjacent for cache effect */ 58ce736788SJoao Pinto struct stmmac_tx_queue { 598fce3331SJose Abreu u32 tx_count_frames; 60579a25a8SJose Abreu int tbs; 61d5a05e69SVincent Whitchurch struct hrtimer txtimer; 62ce736788SJoao Pinto u32 queue_index; 63ce736788SJoao Pinto struct stmmac_priv *priv_data; 64ce736788SJoao Pinto struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 65579a25a8SJose Abreu struct dma_edesc *dma_entx; 66ce736788SJoao Pinto struct dma_desc *dma_tx; 67be8b38a7SOng Boon Leong union { 68ce736788SJoao Pinto struct sk_buff **tx_skbuff; 69be8b38a7SOng Boon Leong struct xdp_frame **xdpf; 70be8b38a7SOng Boon Leong }; 71ce736788SJoao Pinto struct stmmac_tx_info *tx_skbuff_dma; 72132c32eeSOng Boon Leong struct xsk_buff_pool *xsk_pool; 73132c32eeSOng Boon Leong u32 xsk_frames_done; 74ce736788SJoao Pinto unsigned int cur_tx; 75ce736788SJoao Pinto unsigned int dirty_tx; 76ce736788SJoao Pinto dma_addr_t dma_tx_phy; 7752e597d3SWong Vee Khee dma_addr_t tx_tail_addr; 788d212a9eSNiklas Cassel u32 mss; 79ce736788SJoao Pinto }; 80ce736788SJoao Pinto 812af6106aSJose Abreu struct stmmac_rx_buffer { 82bba2556eSOng Boon Leong union { 83bba2556eSOng Boon Leong struct { 842af6106aSJose Abreu struct page *page; 852af6106aSJose Abreu dma_addr_t addr; 865fabb012SOng Boon Leong __u32 page_offset; 87bba2556eSOng Boon Leong }; 88bba2556eSOng Boon Leong struct xdp_buff *xdp; 89bba2556eSOng Boon Leong }; 905fabb012SOng Boon Leong struct page *sec_page; 9167afd6d1SJose Abreu dma_addr_t sec_addr; 922af6106aSJose Abreu }; 932af6106aSJose Abreu 9454139cf3SJoao Pinto struct stmmac_rx_queue { 95d429b66eSJose Abreu u32 rx_count_frames; 9654139cf3SJoao Pinto u32 queue_index; 97be8b38a7SOng Boon Leong struct xdp_rxq_info xdp_rxq; 98bba2556eSOng Boon Leong struct xsk_buff_pool *xsk_pool; 992af6106aSJose Abreu struct page_pool *page_pool; 1002af6106aSJose Abreu struct stmmac_rx_buffer *buf_pool; 10154139cf3SJoao Pinto struct stmmac_priv *priv_data; 10254139cf3SJoao Pinto struct dma_extended_desc *dma_erx; 10354139cf3SJoao Pinto struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 10454139cf3SJoao Pinto unsigned int cur_rx; 10554139cf3SJoao Pinto unsigned int dirty_rx; 106bba2556eSOng Boon Leong unsigned int buf_alloc_num; 10754139cf3SJoao Pinto u32 rx_zeroc_thresh; 10854139cf3SJoao Pinto dma_addr_t dma_rx_phy; 10954139cf3SJoao Pinto u32 rx_tail_addr; 110ec222003SJose Abreu unsigned int state_saved; 111ec222003SJose Abreu struct { 112ec222003SJose Abreu struct sk_buff *skb; 113ec222003SJose Abreu unsigned int len; 114ec222003SJose Abreu unsigned int error; 115ec222003SJose Abreu } state; 1168fce3331SJose Abreu }; 1178fce3331SJose Abreu 1188fce3331SJose Abreu struct stmmac_channel { 1194ccb4585SJose Abreu struct napi_struct rx_napi ____cacheline_aligned_in_smp; 1204ccb4585SJose Abreu struct napi_struct tx_napi ____cacheline_aligned_in_smp; 121132c32eeSOng Boon Leong struct napi_struct rxtx_napi ____cacheline_aligned_in_smp; 1228fce3331SJose Abreu struct stmmac_priv *priv_data; 123021bd5e3SJose Abreu spinlock_t lock; 1248fce3331SJose Abreu u32 index; 12554139cf3SJoao Pinto }; 12654139cf3SJoao Pinto 1274dbbe8ddSJose Abreu struct stmmac_tc_entry { 1284dbbe8ddSJose Abreu bool in_use; 1294dbbe8ddSJose Abreu bool in_hw; 1304dbbe8ddSJose Abreu bool is_last; 1314dbbe8ddSJose Abreu bool is_frag; 1324dbbe8ddSJose Abreu void *frag_ptr; 1334dbbe8ddSJose Abreu unsigned int table_pos; 1344dbbe8ddSJose Abreu u32 handle; 1354dbbe8ddSJose Abreu u32 prio; 1364dbbe8ddSJose Abreu struct { 1374dbbe8ddSJose Abreu u32 match_data; 1384dbbe8ddSJose Abreu u32 match_en; 1394dbbe8ddSJose Abreu u8 af:1; 1404dbbe8ddSJose Abreu u8 rf:1; 1414dbbe8ddSJose Abreu u8 im:1; 1424dbbe8ddSJose Abreu u8 nc:1; 1434dbbe8ddSJose Abreu u8 res1:4; 1444dbbe8ddSJose Abreu u8 frame_offset; 1454dbbe8ddSJose Abreu u8 ok_index; 1464dbbe8ddSJose Abreu u8 dma_ch_no; 1474dbbe8ddSJose Abreu u32 res2; 1484dbbe8ddSJose Abreu } __packed val; 1494dbbe8ddSJose Abreu }; 1504dbbe8ddSJose Abreu 1519a8a02c9SJose Abreu #define STMMAC_PPS_MAX 4 1529a8a02c9SJose Abreu struct stmmac_pps_cfg { 1539a8a02c9SJose Abreu bool available; 1549a8a02c9SJose Abreu struct timespec64 start; 1559a8a02c9SJose Abreu struct timespec64 period; 1569a8a02c9SJose Abreu }; 1579a8a02c9SJose Abreu 15876067459SJose Abreu struct stmmac_rss { 15976067459SJose Abreu int enable; 16076067459SJose Abreu u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 16176067459SJose Abreu u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 16276067459SJose Abreu }; 16376067459SJose Abreu 164425eabddSJose Abreu #define STMMAC_FLOW_ACTION_DROP BIT(0) 165425eabddSJose Abreu struct stmmac_flow_entry { 166425eabddSJose Abreu unsigned long cookie; 167425eabddSJose Abreu unsigned long action; 168425eabddSJose Abreu u8 ip_proto; 169425eabddSJose Abreu int in_use; 170425eabddSJose Abreu int idx; 171425eabddSJose Abreu int is_l4; 172425eabddSJose Abreu }; 173425eabddSJose Abreu 174aeb7c75cSOng Boon Leong /* Rx Frame Steering */ 175aeb7c75cSOng Boon Leong enum stmmac_rfs_type { 176aeb7c75cSOng Boon Leong STMMAC_RFS_T_VLAN, 177*e48cb313SOng Boon Leong STMMAC_RFS_T_LLDP, 178*e48cb313SOng Boon Leong STMMAC_RFS_T_1588, 179aeb7c75cSOng Boon Leong STMMAC_RFS_T_MAX, 180aeb7c75cSOng Boon Leong }; 181aeb7c75cSOng Boon Leong 182aeb7c75cSOng Boon Leong struct stmmac_rfs_entry { 183aeb7c75cSOng Boon Leong unsigned long cookie; 184*e48cb313SOng Boon Leong u16 etype; 185aeb7c75cSOng Boon Leong int in_use; 186aeb7c75cSOng Boon Leong int type; 187aeb7c75cSOng Boon Leong int tc; 188aeb7c75cSOng Boon Leong }; 189aeb7c75cSOng Boon Leong 1907ac6653aSJeff Kirsher struct stmmac_priv { 1917ac6653aSJeff Kirsher /* Frequently used values are kept adjacent for cache effect */ 192db2f2842SOng Boon Leong u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; 193db2f2842SOng Boon Leong u32 tx_coal_timer[MTL_MAX_TX_QUEUES]; 194db2f2842SOng Boon Leong u32 rx_coal_frames[MTL_MAX_TX_QUEUES]; 195ce736788SJoao Pinto 1967ac6653aSJeff Kirsher int tx_coalesce; 1971bb6dea8SGiuseppe CAVALLARO int hwts_tx_en; 1981bb6dea8SGiuseppe CAVALLARO bool tx_path_in_lpi_mode; 199f748be53SAlexandre TORGUE bool tso; 20067afd6d1SJose Abreu int sph; 201d08d32d1SOng Boon Leong int sph_cap; 2028000ddc0SJose Abreu u32 sarc_type; 2037ac6653aSJeff Kirsher 2047ac6653aSJeff Kirsher unsigned int dma_buf_sz; 20522ad3838SGiuseppe Cavallaro unsigned int rx_copybreak; 206db2f2842SOng Boon Leong u32 rx_riwt[MTL_MAX_TX_QUEUES]; 2071bb6dea8SGiuseppe CAVALLARO int hwts_rx_en; 2085bacd778SLABBE Corentin 2091bb6dea8SGiuseppe CAVALLARO void __iomem *ioaddr; 2101bb6dea8SGiuseppe CAVALLARO struct net_device *dev; 2117ac6653aSJeff Kirsher struct device *device; 2127ac6653aSJeff Kirsher struct mac_device_info *hw; 2137cfde0afSJose Abreu int (*hwif_quirks)(struct stmmac_priv *priv); 21429555fa3SThierry Reding struct mutex lock; 2157ac6653aSJeff Kirsher 21654139cf3SJoao Pinto /* RX Queue */ 21754139cf3SJoao Pinto struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 218aa042f60SSong, Yoong Siang unsigned int dma_rx_size; 21954139cf3SJoao Pinto 220ce736788SJoao Pinto /* TX Queue */ 221ce736788SJoao Pinto struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 222aa042f60SSong, Yoong Siang unsigned int dma_tx_size; 223ce736788SJoao Pinto 2248fce3331SJose Abreu /* Generic channel for NAPI */ 2258fce3331SJose Abreu struct stmmac_channel channel[STMMAC_CH_MAX]; 2268fce3331SJose Abreu 2277ac6653aSJeff Kirsher int speed; 2287ac6653aSJeff Kirsher unsigned int flow_ctrl; 2297ac6653aSJeff Kirsher unsigned int pause; 2307ac6653aSJeff Kirsher struct mii_bus *mii; 2317ac6653aSJeff Kirsher int mii_irq[PHY_MAX_ADDR]; 2327ac6653aSJeff Kirsher 233eeef2f6bSJose Abreu struct phylink_config phylink_config; 234eeef2f6bSJose Abreu struct phylink *phylink; 235eeef2f6bSJose Abreu 2361bb6dea8SGiuseppe CAVALLARO struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 2378bf993a5SJose Abreu struct stmmac_safety_stats sstats; 2381bb6dea8SGiuseppe CAVALLARO struct plat_stmmacenet_data *plat; 2391bb6dea8SGiuseppe CAVALLARO struct dma_features dma_cap; 2401bb6dea8SGiuseppe CAVALLARO struct stmmac_counters mmc; 2411bb6dea8SGiuseppe CAVALLARO int hw_cap_support; 2421bb6dea8SGiuseppe CAVALLARO int synopsys_id; 2437ac6653aSJeff Kirsher u32 msg_enable; 2447ac6653aSJeff Kirsher int wolopts; 2453172d3afSDeepak Sikri int wol_irq; 246cd7201f4SGiuseppe CAVALLARO int clk_csr; 247d765955dSGiuseppe CAVALLARO struct timer_list eee_ctrl_timer; 248d765955dSGiuseppe CAVALLARO int lpi_irq; 249d765955dSGiuseppe CAVALLARO int eee_enabled; 250d765955dSGiuseppe CAVALLARO int eee_active; 251d765955dSGiuseppe CAVALLARO int tx_lpi_timer; 252388e201dSVineetha G. Jaya Kumaran int tx_lpi_enabled; 253388e201dSVineetha G. Jaya Kumaran int eee_tw_timer; 254be1c7eaeSVineetha G. Jaya Kumaran bool eee_sw_timer_en; 2554a7d666aSGiuseppe CAVALLARO unsigned int mode; 2565f0456b4SJose Abreu unsigned int chain_mode; 257c24602efSGiuseppe CAVALLARO int extend_desc; 258d6228b7cSArtem Panfilov struct hwtstamp_config tstamp_config; 25992ba6888SRayagond Kokatanur struct ptp_clock *ptp_clock; 26092ba6888SRayagond Kokatanur struct ptp_clock_info ptp_clock_ops; 2611bb6dea8SGiuseppe CAVALLARO unsigned int default_addend; 2629a8a02c9SJose Abreu u32 sub_second_inc; 2639a8a02c9SJose Abreu u32 systime_flags; 2641bb6dea8SGiuseppe CAVALLARO u32 adv_ts; 2651bb6dea8SGiuseppe CAVALLARO int use_riwt; 26689f7f2cfSSrinivas Kandagatla int irq_wake; 26792ba6888SRayagond Kokatanur spinlock_t ptp_lock; 268f4da5652STan Tee Min /* Protects auxiliary snapshot registers from concurrent access. */ 269f4da5652STan Tee Min struct mutex aux_ts_lock; 270f4da5652STan Tee Min 27136ff7c1eSAlexandre TORGUE void __iomem *mmcaddr; 272ba1ffd74SGiuseppe CAVALLARO void __iomem *ptpaddr; 2733cd1cfcbSJose Abreu unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 2748532f613SOng Boon Leong int sfty_ce_irq; 2758532f613SOng Boon Leong int sfty_ue_irq; 2768532f613SOng Boon Leong int rx_irq[MTL_MAX_RX_QUEUES]; 2778532f613SOng Boon Leong int tx_irq[MTL_MAX_TX_QUEUES]; 2788532f613SOng Boon Leong /*irq name */ 2798532f613SOng Boon Leong char int_name_mac[IFNAMSIZ + 9]; 2808532f613SOng Boon Leong char int_name_wol[IFNAMSIZ + 9]; 2818532f613SOng Boon Leong char int_name_lpi[IFNAMSIZ + 9]; 2828532f613SOng Boon Leong char int_name_sfty_ce[IFNAMSIZ + 10]; 2838532f613SOng Boon Leong char int_name_sfty_ue[IFNAMSIZ + 10]; 2848532f613SOng Boon Leong char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14]; 2858532f613SOng Boon Leong char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18]; 286466c5ac8SMathieu Olivari 287466c5ac8SMathieu Olivari #ifdef CONFIG_DEBUG_FS 288466c5ac8SMathieu Olivari struct dentry *dbgfs_dir; 289466c5ac8SMathieu Olivari #endif 29034877a15SJose Abreu 29134877a15SJose Abreu unsigned long state; 29234877a15SJose Abreu struct workqueue_struct *wq; 29334877a15SJose Abreu struct work_struct service_task; 2944dbbe8ddSJose Abreu 2955a558611SOng Boon Leong /* Workqueue for handling FPE hand-shaking */ 2965a558611SOng Boon Leong unsigned long fpe_task_state; 2975a558611SOng Boon Leong struct workqueue_struct *fpe_wq; 2985a558611SOng Boon Leong struct work_struct fpe_task; 2995a558611SOng Boon Leong char wq_name[IFNAMSIZ + 4]; 3005a558611SOng Boon Leong 3014dbbe8ddSJose Abreu /* TC Handling */ 3024dbbe8ddSJose Abreu unsigned int tc_entries_max; 3034dbbe8ddSJose Abreu unsigned int tc_off_max; 3044dbbe8ddSJose Abreu struct stmmac_tc_entry *tc_entries; 305425eabddSJose Abreu unsigned int flow_entries_max; 306425eabddSJose Abreu struct stmmac_flow_entry *flow_entries; 307aeb7c75cSOng Boon Leong unsigned int rfs_entries_max[STMMAC_RFS_T_MAX]; 308aeb7c75cSOng Boon Leong unsigned int rfs_entries_cnt[STMMAC_RFS_T_MAX]; 309aeb7c75cSOng Boon Leong unsigned int rfs_entries_total; 310aeb7c75cSOng Boon Leong struct stmmac_rfs_entry *rfs_entries; 3119a8a02c9SJose Abreu 3129a8a02c9SJose Abreu /* Pulse Per Second output */ 3139a8a02c9SJose Abreu struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 31476067459SJose Abreu 31576067459SJose Abreu /* Receive Side Scaling */ 31676067459SJose Abreu struct stmmac_rss rss; 3175fabb012SOng Boon Leong 3185fabb012SOng Boon Leong /* XDP BPF Program */ 319bba2556eSOng Boon Leong unsigned long *af_xdp_zc_qps; 3205fabb012SOng Boon Leong struct bpf_prog *xdp_prog; 32134877a15SJose Abreu }; 32234877a15SJose Abreu 32334877a15SJose Abreu enum stmmac_state { 32434877a15SJose Abreu STMMAC_DOWN, 32534877a15SJose Abreu STMMAC_RESET_REQUESTED, 32634877a15SJose Abreu STMMAC_RESETING, 32734877a15SJose Abreu STMMAC_SERVICE_SCHED, 3287ac6653aSJeff Kirsher }; 3297ac6653aSJeff Kirsher 330d6cc64efSJoe Perches int stmmac_mdio_unregister(struct net_device *ndev); 331d6cc64efSJoe Perches int stmmac_mdio_register(struct net_device *ndev); 332073752aaSSrinivas Kandagatla int stmmac_mdio_reset(struct mii_bus *mii); 333597a68ceSVoon Weifeng int stmmac_xpcs_setup(struct mii_bus *mii); 334d6cc64efSJoe Perches void stmmac_set_ethtool_ops(struct net_device *netdev); 335915af656SAndy Shevchenko 336a6da2bbbSHolger Assmann int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags); 337c30a70d3SGiuseppe CAVALLARO void stmmac_ptp_register(struct stmmac_priv *priv); 338d6cc64efSJoe Perches void stmmac_ptp_unregister(struct stmmac_priv *priv); 339ac746c85SOng Boon Leong int stmmac_xdp_open(struct net_device *dev); 340ac746c85SOng Boon Leong void stmmac_xdp_release(struct net_device *dev); 341f4e7bd81SJoachim Eastwood int stmmac_resume(struct device *dev); 342f4e7bd81SJoachim Eastwood int stmmac_suspend(struct device *dev); 343f4e7bd81SJoachim Eastwood int stmmac_dvr_remove(struct device *dev); 34415ffac73SJoachim Eastwood int stmmac_dvr_probe(struct device *device, 345cf3f047bSGiuseppe CAVALLARO struct plat_stmmacenet_data *plat_dat, 346e56788cfSJoachim Eastwood struct stmmac_resources *res); 347d765955dSGiuseppe CAVALLARO void stmmac_disable_eee_mode(struct stmmac_priv *priv); 348d765955dSGiuseppe CAVALLARO bool stmmac_eee_init(struct stmmac_priv *priv); 3490366f7e0SOng Boon Leong int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt); 350aa042f60SSong, Yoong Siang int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); 3515ec55823SJoakim Zhang int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled); 3525a558611SOng Boon Leong void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable); 353ba1377ffSGiuseppe CAVALLARO 3545fabb012SOng Boon Leong static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) 3555fabb012SOng Boon Leong { 3565fabb012SOng Boon Leong return !!priv->xdp_prog; 3575fabb012SOng Boon Leong } 3585fabb012SOng Boon Leong 3595fabb012SOng Boon Leong static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv) 3605fabb012SOng Boon Leong { 3615fabb012SOng Boon Leong if (stmmac_xdp_is_enabled(priv)) 36212d125b4SMarc Zyngier return XDP_PACKET_HEADROOM; 3635fabb012SOng Boon Leong 36412d125b4SMarc Zyngier return 0; 3655fabb012SOng Boon Leong } 3665fabb012SOng Boon Leong 367bba2556eSOng Boon Leong void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue); 368bba2556eSOng Boon Leong void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue); 369132c32eeSOng Boon Leong void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue); 370132c32eeSOng Boon Leong void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue); 371bba2556eSOng Boon Leong int stmmac_xsk_wakeup(struct net_device *dev, u32 queue, u32 flags); 37281c52c42SXiaoliang Yang struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time, 37381c52c42SXiaoliang Yang ktime_t current_time, 37481c52c42SXiaoliang Yang u64 cycle_time); 375bba2556eSOng Boon Leong 376091810dbSJose Abreu #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 377091810dbSJose Abreu void stmmac_selftest_run(struct net_device *dev, 378091810dbSJose Abreu struct ethtool_test *etest, u64 *buf); 379091810dbSJose Abreu void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 380091810dbSJose Abreu int stmmac_selftest_get_count(struct stmmac_priv *priv); 381091810dbSJose Abreu #else 382091810dbSJose Abreu static inline void stmmac_selftest_run(struct net_device *dev, 383091810dbSJose Abreu struct ethtool_test *etest, u64 *buf) 384091810dbSJose Abreu { 385091810dbSJose Abreu /* Not enabled */ 386091810dbSJose Abreu } 387091810dbSJose Abreu static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 388091810dbSJose Abreu u8 *data) 389091810dbSJose Abreu { 390091810dbSJose Abreu /* Not enabled */ 391091810dbSJose Abreu } 392091810dbSJose Abreu static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 393091810dbSJose Abreu { 394091810dbSJose Abreu return -EOPNOTSUPP; 395091810dbSJose Abreu } 396091810dbSJose Abreu #endif /* CONFIG_STMMAC_SELFTESTS */ 397091810dbSJose Abreu 398bd4242dfSRayagond Kokatanur #endif /* __STMMAC_H__ */ 399