xref: /openbmc/linux/drivers/net/ethernet/stmicro/stmmac/stmmac.h (revision be8b38a722e68ffa069b7dfa887369c33d6ea886)
14fa9c49fSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
27ac6653aSJeff Kirsher /*******************************************************************************
37ac6653aSJeff Kirsher   Copyright (C) 2007-2009  STMicroelectronics Ltd
47ac6653aSJeff Kirsher 
57ac6653aSJeff Kirsher 
67ac6653aSJeff Kirsher   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
77ac6653aSJeff Kirsher *******************************************************************************/
87ac6653aSJeff Kirsher 
9bd4242dfSRayagond Kokatanur #ifndef __STMMAC_H__
10bd4242dfSRayagond Kokatanur #define __STMMAC_H__
11bd4242dfSRayagond Kokatanur 
12bfab27a1SGiuseppe CAVALLARO #define STMMAC_RESOURCE_NAME   "stmmaceth"
1306bce7ddSAlexandre TORGUE #define DRV_MODULE_VERSION	"Jan_2016"
14ba1377ffSGiuseppe CAVALLARO 
15ba1377ffSGiuseppe CAVALLARO #include <linux/clk.h>
16d5a05e69SVincent Whitchurch #include <linux/hrtimer.h>
173cd1cfcbSJose Abreu #include <linux/if_vlan.h>
187ac6653aSJeff Kirsher #include <linux/stmmac.h>
19eeef2f6bSJose Abreu #include <linux/phylink.h>
2033d5e332SGiuseppe CAVALLARO #include <linux/pci.h>
217ac6653aSJeff Kirsher #include "common.h"
2292ba6888SRayagond Kokatanur #include <linux/ptp_clock_kernel.h>
23d6228b7cSArtem Panfilov #include <linux/net_tstamp.h>
24c5e4ddbdSChen-Yu Tsai #include <linux/reset.h>
252af6106aSJose Abreu #include <net/page_pool.h>
267ac6653aSJeff Kirsher 
27e56788cfSJoachim Eastwood struct stmmac_resources {
28e56788cfSJoachim Eastwood 	void __iomem *addr;
29e56788cfSJoachim Eastwood 	const char *mac;
30e56788cfSJoachim Eastwood 	int wol_irq;
31e56788cfSJoachim Eastwood 	int lpi_irq;
32e56788cfSJoachim Eastwood 	int irq;
338532f613SOng Boon Leong 	int sfty_ce_irq;
348532f613SOng Boon Leong 	int sfty_ue_irq;
358532f613SOng Boon Leong 	int rx_irq[MTL_MAX_RX_QUEUES];
368532f613SOng Boon Leong 	int tx_irq[MTL_MAX_TX_QUEUES];
37e56788cfSJoachim Eastwood };
38e56788cfSJoachim Eastwood 
39*be8b38a7SOng Boon Leong enum stmmac_txbuf_type {
40*be8b38a7SOng Boon Leong 	STMMAC_TXBUF_T_SKB,
41*be8b38a7SOng Boon Leong 	STMMAC_TXBUF_T_XDP_TX,
42*be8b38a7SOng Boon Leong };
43*be8b38a7SOng Boon Leong 
44362b37beSGiuseppe CAVALLARO struct stmmac_tx_info {
45362b37beSGiuseppe CAVALLARO 	dma_addr_t buf;
46362b37beSGiuseppe CAVALLARO 	bool map_as_page;
47553e2ab3SGiuseppe Cavallaro 	unsigned len;
482a6d8e17SGiuseppe Cavallaro 	bool last_segment;
4996951366SGiuseppe Cavallaro 	bool is_jumbo;
50*be8b38a7SOng Boon Leong 	enum stmmac_txbuf_type buf_type;
51362b37beSGiuseppe CAVALLARO };
52362b37beSGiuseppe CAVALLARO 
53579a25a8SJose Abreu #define STMMAC_TBS_AVAIL	BIT(0)
54579a25a8SJose Abreu #define STMMAC_TBS_EN		BIT(1)
55579a25a8SJose Abreu 
56ce736788SJoao Pinto /* Frequently used values are kept adjacent for cache effect */
57ce736788SJoao Pinto struct stmmac_tx_queue {
588fce3331SJose Abreu 	u32 tx_count_frames;
59579a25a8SJose Abreu 	int tbs;
60d5a05e69SVincent Whitchurch 	struct hrtimer txtimer;
61ce736788SJoao Pinto 	u32 queue_index;
62ce736788SJoao Pinto 	struct stmmac_priv *priv_data;
63ce736788SJoao Pinto 	struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
64579a25a8SJose Abreu 	struct dma_edesc *dma_entx;
65ce736788SJoao Pinto 	struct dma_desc *dma_tx;
66*be8b38a7SOng Boon Leong 	union {
67ce736788SJoao Pinto 		struct sk_buff **tx_skbuff;
68*be8b38a7SOng Boon Leong 		struct xdp_frame **xdpf;
69*be8b38a7SOng Boon Leong 	};
70ce736788SJoao Pinto 	struct stmmac_tx_info *tx_skbuff_dma;
71ce736788SJoao Pinto 	unsigned int cur_tx;
72ce736788SJoao Pinto 	unsigned int dirty_tx;
73ce736788SJoao Pinto 	dma_addr_t dma_tx_phy;
74ce736788SJoao Pinto 	u32 tx_tail_addr;
758d212a9eSNiklas Cassel 	u32 mss;
76ce736788SJoao Pinto };
77ce736788SJoao Pinto 
782af6106aSJose Abreu struct stmmac_rx_buffer {
792af6106aSJose Abreu 	struct page *page;
802af6106aSJose Abreu 	dma_addr_t addr;
815fabb012SOng Boon Leong 	__u32 page_offset;
825fabb012SOng Boon Leong 	struct page *sec_page;
8367afd6d1SJose Abreu 	dma_addr_t sec_addr;
842af6106aSJose Abreu };
852af6106aSJose Abreu 
8654139cf3SJoao Pinto struct stmmac_rx_queue {
87d429b66eSJose Abreu 	u32 rx_count_frames;
8854139cf3SJoao Pinto 	u32 queue_index;
89*be8b38a7SOng Boon Leong 	struct xdp_rxq_info xdp_rxq;
902af6106aSJose Abreu 	struct page_pool *page_pool;
912af6106aSJose Abreu 	struct stmmac_rx_buffer *buf_pool;
9254139cf3SJoao Pinto 	struct stmmac_priv *priv_data;
9354139cf3SJoao Pinto 	struct dma_extended_desc *dma_erx;
9454139cf3SJoao Pinto 	struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
9554139cf3SJoao Pinto 	unsigned int cur_rx;
9654139cf3SJoao Pinto 	unsigned int dirty_rx;
9754139cf3SJoao Pinto 	u32 rx_zeroc_thresh;
9854139cf3SJoao Pinto 	dma_addr_t dma_rx_phy;
9954139cf3SJoao Pinto 	u32 rx_tail_addr;
100ec222003SJose Abreu 	unsigned int state_saved;
101ec222003SJose Abreu 	struct {
102ec222003SJose Abreu 		struct sk_buff *skb;
103ec222003SJose Abreu 		unsigned int len;
104ec222003SJose Abreu 		unsigned int error;
105ec222003SJose Abreu 	} state;
1068fce3331SJose Abreu };
1078fce3331SJose Abreu 
1088fce3331SJose Abreu struct stmmac_channel {
1094ccb4585SJose Abreu 	struct napi_struct rx_napi ____cacheline_aligned_in_smp;
1104ccb4585SJose Abreu 	struct napi_struct tx_napi ____cacheline_aligned_in_smp;
1118fce3331SJose Abreu 	struct stmmac_priv *priv_data;
112021bd5e3SJose Abreu 	spinlock_t lock;
1138fce3331SJose Abreu 	u32 index;
11454139cf3SJoao Pinto };
11554139cf3SJoao Pinto 
1164dbbe8ddSJose Abreu struct stmmac_tc_entry {
1174dbbe8ddSJose Abreu 	bool in_use;
1184dbbe8ddSJose Abreu 	bool in_hw;
1194dbbe8ddSJose Abreu 	bool is_last;
1204dbbe8ddSJose Abreu 	bool is_frag;
1214dbbe8ddSJose Abreu 	void *frag_ptr;
1224dbbe8ddSJose Abreu 	unsigned int table_pos;
1234dbbe8ddSJose Abreu 	u32 handle;
1244dbbe8ddSJose Abreu 	u32 prio;
1254dbbe8ddSJose Abreu 	struct {
1264dbbe8ddSJose Abreu 		u32 match_data;
1274dbbe8ddSJose Abreu 		u32 match_en;
1284dbbe8ddSJose Abreu 		u8 af:1;
1294dbbe8ddSJose Abreu 		u8 rf:1;
1304dbbe8ddSJose Abreu 		u8 im:1;
1314dbbe8ddSJose Abreu 		u8 nc:1;
1324dbbe8ddSJose Abreu 		u8 res1:4;
1334dbbe8ddSJose Abreu 		u8 frame_offset;
1344dbbe8ddSJose Abreu 		u8 ok_index;
1354dbbe8ddSJose Abreu 		u8 dma_ch_no;
1364dbbe8ddSJose Abreu 		u32 res2;
1374dbbe8ddSJose Abreu 	} __packed val;
1384dbbe8ddSJose Abreu };
1394dbbe8ddSJose Abreu 
1409a8a02c9SJose Abreu #define STMMAC_PPS_MAX		4
1419a8a02c9SJose Abreu struct stmmac_pps_cfg {
1429a8a02c9SJose Abreu 	bool available;
1439a8a02c9SJose Abreu 	struct timespec64 start;
1449a8a02c9SJose Abreu 	struct timespec64 period;
1459a8a02c9SJose Abreu };
1469a8a02c9SJose Abreu 
14776067459SJose Abreu struct stmmac_rss {
14876067459SJose Abreu 	int enable;
14976067459SJose Abreu 	u8 key[STMMAC_RSS_HASH_KEY_SIZE];
15076067459SJose Abreu 	u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
15176067459SJose Abreu };
15276067459SJose Abreu 
153425eabddSJose Abreu #define STMMAC_FLOW_ACTION_DROP		BIT(0)
154425eabddSJose Abreu struct stmmac_flow_entry {
155425eabddSJose Abreu 	unsigned long cookie;
156425eabddSJose Abreu 	unsigned long action;
157425eabddSJose Abreu 	u8 ip_proto;
158425eabddSJose Abreu 	int in_use;
159425eabddSJose Abreu 	int idx;
160425eabddSJose Abreu 	int is_l4;
161425eabddSJose Abreu };
162425eabddSJose Abreu 
1637ac6653aSJeff Kirsher struct stmmac_priv {
1647ac6653aSJeff Kirsher 	/* Frequently used values are kept adjacent for cache effect */
165db2f2842SOng Boon Leong 	u32 tx_coal_frames[MTL_MAX_TX_QUEUES];
166db2f2842SOng Boon Leong 	u32 tx_coal_timer[MTL_MAX_TX_QUEUES];
167db2f2842SOng Boon Leong 	u32 rx_coal_frames[MTL_MAX_TX_QUEUES];
168ce736788SJoao Pinto 
1697ac6653aSJeff Kirsher 	int tx_coalesce;
1701bb6dea8SGiuseppe CAVALLARO 	int hwts_tx_en;
1711bb6dea8SGiuseppe CAVALLARO 	bool tx_path_in_lpi_mode;
172f748be53SAlexandre TORGUE 	bool tso;
17367afd6d1SJose Abreu 	int sph;
174d08d32d1SOng Boon Leong 	int sph_cap;
1758000ddc0SJose Abreu 	u32 sarc_type;
1767ac6653aSJeff Kirsher 
1777ac6653aSJeff Kirsher 	unsigned int dma_buf_sz;
17822ad3838SGiuseppe Cavallaro 	unsigned int rx_copybreak;
179db2f2842SOng Boon Leong 	u32 rx_riwt[MTL_MAX_TX_QUEUES];
1801bb6dea8SGiuseppe CAVALLARO 	int hwts_rx_en;
1815bacd778SLABBE Corentin 
1821bb6dea8SGiuseppe CAVALLARO 	void __iomem *ioaddr;
1831bb6dea8SGiuseppe CAVALLARO 	struct net_device *dev;
1847ac6653aSJeff Kirsher 	struct device *device;
1857ac6653aSJeff Kirsher 	struct mac_device_info *hw;
1867cfde0afSJose Abreu 	int (*hwif_quirks)(struct stmmac_priv *priv);
18729555fa3SThierry Reding 	struct mutex lock;
1887ac6653aSJeff Kirsher 
18954139cf3SJoao Pinto 	/* RX Queue */
19054139cf3SJoao Pinto 	struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
191aa042f60SSong, Yoong Siang 	unsigned int dma_rx_size;
19254139cf3SJoao Pinto 
193ce736788SJoao Pinto 	/* TX Queue */
194ce736788SJoao Pinto 	struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
195aa042f60SSong, Yoong Siang 	unsigned int dma_tx_size;
196ce736788SJoao Pinto 
1978fce3331SJose Abreu 	/* Generic channel for NAPI */
1988fce3331SJose Abreu 	struct stmmac_channel channel[STMMAC_CH_MAX];
1998fce3331SJose Abreu 
2007ac6653aSJeff Kirsher 	int speed;
2017ac6653aSJeff Kirsher 	unsigned int flow_ctrl;
2027ac6653aSJeff Kirsher 	unsigned int pause;
2037ac6653aSJeff Kirsher 	struct mii_bus *mii;
2047ac6653aSJeff Kirsher 	int mii_irq[PHY_MAX_ADDR];
2057ac6653aSJeff Kirsher 
206eeef2f6bSJose Abreu 	struct phylink_config phylink_config;
207eeef2f6bSJose Abreu 	struct phylink *phylink;
208eeef2f6bSJose Abreu 
2091bb6dea8SGiuseppe CAVALLARO 	struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
2108bf993a5SJose Abreu 	struct stmmac_safety_stats sstats;
2111bb6dea8SGiuseppe CAVALLARO 	struct plat_stmmacenet_data *plat;
2121bb6dea8SGiuseppe CAVALLARO 	struct dma_features dma_cap;
2131bb6dea8SGiuseppe CAVALLARO 	struct stmmac_counters mmc;
2141bb6dea8SGiuseppe CAVALLARO 	int hw_cap_support;
2151bb6dea8SGiuseppe CAVALLARO 	int synopsys_id;
2167ac6653aSJeff Kirsher 	u32 msg_enable;
2177ac6653aSJeff Kirsher 	int wolopts;
2183172d3afSDeepak Sikri 	int wol_irq;
219cd7201f4SGiuseppe CAVALLARO 	int clk_csr;
220d765955dSGiuseppe CAVALLARO 	struct timer_list eee_ctrl_timer;
221d765955dSGiuseppe CAVALLARO 	int lpi_irq;
222d765955dSGiuseppe CAVALLARO 	int eee_enabled;
223d765955dSGiuseppe CAVALLARO 	int eee_active;
224d765955dSGiuseppe CAVALLARO 	int tx_lpi_timer;
225388e201dSVineetha G. Jaya Kumaran 	int tx_lpi_enabled;
226388e201dSVineetha G. Jaya Kumaran 	int eee_tw_timer;
227be1c7eaeSVineetha G. Jaya Kumaran 	bool eee_sw_timer_en;
2284a7d666aSGiuseppe CAVALLARO 	unsigned int mode;
2295f0456b4SJose Abreu 	unsigned int chain_mode;
230c24602efSGiuseppe CAVALLARO 	int extend_desc;
231d6228b7cSArtem Panfilov 	struct hwtstamp_config tstamp_config;
23292ba6888SRayagond Kokatanur 	struct ptp_clock *ptp_clock;
23392ba6888SRayagond Kokatanur 	struct ptp_clock_info ptp_clock_ops;
2341bb6dea8SGiuseppe CAVALLARO 	unsigned int default_addend;
2359a8a02c9SJose Abreu 	u32 sub_second_inc;
2369a8a02c9SJose Abreu 	u32 systime_flags;
2371bb6dea8SGiuseppe CAVALLARO 	u32 adv_ts;
2381bb6dea8SGiuseppe CAVALLARO 	int use_riwt;
23989f7f2cfSSrinivas Kandagatla 	int irq_wake;
24092ba6888SRayagond Kokatanur 	spinlock_t ptp_lock;
24136ff7c1eSAlexandre TORGUE 	void __iomem *mmcaddr;
242ba1ffd74SGiuseppe CAVALLARO 	void __iomem *ptpaddr;
2433cd1cfcbSJose Abreu 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
2448532f613SOng Boon Leong 	int sfty_ce_irq;
2458532f613SOng Boon Leong 	int sfty_ue_irq;
2468532f613SOng Boon Leong 	int rx_irq[MTL_MAX_RX_QUEUES];
2478532f613SOng Boon Leong 	int tx_irq[MTL_MAX_TX_QUEUES];
2488532f613SOng Boon Leong 	/*irq name */
2498532f613SOng Boon Leong 	char int_name_mac[IFNAMSIZ + 9];
2508532f613SOng Boon Leong 	char int_name_wol[IFNAMSIZ + 9];
2518532f613SOng Boon Leong 	char int_name_lpi[IFNAMSIZ + 9];
2528532f613SOng Boon Leong 	char int_name_sfty_ce[IFNAMSIZ + 10];
2538532f613SOng Boon Leong 	char int_name_sfty_ue[IFNAMSIZ + 10];
2548532f613SOng Boon Leong 	char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14];
2558532f613SOng Boon Leong 	char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18];
256466c5ac8SMathieu Olivari 
257466c5ac8SMathieu Olivari #ifdef CONFIG_DEBUG_FS
258466c5ac8SMathieu Olivari 	struct dentry *dbgfs_dir;
259466c5ac8SMathieu Olivari #endif
26034877a15SJose Abreu 
26134877a15SJose Abreu 	unsigned long state;
26234877a15SJose Abreu 	struct workqueue_struct *wq;
26334877a15SJose Abreu 	struct work_struct service_task;
2644dbbe8ddSJose Abreu 
2655a558611SOng Boon Leong 	/* Workqueue for handling FPE hand-shaking */
2665a558611SOng Boon Leong 	unsigned long fpe_task_state;
2675a558611SOng Boon Leong 	struct workqueue_struct *fpe_wq;
2685a558611SOng Boon Leong 	struct work_struct fpe_task;
2695a558611SOng Boon Leong 	char wq_name[IFNAMSIZ + 4];
2705a558611SOng Boon Leong 
2714dbbe8ddSJose Abreu 	/* TC Handling */
2724dbbe8ddSJose Abreu 	unsigned int tc_entries_max;
2734dbbe8ddSJose Abreu 	unsigned int tc_off_max;
2744dbbe8ddSJose Abreu 	struct stmmac_tc_entry *tc_entries;
275425eabddSJose Abreu 	unsigned int flow_entries_max;
276425eabddSJose Abreu 	struct stmmac_flow_entry *flow_entries;
2779a8a02c9SJose Abreu 
2789a8a02c9SJose Abreu 	/* Pulse Per Second output */
2799a8a02c9SJose Abreu 	struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
28076067459SJose Abreu 
28176067459SJose Abreu 	/* Receive Side Scaling */
28276067459SJose Abreu 	struct stmmac_rss rss;
2835fabb012SOng Boon Leong 
2845fabb012SOng Boon Leong 	/* XDP BPF Program */
2855fabb012SOng Boon Leong 	struct bpf_prog *xdp_prog;
28634877a15SJose Abreu };
28734877a15SJose Abreu 
28834877a15SJose Abreu enum stmmac_state {
28934877a15SJose Abreu 	STMMAC_DOWN,
29034877a15SJose Abreu 	STMMAC_RESET_REQUESTED,
29134877a15SJose Abreu 	STMMAC_RESETING,
29234877a15SJose Abreu 	STMMAC_SERVICE_SCHED,
2937ac6653aSJeff Kirsher };
2947ac6653aSJeff Kirsher 
295d6cc64efSJoe Perches int stmmac_mdio_unregister(struct net_device *ndev);
296d6cc64efSJoe Perches int stmmac_mdio_register(struct net_device *ndev);
297073752aaSSrinivas Kandagatla int stmmac_mdio_reset(struct mii_bus *mii);
298d6cc64efSJoe Perches void stmmac_set_ethtool_ops(struct net_device *netdev);
299915af656SAndy Shevchenko 
300c30a70d3SGiuseppe CAVALLARO void stmmac_ptp_register(struct stmmac_priv *priv);
301d6cc64efSJoe Perches void stmmac_ptp_unregister(struct stmmac_priv *priv);
3025fabb012SOng Boon Leong int stmmac_open(struct net_device *dev);
3035fabb012SOng Boon Leong int stmmac_release(struct net_device *dev);
304f4e7bd81SJoachim Eastwood int stmmac_resume(struct device *dev);
305f4e7bd81SJoachim Eastwood int stmmac_suspend(struct device *dev);
306f4e7bd81SJoachim Eastwood int stmmac_dvr_remove(struct device *dev);
30715ffac73SJoachim Eastwood int stmmac_dvr_probe(struct device *device,
308cf3f047bSGiuseppe CAVALLARO 		     struct plat_stmmacenet_data *plat_dat,
309e56788cfSJoachim Eastwood 		     struct stmmac_resources *res);
310d765955dSGiuseppe CAVALLARO void stmmac_disable_eee_mode(struct stmmac_priv *priv);
311d765955dSGiuseppe CAVALLARO bool stmmac_eee_init(struct stmmac_priv *priv);
3120366f7e0SOng Boon Leong int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt);
313aa042f60SSong, Yoong Siang int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size);
3145ec55823SJoakim Zhang int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled);
3155a558611SOng Boon Leong void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable);
316ba1377ffSGiuseppe CAVALLARO 
3175fabb012SOng Boon Leong static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv)
3185fabb012SOng Boon Leong {
3195fabb012SOng Boon Leong 	return !!priv->xdp_prog;
3205fabb012SOng Boon Leong }
3215fabb012SOng Boon Leong 
3225fabb012SOng Boon Leong static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv)
3235fabb012SOng Boon Leong {
3245fabb012SOng Boon Leong 	if (stmmac_xdp_is_enabled(priv))
3255fabb012SOng Boon Leong 		return XDP_PACKET_HEADROOM;
3265fabb012SOng Boon Leong 
3275fabb012SOng Boon Leong 	return 0;
3285fabb012SOng Boon Leong }
3295fabb012SOng Boon Leong 
330091810dbSJose Abreu #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
331091810dbSJose Abreu void stmmac_selftest_run(struct net_device *dev,
332091810dbSJose Abreu 			 struct ethtool_test *etest, u64 *buf);
333091810dbSJose Abreu void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
334091810dbSJose Abreu int stmmac_selftest_get_count(struct stmmac_priv *priv);
335091810dbSJose Abreu #else
336091810dbSJose Abreu static inline void stmmac_selftest_run(struct net_device *dev,
337091810dbSJose Abreu 				       struct ethtool_test *etest, u64 *buf)
338091810dbSJose Abreu {
339091810dbSJose Abreu 	/* Not enabled */
340091810dbSJose Abreu }
341091810dbSJose Abreu static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
342091810dbSJose Abreu 					       u8 *data)
343091810dbSJose Abreu {
344091810dbSJose Abreu 	/* Not enabled */
345091810dbSJose Abreu }
346091810dbSJose Abreu static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
347091810dbSJose Abreu {
348091810dbSJose Abreu 	return -EOPNOTSUPP;
349091810dbSJose Abreu }
350091810dbSJose Abreu #endif /* CONFIG_STMMAC_SELFTESTS */
351091810dbSJose Abreu 
352bd4242dfSRayagond Kokatanur #endif /* __STMMAC_H__ */
353