14fa9c49fSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 27ac6653aSJeff Kirsher /******************************************************************************* 37ac6653aSJeff Kirsher Copyright (C) 2007-2009 STMicroelectronics Ltd 47ac6653aSJeff Kirsher 57ac6653aSJeff Kirsher 67ac6653aSJeff Kirsher Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 77ac6653aSJeff Kirsher *******************************************************************************/ 87ac6653aSJeff Kirsher 9bd4242dfSRayagond Kokatanur #ifndef __STMMAC_H__ 10bd4242dfSRayagond Kokatanur #define __STMMAC_H__ 11bd4242dfSRayagond Kokatanur 12bfab27a1SGiuseppe CAVALLARO #define STMMAC_RESOURCE_NAME "stmmaceth" 1306bce7ddSAlexandre TORGUE #define DRV_MODULE_VERSION "Jan_2016" 14ba1377ffSGiuseppe CAVALLARO 15ba1377ffSGiuseppe CAVALLARO #include <linux/clk.h> 16d5a05e69SVincent Whitchurch #include <linux/hrtimer.h> 173cd1cfcbSJose Abreu #include <linux/if_vlan.h> 187ac6653aSJeff Kirsher #include <linux/stmmac.h> 19eeef2f6bSJose Abreu #include <linux/phylink.h> 2033d5e332SGiuseppe CAVALLARO #include <linux/pci.h> 217ac6653aSJeff Kirsher #include "common.h" 2292ba6888SRayagond Kokatanur #include <linux/ptp_clock_kernel.h> 23d6228b7cSArtem Panfilov #include <linux/net_tstamp.h> 24c5e4ddbdSChen-Yu Tsai #include <linux/reset.h> 252af6106aSJose Abreu #include <net/page_pool.h> 267ac6653aSJeff Kirsher 27e56788cfSJoachim Eastwood struct stmmac_resources { 28e56788cfSJoachim Eastwood void __iomem *addr; 29e56788cfSJoachim Eastwood const char *mac; 30e56788cfSJoachim Eastwood int wol_irq; 31e56788cfSJoachim Eastwood int lpi_irq; 32e56788cfSJoachim Eastwood int irq; 338532f613SOng Boon Leong int sfty_ce_irq; 348532f613SOng Boon Leong int sfty_ue_irq; 358532f613SOng Boon Leong int rx_irq[MTL_MAX_RX_QUEUES]; 368532f613SOng Boon Leong int tx_irq[MTL_MAX_TX_QUEUES]; 37e56788cfSJoachim Eastwood }; 38e56788cfSJoachim Eastwood 39be8b38a7SOng Boon Leong enum stmmac_txbuf_type { 40be8b38a7SOng Boon Leong STMMAC_TXBUF_T_SKB, 41be8b38a7SOng Boon Leong STMMAC_TXBUF_T_XDP_TX, 42*8b278a5bSOng Boon Leong STMMAC_TXBUF_T_XDP_NDO, 43be8b38a7SOng Boon Leong }; 44be8b38a7SOng Boon Leong 45362b37beSGiuseppe CAVALLARO struct stmmac_tx_info { 46362b37beSGiuseppe CAVALLARO dma_addr_t buf; 47362b37beSGiuseppe CAVALLARO bool map_as_page; 48553e2ab3SGiuseppe Cavallaro unsigned len; 492a6d8e17SGiuseppe Cavallaro bool last_segment; 5096951366SGiuseppe Cavallaro bool is_jumbo; 51be8b38a7SOng Boon Leong enum stmmac_txbuf_type buf_type; 52362b37beSGiuseppe CAVALLARO }; 53362b37beSGiuseppe CAVALLARO 54579a25a8SJose Abreu #define STMMAC_TBS_AVAIL BIT(0) 55579a25a8SJose Abreu #define STMMAC_TBS_EN BIT(1) 56579a25a8SJose Abreu 57ce736788SJoao Pinto /* Frequently used values are kept adjacent for cache effect */ 58ce736788SJoao Pinto struct stmmac_tx_queue { 598fce3331SJose Abreu u32 tx_count_frames; 60579a25a8SJose Abreu int tbs; 61d5a05e69SVincent Whitchurch struct hrtimer txtimer; 62ce736788SJoao Pinto u32 queue_index; 63ce736788SJoao Pinto struct stmmac_priv *priv_data; 64ce736788SJoao Pinto struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 65579a25a8SJose Abreu struct dma_edesc *dma_entx; 66ce736788SJoao Pinto struct dma_desc *dma_tx; 67be8b38a7SOng Boon Leong union { 68ce736788SJoao Pinto struct sk_buff **tx_skbuff; 69be8b38a7SOng Boon Leong struct xdp_frame **xdpf; 70be8b38a7SOng Boon Leong }; 71ce736788SJoao Pinto struct stmmac_tx_info *tx_skbuff_dma; 72ce736788SJoao Pinto unsigned int cur_tx; 73ce736788SJoao Pinto unsigned int dirty_tx; 74ce736788SJoao Pinto dma_addr_t dma_tx_phy; 75ce736788SJoao Pinto u32 tx_tail_addr; 768d212a9eSNiklas Cassel u32 mss; 77ce736788SJoao Pinto }; 78ce736788SJoao Pinto 792af6106aSJose Abreu struct stmmac_rx_buffer { 802af6106aSJose Abreu struct page *page; 812af6106aSJose Abreu dma_addr_t addr; 825fabb012SOng Boon Leong __u32 page_offset; 835fabb012SOng Boon Leong struct page *sec_page; 8467afd6d1SJose Abreu dma_addr_t sec_addr; 852af6106aSJose Abreu }; 862af6106aSJose Abreu 8754139cf3SJoao Pinto struct stmmac_rx_queue { 88d429b66eSJose Abreu u32 rx_count_frames; 8954139cf3SJoao Pinto u32 queue_index; 90be8b38a7SOng Boon Leong struct xdp_rxq_info xdp_rxq; 912af6106aSJose Abreu struct page_pool *page_pool; 922af6106aSJose Abreu struct stmmac_rx_buffer *buf_pool; 9354139cf3SJoao Pinto struct stmmac_priv *priv_data; 9454139cf3SJoao Pinto struct dma_extended_desc *dma_erx; 9554139cf3SJoao Pinto struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 9654139cf3SJoao Pinto unsigned int cur_rx; 9754139cf3SJoao Pinto unsigned int dirty_rx; 9854139cf3SJoao Pinto u32 rx_zeroc_thresh; 9954139cf3SJoao Pinto dma_addr_t dma_rx_phy; 10054139cf3SJoao Pinto u32 rx_tail_addr; 101ec222003SJose Abreu unsigned int state_saved; 102ec222003SJose Abreu struct { 103ec222003SJose Abreu struct sk_buff *skb; 104ec222003SJose Abreu unsigned int len; 105ec222003SJose Abreu unsigned int error; 106ec222003SJose Abreu } state; 1078fce3331SJose Abreu }; 1088fce3331SJose Abreu 1098fce3331SJose Abreu struct stmmac_channel { 1104ccb4585SJose Abreu struct napi_struct rx_napi ____cacheline_aligned_in_smp; 1114ccb4585SJose Abreu struct napi_struct tx_napi ____cacheline_aligned_in_smp; 1128fce3331SJose Abreu struct stmmac_priv *priv_data; 113021bd5e3SJose Abreu spinlock_t lock; 1148fce3331SJose Abreu u32 index; 11554139cf3SJoao Pinto }; 11654139cf3SJoao Pinto 1174dbbe8ddSJose Abreu struct stmmac_tc_entry { 1184dbbe8ddSJose Abreu bool in_use; 1194dbbe8ddSJose Abreu bool in_hw; 1204dbbe8ddSJose Abreu bool is_last; 1214dbbe8ddSJose Abreu bool is_frag; 1224dbbe8ddSJose Abreu void *frag_ptr; 1234dbbe8ddSJose Abreu unsigned int table_pos; 1244dbbe8ddSJose Abreu u32 handle; 1254dbbe8ddSJose Abreu u32 prio; 1264dbbe8ddSJose Abreu struct { 1274dbbe8ddSJose Abreu u32 match_data; 1284dbbe8ddSJose Abreu u32 match_en; 1294dbbe8ddSJose Abreu u8 af:1; 1304dbbe8ddSJose Abreu u8 rf:1; 1314dbbe8ddSJose Abreu u8 im:1; 1324dbbe8ddSJose Abreu u8 nc:1; 1334dbbe8ddSJose Abreu u8 res1:4; 1344dbbe8ddSJose Abreu u8 frame_offset; 1354dbbe8ddSJose Abreu u8 ok_index; 1364dbbe8ddSJose Abreu u8 dma_ch_no; 1374dbbe8ddSJose Abreu u32 res2; 1384dbbe8ddSJose Abreu } __packed val; 1394dbbe8ddSJose Abreu }; 1404dbbe8ddSJose Abreu 1419a8a02c9SJose Abreu #define STMMAC_PPS_MAX 4 1429a8a02c9SJose Abreu struct stmmac_pps_cfg { 1439a8a02c9SJose Abreu bool available; 1449a8a02c9SJose Abreu struct timespec64 start; 1459a8a02c9SJose Abreu struct timespec64 period; 1469a8a02c9SJose Abreu }; 1479a8a02c9SJose Abreu 14876067459SJose Abreu struct stmmac_rss { 14976067459SJose Abreu int enable; 15076067459SJose Abreu u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 15176067459SJose Abreu u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 15276067459SJose Abreu }; 15376067459SJose Abreu 154425eabddSJose Abreu #define STMMAC_FLOW_ACTION_DROP BIT(0) 155425eabddSJose Abreu struct stmmac_flow_entry { 156425eabddSJose Abreu unsigned long cookie; 157425eabddSJose Abreu unsigned long action; 158425eabddSJose Abreu u8 ip_proto; 159425eabddSJose Abreu int in_use; 160425eabddSJose Abreu int idx; 161425eabddSJose Abreu int is_l4; 162425eabddSJose Abreu }; 163425eabddSJose Abreu 1647ac6653aSJeff Kirsher struct stmmac_priv { 1657ac6653aSJeff Kirsher /* Frequently used values are kept adjacent for cache effect */ 166db2f2842SOng Boon Leong u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; 167db2f2842SOng Boon Leong u32 tx_coal_timer[MTL_MAX_TX_QUEUES]; 168db2f2842SOng Boon Leong u32 rx_coal_frames[MTL_MAX_TX_QUEUES]; 169ce736788SJoao Pinto 1707ac6653aSJeff Kirsher int tx_coalesce; 1711bb6dea8SGiuseppe CAVALLARO int hwts_tx_en; 1721bb6dea8SGiuseppe CAVALLARO bool tx_path_in_lpi_mode; 173f748be53SAlexandre TORGUE bool tso; 17467afd6d1SJose Abreu int sph; 175d08d32d1SOng Boon Leong int sph_cap; 1768000ddc0SJose Abreu u32 sarc_type; 1777ac6653aSJeff Kirsher 1787ac6653aSJeff Kirsher unsigned int dma_buf_sz; 17922ad3838SGiuseppe Cavallaro unsigned int rx_copybreak; 180db2f2842SOng Boon Leong u32 rx_riwt[MTL_MAX_TX_QUEUES]; 1811bb6dea8SGiuseppe CAVALLARO int hwts_rx_en; 1825bacd778SLABBE Corentin 1831bb6dea8SGiuseppe CAVALLARO void __iomem *ioaddr; 1841bb6dea8SGiuseppe CAVALLARO struct net_device *dev; 1857ac6653aSJeff Kirsher struct device *device; 1867ac6653aSJeff Kirsher struct mac_device_info *hw; 1877cfde0afSJose Abreu int (*hwif_quirks)(struct stmmac_priv *priv); 18829555fa3SThierry Reding struct mutex lock; 1897ac6653aSJeff Kirsher 19054139cf3SJoao Pinto /* RX Queue */ 19154139cf3SJoao Pinto struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 192aa042f60SSong, Yoong Siang unsigned int dma_rx_size; 19354139cf3SJoao Pinto 194ce736788SJoao Pinto /* TX Queue */ 195ce736788SJoao Pinto struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 196aa042f60SSong, Yoong Siang unsigned int dma_tx_size; 197ce736788SJoao Pinto 1988fce3331SJose Abreu /* Generic channel for NAPI */ 1998fce3331SJose Abreu struct stmmac_channel channel[STMMAC_CH_MAX]; 2008fce3331SJose Abreu 2017ac6653aSJeff Kirsher int speed; 2027ac6653aSJeff Kirsher unsigned int flow_ctrl; 2037ac6653aSJeff Kirsher unsigned int pause; 2047ac6653aSJeff Kirsher struct mii_bus *mii; 2057ac6653aSJeff Kirsher int mii_irq[PHY_MAX_ADDR]; 2067ac6653aSJeff Kirsher 207eeef2f6bSJose Abreu struct phylink_config phylink_config; 208eeef2f6bSJose Abreu struct phylink *phylink; 209eeef2f6bSJose Abreu 2101bb6dea8SGiuseppe CAVALLARO struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 2118bf993a5SJose Abreu struct stmmac_safety_stats sstats; 2121bb6dea8SGiuseppe CAVALLARO struct plat_stmmacenet_data *plat; 2131bb6dea8SGiuseppe CAVALLARO struct dma_features dma_cap; 2141bb6dea8SGiuseppe CAVALLARO struct stmmac_counters mmc; 2151bb6dea8SGiuseppe CAVALLARO int hw_cap_support; 2161bb6dea8SGiuseppe CAVALLARO int synopsys_id; 2177ac6653aSJeff Kirsher u32 msg_enable; 2187ac6653aSJeff Kirsher int wolopts; 2193172d3afSDeepak Sikri int wol_irq; 220cd7201f4SGiuseppe CAVALLARO int clk_csr; 221d765955dSGiuseppe CAVALLARO struct timer_list eee_ctrl_timer; 222d765955dSGiuseppe CAVALLARO int lpi_irq; 223d765955dSGiuseppe CAVALLARO int eee_enabled; 224d765955dSGiuseppe CAVALLARO int eee_active; 225d765955dSGiuseppe CAVALLARO int tx_lpi_timer; 226388e201dSVineetha G. Jaya Kumaran int tx_lpi_enabled; 227388e201dSVineetha G. Jaya Kumaran int eee_tw_timer; 228be1c7eaeSVineetha G. Jaya Kumaran bool eee_sw_timer_en; 2294a7d666aSGiuseppe CAVALLARO unsigned int mode; 2305f0456b4SJose Abreu unsigned int chain_mode; 231c24602efSGiuseppe CAVALLARO int extend_desc; 232d6228b7cSArtem Panfilov struct hwtstamp_config tstamp_config; 23392ba6888SRayagond Kokatanur struct ptp_clock *ptp_clock; 23492ba6888SRayagond Kokatanur struct ptp_clock_info ptp_clock_ops; 2351bb6dea8SGiuseppe CAVALLARO unsigned int default_addend; 2369a8a02c9SJose Abreu u32 sub_second_inc; 2379a8a02c9SJose Abreu u32 systime_flags; 2381bb6dea8SGiuseppe CAVALLARO u32 adv_ts; 2391bb6dea8SGiuseppe CAVALLARO int use_riwt; 24089f7f2cfSSrinivas Kandagatla int irq_wake; 24192ba6888SRayagond Kokatanur spinlock_t ptp_lock; 24236ff7c1eSAlexandre TORGUE void __iomem *mmcaddr; 243ba1ffd74SGiuseppe CAVALLARO void __iomem *ptpaddr; 2443cd1cfcbSJose Abreu unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 2458532f613SOng Boon Leong int sfty_ce_irq; 2468532f613SOng Boon Leong int sfty_ue_irq; 2478532f613SOng Boon Leong int rx_irq[MTL_MAX_RX_QUEUES]; 2488532f613SOng Boon Leong int tx_irq[MTL_MAX_TX_QUEUES]; 2498532f613SOng Boon Leong /*irq name */ 2508532f613SOng Boon Leong char int_name_mac[IFNAMSIZ + 9]; 2518532f613SOng Boon Leong char int_name_wol[IFNAMSIZ + 9]; 2528532f613SOng Boon Leong char int_name_lpi[IFNAMSIZ + 9]; 2538532f613SOng Boon Leong char int_name_sfty_ce[IFNAMSIZ + 10]; 2548532f613SOng Boon Leong char int_name_sfty_ue[IFNAMSIZ + 10]; 2558532f613SOng Boon Leong char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14]; 2568532f613SOng Boon Leong char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18]; 257466c5ac8SMathieu Olivari 258466c5ac8SMathieu Olivari #ifdef CONFIG_DEBUG_FS 259466c5ac8SMathieu Olivari struct dentry *dbgfs_dir; 260466c5ac8SMathieu Olivari #endif 26134877a15SJose Abreu 26234877a15SJose Abreu unsigned long state; 26334877a15SJose Abreu struct workqueue_struct *wq; 26434877a15SJose Abreu struct work_struct service_task; 2654dbbe8ddSJose Abreu 2665a558611SOng Boon Leong /* Workqueue for handling FPE hand-shaking */ 2675a558611SOng Boon Leong unsigned long fpe_task_state; 2685a558611SOng Boon Leong struct workqueue_struct *fpe_wq; 2695a558611SOng Boon Leong struct work_struct fpe_task; 2705a558611SOng Boon Leong char wq_name[IFNAMSIZ + 4]; 2715a558611SOng Boon Leong 2724dbbe8ddSJose Abreu /* TC Handling */ 2734dbbe8ddSJose Abreu unsigned int tc_entries_max; 2744dbbe8ddSJose Abreu unsigned int tc_off_max; 2754dbbe8ddSJose Abreu struct stmmac_tc_entry *tc_entries; 276425eabddSJose Abreu unsigned int flow_entries_max; 277425eabddSJose Abreu struct stmmac_flow_entry *flow_entries; 2789a8a02c9SJose Abreu 2799a8a02c9SJose Abreu /* Pulse Per Second output */ 2809a8a02c9SJose Abreu struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 28176067459SJose Abreu 28276067459SJose Abreu /* Receive Side Scaling */ 28376067459SJose Abreu struct stmmac_rss rss; 2845fabb012SOng Boon Leong 2855fabb012SOng Boon Leong /* XDP BPF Program */ 2865fabb012SOng Boon Leong struct bpf_prog *xdp_prog; 28734877a15SJose Abreu }; 28834877a15SJose Abreu 28934877a15SJose Abreu enum stmmac_state { 29034877a15SJose Abreu STMMAC_DOWN, 29134877a15SJose Abreu STMMAC_RESET_REQUESTED, 29234877a15SJose Abreu STMMAC_RESETING, 29334877a15SJose Abreu STMMAC_SERVICE_SCHED, 2947ac6653aSJeff Kirsher }; 2957ac6653aSJeff Kirsher 296d6cc64efSJoe Perches int stmmac_mdio_unregister(struct net_device *ndev); 297d6cc64efSJoe Perches int stmmac_mdio_register(struct net_device *ndev); 298073752aaSSrinivas Kandagatla int stmmac_mdio_reset(struct mii_bus *mii); 299d6cc64efSJoe Perches void stmmac_set_ethtool_ops(struct net_device *netdev); 300915af656SAndy Shevchenko 301c30a70d3SGiuseppe CAVALLARO void stmmac_ptp_register(struct stmmac_priv *priv); 302d6cc64efSJoe Perches void stmmac_ptp_unregister(struct stmmac_priv *priv); 3035fabb012SOng Boon Leong int stmmac_open(struct net_device *dev); 3045fabb012SOng Boon Leong int stmmac_release(struct net_device *dev); 305f4e7bd81SJoachim Eastwood int stmmac_resume(struct device *dev); 306f4e7bd81SJoachim Eastwood int stmmac_suspend(struct device *dev); 307f4e7bd81SJoachim Eastwood int stmmac_dvr_remove(struct device *dev); 30815ffac73SJoachim Eastwood int stmmac_dvr_probe(struct device *device, 309cf3f047bSGiuseppe CAVALLARO struct plat_stmmacenet_data *plat_dat, 310e56788cfSJoachim Eastwood struct stmmac_resources *res); 311d765955dSGiuseppe CAVALLARO void stmmac_disable_eee_mode(struct stmmac_priv *priv); 312d765955dSGiuseppe CAVALLARO bool stmmac_eee_init(struct stmmac_priv *priv); 3130366f7e0SOng Boon Leong int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt); 314aa042f60SSong, Yoong Siang int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); 3155ec55823SJoakim Zhang int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled); 3165a558611SOng Boon Leong void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable); 317ba1377ffSGiuseppe CAVALLARO 3185fabb012SOng Boon Leong static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) 3195fabb012SOng Boon Leong { 3205fabb012SOng Boon Leong return !!priv->xdp_prog; 3215fabb012SOng Boon Leong } 3225fabb012SOng Boon Leong 3235fabb012SOng Boon Leong static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv) 3245fabb012SOng Boon Leong { 3255fabb012SOng Boon Leong if (stmmac_xdp_is_enabled(priv)) 3265fabb012SOng Boon Leong return XDP_PACKET_HEADROOM; 3275fabb012SOng Boon Leong 3285fabb012SOng Boon Leong return 0; 3295fabb012SOng Boon Leong } 3305fabb012SOng Boon Leong 331091810dbSJose Abreu #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 332091810dbSJose Abreu void stmmac_selftest_run(struct net_device *dev, 333091810dbSJose Abreu struct ethtool_test *etest, u64 *buf); 334091810dbSJose Abreu void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 335091810dbSJose Abreu int stmmac_selftest_get_count(struct stmmac_priv *priv); 336091810dbSJose Abreu #else 337091810dbSJose Abreu static inline void stmmac_selftest_run(struct net_device *dev, 338091810dbSJose Abreu struct ethtool_test *etest, u64 *buf) 339091810dbSJose Abreu { 340091810dbSJose Abreu /* Not enabled */ 341091810dbSJose Abreu } 342091810dbSJose Abreu static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 343091810dbSJose Abreu u8 *data) 344091810dbSJose Abreu { 345091810dbSJose Abreu /* Not enabled */ 346091810dbSJose Abreu } 347091810dbSJose Abreu static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 348091810dbSJose Abreu { 349091810dbSJose Abreu return -EOPNOTSUPP; 350091810dbSJose Abreu } 351091810dbSJose Abreu #endif /* CONFIG_STMMAC_SELFTESTS */ 352091810dbSJose Abreu 353bd4242dfSRayagond Kokatanur #endif /* __STMMAC_H__ */ 354