14fa9c49fSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 27ac6653aSJeff Kirsher /******************************************************************************* 37ac6653aSJeff Kirsher Copyright (C) 2007-2009 STMicroelectronics Ltd 47ac6653aSJeff Kirsher 57ac6653aSJeff Kirsher 67ac6653aSJeff Kirsher Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 77ac6653aSJeff Kirsher *******************************************************************************/ 87ac6653aSJeff Kirsher 9bd4242dfSRayagond Kokatanur #ifndef __STMMAC_H__ 10bd4242dfSRayagond Kokatanur #define __STMMAC_H__ 11bd4242dfSRayagond Kokatanur 12bfab27a1SGiuseppe CAVALLARO #define STMMAC_RESOURCE_NAME "stmmaceth" 1306bce7ddSAlexandre TORGUE #define DRV_MODULE_VERSION "Jan_2016" 14ba1377ffSGiuseppe CAVALLARO 15ba1377ffSGiuseppe CAVALLARO #include <linux/clk.h> 167ac6653aSJeff Kirsher #include <linux/stmmac.h> 17eeef2f6bSJose Abreu #include <linux/phylink.h> 1833d5e332SGiuseppe CAVALLARO #include <linux/pci.h> 197ac6653aSJeff Kirsher #include "common.h" 2092ba6888SRayagond Kokatanur #include <linux/ptp_clock_kernel.h> 21d6228b7cSArtem Panfilov #include <linux/net_tstamp.h> 22c5e4ddbdSChen-Yu Tsai #include <linux/reset.h> 232af6106aSJose Abreu #include <net/page_pool.h> 247ac6653aSJeff Kirsher 25e56788cfSJoachim Eastwood struct stmmac_resources { 26e56788cfSJoachim Eastwood void __iomem *addr; 27e56788cfSJoachim Eastwood const char *mac; 28e56788cfSJoachim Eastwood int wol_irq; 29e56788cfSJoachim Eastwood int lpi_irq; 30e56788cfSJoachim Eastwood int irq; 31e56788cfSJoachim Eastwood }; 32e56788cfSJoachim Eastwood 33362b37beSGiuseppe CAVALLARO struct stmmac_tx_info { 34362b37beSGiuseppe CAVALLARO dma_addr_t buf; 35362b37beSGiuseppe CAVALLARO bool map_as_page; 36553e2ab3SGiuseppe Cavallaro unsigned len; 372a6d8e17SGiuseppe Cavallaro bool last_segment; 3896951366SGiuseppe Cavallaro bool is_jumbo; 39362b37beSGiuseppe CAVALLARO }; 40362b37beSGiuseppe CAVALLARO 41ce736788SJoao Pinto /* Frequently used values are kept adjacent for cache effect */ 42ce736788SJoao Pinto struct stmmac_tx_queue { 438fce3331SJose Abreu u32 tx_count_frames; 448fce3331SJose Abreu struct timer_list txtimer; 45ce736788SJoao Pinto u32 queue_index; 46ce736788SJoao Pinto struct stmmac_priv *priv_data; 47ce736788SJoao Pinto struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 48ce736788SJoao Pinto struct dma_desc *dma_tx; 49ce736788SJoao Pinto struct sk_buff **tx_skbuff; 50ce736788SJoao Pinto struct stmmac_tx_info *tx_skbuff_dma; 51ce736788SJoao Pinto unsigned int cur_tx; 52ce736788SJoao Pinto unsigned int dirty_tx; 53ce736788SJoao Pinto dma_addr_t dma_tx_phy; 54ce736788SJoao Pinto u32 tx_tail_addr; 558d212a9eSNiklas Cassel u32 mss; 56ce736788SJoao Pinto }; 57ce736788SJoao Pinto 582af6106aSJose Abreu struct stmmac_rx_buffer { 592af6106aSJose Abreu struct page *page; 602af6106aSJose Abreu dma_addr_t addr; 612af6106aSJose Abreu }; 622af6106aSJose Abreu 6354139cf3SJoao Pinto struct stmmac_rx_queue { 64d429b66eSJose Abreu u32 rx_count_frames; 6554139cf3SJoao Pinto u32 queue_index; 662af6106aSJose Abreu struct page_pool *page_pool; 672af6106aSJose Abreu struct stmmac_rx_buffer *buf_pool; 6854139cf3SJoao Pinto struct stmmac_priv *priv_data; 6954139cf3SJoao Pinto struct dma_extended_desc *dma_erx; 7054139cf3SJoao Pinto struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 7154139cf3SJoao Pinto unsigned int cur_rx; 7254139cf3SJoao Pinto unsigned int dirty_rx; 7354139cf3SJoao Pinto u32 rx_zeroc_thresh; 7454139cf3SJoao Pinto dma_addr_t dma_rx_phy; 7554139cf3SJoao Pinto u32 rx_tail_addr; 768fce3331SJose Abreu }; 778fce3331SJose Abreu 788fce3331SJose Abreu struct stmmac_channel { 794ccb4585SJose Abreu struct napi_struct rx_napi ____cacheline_aligned_in_smp; 804ccb4585SJose Abreu struct napi_struct tx_napi ____cacheline_aligned_in_smp; 818fce3331SJose Abreu struct stmmac_priv *priv_data; 828fce3331SJose Abreu u32 index; 8354139cf3SJoao Pinto }; 8454139cf3SJoao Pinto 854dbbe8ddSJose Abreu struct stmmac_tc_entry { 864dbbe8ddSJose Abreu bool in_use; 874dbbe8ddSJose Abreu bool in_hw; 884dbbe8ddSJose Abreu bool is_last; 894dbbe8ddSJose Abreu bool is_frag; 904dbbe8ddSJose Abreu void *frag_ptr; 914dbbe8ddSJose Abreu unsigned int table_pos; 924dbbe8ddSJose Abreu u32 handle; 934dbbe8ddSJose Abreu u32 prio; 944dbbe8ddSJose Abreu struct { 954dbbe8ddSJose Abreu u32 match_data; 964dbbe8ddSJose Abreu u32 match_en; 974dbbe8ddSJose Abreu u8 af:1; 984dbbe8ddSJose Abreu u8 rf:1; 994dbbe8ddSJose Abreu u8 im:1; 1004dbbe8ddSJose Abreu u8 nc:1; 1014dbbe8ddSJose Abreu u8 res1:4; 1024dbbe8ddSJose Abreu u8 frame_offset; 1034dbbe8ddSJose Abreu u8 ok_index; 1044dbbe8ddSJose Abreu u8 dma_ch_no; 1054dbbe8ddSJose Abreu u32 res2; 1064dbbe8ddSJose Abreu } __packed val; 1074dbbe8ddSJose Abreu }; 1084dbbe8ddSJose Abreu 1099a8a02c9SJose Abreu #define STMMAC_PPS_MAX 4 1109a8a02c9SJose Abreu struct stmmac_pps_cfg { 1119a8a02c9SJose Abreu bool available; 1129a8a02c9SJose Abreu struct timespec64 start; 1139a8a02c9SJose Abreu struct timespec64 period; 1149a8a02c9SJose Abreu }; 1159a8a02c9SJose Abreu 116*76067459SJose Abreu struct stmmac_rss { 117*76067459SJose Abreu int enable; 118*76067459SJose Abreu u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 119*76067459SJose Abreu u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 120*76067459SJose Abreu }; 121*76067459SJose Abreu 1227ac6653aSJeff Kirsher struct stmmac_priv { 1237ac6653aSJeff Kirsher /* Frequently used values are kept adjacent for cache effect */ 1241bb6dea8SGiuseppe CAVALLARO u32 tx_coal_frames; 1251bb6dea8SGiuseppe CAVALLARO u32 tx_coal_timer; 126d429b66eSJose Abreu u32 rx_coal_frames; 127ce736788SJoao Pinto 1287ac6653aSJeff Kirsher int tx_coalesce; 1291bb6dea8SGiuseppe CAVALLARO int hwts_tx_en; 1301bb6dea8SGiuseppe CAVALLARO bool tx_path_in_lpi_mode; 131f748be53SAlexandre TORGUE bool tso; 1327ac6653aSJeff Kirsher 1337ac6653aSJeff Kirsher unsigned int dma_buf_sz; 13422ad3838SGiuseppe Cavallaro unsigned int rx_copybreak; 1351bb6dea8SGiuseppe CAVALLARO u32 rx_riwt; 1361bb6dea8SGiuseppe CAVALLARO int hwts_rx_en; 1375bacd778SLABBE Corentin 1381bb6dea8SGiuseppe CAVALLARO void __iomem *ioaddr; 1391bb6dea8SGiuseppe CAVALLARO struct net_device *dev; 1407ac6653aSJeff Kirsher struct device *device; 1417ac6653aSJeff Kirsher struct mac_device_info *hw; 1427cfde0afSJose Abreu int (*hwif_quirks)(struct stmmac_priv *priv); 14329555fa3SThierry Reding struct mutex lock; 1447ac6653aSJeff Kirsher 14554139cf3SJoao Pinto /* RX Queue */ 14654139cf3SJoao Pinto struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 14754139cf3SJoao Pinto 148ce736788SJoao Pinto /* TX Queue */ 149ce736788SJoao Pinto struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 150ce736788SJoao Pinto 1518fce3331SJose Abreu /* Generic channel for NAPI */ 1528fce3331SJose Abreu struct stmmac_channel channel[STMMAC_CH_MAX]; 1538fce3331SJose Abreu 1547ac6653aSJeff Kirsher int speed; 1557ac6653aSJeff Kirsher unsigned int flow_ctrl; 1567ac6653aSJeff Kirsher unsigned int pause; 1577ac6653aSJeff Kirsher struct mii_bus *mii; 1587ac6653aSJeff Kirsher int mii_irq[PHY_MAX_ADDR]; 1597ac6653aSJeff Kirsher 160eeef2f6bSJose Abreu struct phylink_config phylink_config; 161eeef2f6bSJose Abreu struct phylink *phylink; 162eeef2f6bSJose Abreu 1631bb6dea8SGiuseppe CAVALLARO struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 1648bf993a5SJose Abreu struct stmmac_safety_stats sstats; 1651bb6dea8SGiuseppe CAVALLARO struct plat_stmmacenet_data *plat; 1661bb6dea8SGiuseppe CAVALLARO struct dma_features dma_cap; 1671bb6dea8SGiuseppe CAVALLARO struct stmmac_counters mmc; 1681bb6dea8SGiuseppe CAVALLARO int hw_cap_support; 1691bb6dea8SGiuseppe CAVALLARO int synopsys_id; 1707ac6653aSJeff Kirsher u32 msg_enable; 1717ac6653aSJeff Kirsher int wolopts; 1723172d3afSDeepak Sikri int wol_irq; 173cd7201f4SGiuseppe CAVALLARO int clk_csr; 174d765955dSGiuseppe CAVALLARO struct timer_list eee_ctrl_timer; 175d765955dSGiuseppe CAVALLARO int lpi_irq; 176d765955dSGiuseppe CAVALLARO int eee_enabled; 177d765955dSGiuseppe CAVALLARO int eee_active; 178d765955dSGiuseppe CAVALLARO int tx_lpi_timer; 1794a7d666aSGiuseppe CAVALLARO unsigned int mode; 1805f0456b4SJose Abreu unsigned int chain_mode; 181c24602efSGiuseppe CAVALLARO int extend_desc; 182d6228b7cSArtem Panfilov struct hwtstamp_config tstamp_config; 18392ba6888SRayagond Kokatanur struct ptp_clock *ptp_clock; 18492ba6888SRayagond Kokatanur struct ptp_clock_info ptp_clock_ops; 1851bb6dea8SGiuseppe CAVALLARO unsigned int default_addend; 1869a8a02c9SJose Abreu u32 sub_second_inc; 1879a8a02c9SJose Abreu u32 systime_flags; 1881bb6dea8SGiuseppe CAVALLARO u32 adv_ts; 1891bb6dea8SGiuseppe CAVALLARO int use_riwt; 19089f7f2cfSSrinivas Kandagatla int irq_wake; 19192ba6888SRayagond Kokatanur spinlock_t ptp_lock; 19236ff7c1eSAlexandre TORGUE void __iomem *mmcaddr; 193ba1ffd74SGiuseppe CAVALLARO void __iomem *ptpaddr; 194466c5ac8SMathieu Olivari 195466c5ac8SMathieu Olivari #ifdef CONFIG_DEBUG_FS 196466c5ac8SMathieu Olivari struct dentry *dbgfs_dir; 197466c5ac8SMathieu Olivari struct dentry *dbgfs_rings_status; 198466c5ac8SMathieu Olivari struct dentry *dbgfs_dma_cap; 199466c5ac8SMathieu Olivari #endif 20034877a15SJose Abreu 20134877a15SJose Abreu unsigned long state; 20234877a15SJose Abreu struct workqueue_struct *wq; 20334877a15SJose Abreu struct work_struct service_task; 2044dbbe8ddSJose Abreu 2054dbbe8ddSJose Abreu /* TC Handling */ 2064dbbe8ddSJose Abreu unsigned int tc_entries_max; 2074dbbe8ddSJose Abreu unsigned int tc_off_max; 2084dbbe8ddSJose Abreu struct stmmac_tc_entry *tc_entries; 2099a8a02c9SJose Abreu 2109a8a02c9SJose Abreu /* Pulse Per Second output */ 2119a8a02c9SJose Abreu struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 212*76067459SJose Abreu 213*76067459SJose Abreu /* Receive Side Scaling */ 214*76067459SJose Abreu struct stmmac_rss rss; 21534877a15SJose Abreu }; 21634877a15SJose Abreu 21734877a15SJose Abreu enum stmmac_state { 21834877a15SJose Abreu STMMAC_DOWN, 21934877a15SJose Abreu STMMAC_RESET_REQUESTED, 22034877a15SJose Abreu STMMAC_RESETING, 22134877a15SJose Abreu STMMAC_SERVICE_SCHED, 2227ac6653aSJeff Kirsher }; 2237ac6653aSJeff Kirsher 224d6cc64efSJoe Perches int stmmac_mdio_unregister(struct net_device *ndev); 225d6cc64efSJoe Perches int stmmac_mdio_register(struct net_device *ndev); 226073752aaSSrinivas Kandagatla int stmmac_mdio_reset(struct mii_bus *mii); 227d6cc64efSJoe Perches void stmmac_set_ethtool_ops(struct net_device *netdev); 228915af656SAndy Shevchenko 229c30a70d3SGiuseppe CAVALLARO void stmmac_ptp_register(struct stmmac_priv *priv); 230d6cc64efSJoe Perches void stmmac_ptp_unregister(struct stmmac_priv *priv); 231f4e7bd81SJoachim Eastwood int stmmac_resume(struct device *dev); 232f4e7bd81SJoachim Eastwood int stmmac_suspend(struct device *dev); 233f4e7bd81SJoachim Eastwood int stmmac_dvr_remove(struct device *dev); 23415ffac73SJoachim Eastwood int stmmac_dvr_probe(struct device *device, 235cf3f047bSGiuseppe CAVALLARO struct plat_stmmacenet_data *plat_dat, 236e56788cfSJoachim Eastwood struct stmmac_resources *res); 237d765955dSGiuseppe CAVALLARO void stmmac_disable_eee_mode(struct stmmac_priv *priv); 238d765955dSGiuseppe CAVALLARO bool stmmac_eee_init(struct stmmac_priv *priv); 239ba1377ffSGiuseppe CAVALLARO 240091810dbSJose Abreu #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 241091810dbSJose Abreu void stmmac_selftest_run(struct net_device *dev, 242091810dbSJose Abreu struct ethtool_test *etest, u64 *buf); 243091810dbSJose Abreu void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 244091810dbSJose Abreu int stmmac_selftest_get_count(struct stmmac_priv *priv); 245091810dbSJose Abreu #else 246091810dbSJose Abreu static inline void stmmac_selftest_run(struct net_device *dev, 247091810dbSJose Abreu struct ethtool_test *etest, u64 *buf) 248091810dbSJose Abreu { 249091810dbSJose Abreu /* Not enabled */ 250091810dbSJose Abreu } 251091810dbSJose Abreu static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 252091810dbSJose Abreu u8 *data) 253091810dbSJose Abreu { 254091810dbSJose Abreu /* Not enabled */ 255091810dbSJose Abreu } 256091810dbSJose Abreu static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 257091810dbSJose Abreu { 258091810dbSJose Abreu return -EOPNOTSUPP; 259091810dbSJose Abreu } 260091810dbSJose Abreu #endif /* CONFIG_STMMAC_SELFTESTS */ 261091810dbSJose Abreu 262bd4242dfSRayagond Kokatanur #endif /* __STMMAC_H__ */ 263