14fa9c49fSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 27ac6653aSJeff Kirsher /******************************************************************************* 37ac6653aSJeff Kirsher Copyright (C) 2007-2009 STMicroelectronics Ltd 47ac6653aSJeff Kirsher 57ac6653aSJeff Kirsher 67ac6653aSJeff Kirsher Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 77ac6653aSJeff Kirsher *******************************************************************************/ 87ac6653aSJeff Kirsher 9bd4242dfSRayagond Kokatanur #ifndef __STMMAC_H__ 10bd4242dfSRayagond Kokatanur #define __STMMAC_H__ 11bd4242dfSRayagond Kokatanur 12bfab27a1SGiuseppe CAVALLARO #define STMMAC_RESOURCE_NAME "stmmaceth" 1306bce7ddSAlexandre TORGUE #define DRV_MODULE_VERSION "Jan_2016" 14ba1377ffSGiuseppe CAVALLARO 15ba1377ffSGiuseppe CAVALLARO #include <linux/clk.h> 16d5a05e69SVincent Whitchurch #include <linux/hrtimer.h> 173cd1cfcbSJose Abreu #include <linux/if_vlan.h> 187ac6653aSJeff Kirsher #include <linux/stmmac.h> 19eeef2f6bSJose Abreu #include <linux/phylink.h> 2033d5e332SGiuseppe CAVALLARO #include <linux/pci.h> 217ac6653aSJeff Kirsher #include "common.h" 2292ba6888SRayagond Kokatanur #include <linux/ptp_clock_kernel.h> 23d6228b7cSArtem Panfilov #include <linux/net_tstamp.h> 24c5e4ddbdSChen-Yu Tsai #include <linux/reset.h> 252af6106aSJose Abreu #include <net/page_pool.h> 267ac6653aSJeff Kirsher 27e56788cfSJoachim Eastwood struct stmmac_resources { 28e56788cfSJoachim Eastwood void __iomem *addr; 29e56788cfSJoachim Eastwood const char *mac; 30e56788cfSJoachim Eastwood int wol_irq; 31e56788cfSJoachim Eastwood int lpi_irq; 32e56788cfSJoachim Eastwood int irq; 338532f613SOng Boon Leong int sfty_ce_irq; 348532f613SOng Boon Leong int sfty_ue_irq; 358532f613SOng Boon Leong int rx_irq[MTL_MAX_RX_QUEUES]; 368532f613SOng Boon Leong int tx_irq[MTL_MAX_TX_QUEUES]; 37e56788cfSJoachim Eastwood }; 38e56788cfSJoachim Eastwood 39362b37beSGiuseppe CAVALLARO struct stmmac_tx_info { 40362b37beSGiuseppe CAVALLARO dma_addr_t buf; 41362b37beSGiuseppe CAVALLARO bool map_as_page; 42553e2ab3SGiuseppe Cavallaro unsigned len; 432a6d8e17SGiuseppe Cavallaro bool last_segment; 4496951366SGiuseppe Cavallaro bool is_jumbo; 45362b37beSGiuseppe CAVALLARO }; 46362b37beSGiuseppe CAVALLARO 47579a25a8SJose Abreu #define STMMAC_TBS_AVAIL BIT(0) 48579a25a8SJose Abreu #define STMMAC_TBS_EN BIT(1) 49579a25a8SJose Abreu 50ce736788SJoao Pinto /* Frequently used values are kept adjacent for cache effect */ 51ce736788SJoao Pinto struct stmmac_tx_queue { 528fce3331SJose Abreu u32 tx_count_frames; 53579a25a8SJose Abreu int tbs; 54d5a05e69SVincent Whitchurch struct hrtimer txtimer; 55ce736788SJoao Pinto u32 queue_index; 56ce736788SJoao Pinto struct stmmac_priv *priv_data; 57ce736788SJoao Pinto struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 58579a25a8SJose Abreu struct dma_edesc *dma_entx; 59ce736788SJoao Pinto struct dma_desc *dma_tx; 60ce736788SJoao Pinto struct sk_buff **tx_skbuff; 61ce736788SJoao Pinto struct stmmac_tx_info *tx_skbuff_dma; 62ce736788SJoao Pinto unsigned int cur_tx; 63ce736788SJoao Pinto unsigned int dirty_tx; 64ce736788SJoao Pinto dma_addr_t dma_tx_phy; 65ce736788SJoao Pinto u32 tx_tail_addr; 668d212a9eSNiklas Cassel u32 mss; 67ce736788SJoao Pinto }; 68ce736788SJoao Pinto 692af6106aSJose Abreu struct stmmac_rx_buffer { 702af6106aSJose Abreu struct page *page; 712af6106aSJose Abreu dma_addr_t addr; 72*5fabb012SOng Boon Leong __u32 page_offset; 73*5fabb012SOng Boon Leong struct page *sec_page; 7467afd6d1SJose Abreu dma_addr_t sec_addr; 752af6106aSJose Abreu }; 762af6106aSJose Abreu 7754139cf3SJoao Pinto struct stmmac_rx_queue { 78d429b66eSJose Abreu u32 rx_count_frames; 7954139cf3SJoao Pinto u32 queue_index; 802af6106aSJose Abreu struct page_pool *page_pool; 812af6106aSJose Abreu struct stmmac_rx_buffer *buf_pool; 8254139cf3SJoao Pinto struct stmmac_priv *priv_data; 8354139cf3SJoao Pinto struct dma_extended_desc *dma_erx; 8454139cf3SJoao Pinto struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 8554139cf3SJoao Pinto unsigned int cur_rx; 8654139cf3SJoao Pinto unsigned int dirty_rx; 8754139cf3SJoao Pinto u32 rx_zeroc_thresh; 8854139cf3SJoao Pinto dma_addr_t dma_rx_phy; 8954139cf3SJoao Pinto u32 rx_tail_addr; 90ec222003SJose Abreu unsigned int state_saved; 91ec222003SJose Abreu struct { 92ec222003SJose Abreu struct sk_buff *skb; 93ec222003SJose Abreu unsigned int len; 94ec222003SJose Abreu unsigned int error; 95ec222003SJose Abreu } state; 968fce3331SJose Abreu }; 978fce3331SJose Abreu 988fce3331SJose Abreu struct stmmac_channel { 994ccb4585SJose Abreu struct napi_struct rx_napi ____cacheline_aligned_in_smp; 1004ccb4585SJose Abreu struct napi_struct tx_napi ____cacheline_aligned_in_smp; 1018fce3331SJose Abreu struct stmmac_priv *priv_data; 102021bd5e3SJose Abreu spinlock_t lock; 1038fce3331SJose Abreu u32 index; 10454139cf3SJoao Pinto }; 10554139cf3SJoao Pinto 1064dbbe8ddSJose Abreu struct stmmac_tc_entry { 1074dbbe8ddSJose Abreu bool in_use; 1084dbbe8ddSJose Abreu bool in_hw; 1094dbbe8ddSJose Abreu bool is_last; 1104dbbe8ddSJose Abreu bool is_frag; 1114dbbe8ddSJose Abreu void *frag_ptr; 1124dbbe8ddSJose Abreu unsigned int table_pos; 1134dbbe8ddSJose Abreu u32 handle; 1144dbbe8ddSJose Abreu u32 prio; 1154dbbe8ddSJose Abreu struct { 1164dbbe8ddSJose Abreu u32 match_data; 1174dbbe8ddSJose Abreu u32 match_en; 1184dbbe8ddSJose Abreu u8 af:1; 1194dbbe8ddSJose Abreu u8 rf:1; 1204dbbe8ddSJose Abreu u8 im:1; 1214dbbe8ddSJose Abreu u8 nc:1; 1224dbbe8ddSJose Abreu u8 res1:4; 1234dbbe8ddSJose Abreu u8 frame_offset; 1244dbbe8ddSJose Abreu u8 ok_index; 1254dbbe8ddSJose Abreu u8 dma_ch_no; 1264dbbe8ddSJose Abreu u32 res2; 1274dbbe8ddSJose Abreu } __packed val; 1284dbbe8ddSJose Abreu }; 1294dbbe8ddSJose Abreu 1309a8a02c9SJose Abreu #define STMMAC_PPS_MAX 4 1319a8a02c9SJose Abreu struct stmmac_pps_cfg { 1329a8a02c9SJose Abreu bool available; 1339a8a02c9SJose Abreu struct timespec64 start; 1349a8a02c9SJose Abreu struct timespec64 period; 1359a8a02c9SJose Abreu }; 1369a8a02c9SJose Abreu 13776067459SJose Abreu struct stmmac_rss { 13876067459SJose Abreu int enable; 13976067459SJose Abreu u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 14076067459SJose Abreu u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 14176067459SJose Abreu }; 14276067459SJose Abreu 143425eabddSJose Abreu #define STMMAC_FLOW_ACTION_DROP BIT(0) 144425eabddSJose Abreu struct stmmac_flow_entry { 145425eabddSJose Abreu unsigned long cookie; 146425eabddSJose Abreu unsigned long action; 147425eabddSJose Abreu u8 ip_proto; 148425eabddSJose Abreu int in_use; 149425eabddSJose Abreu int idx; 150425eabddSJose Abreu int is_l4; 151425eabddSJose Abreu }; 152425eabddSJose Abreu 1537ac6653aSJeff Kirsher struct stmmac_priv { 1547ac6653aSJeff Kirsher /* Frequently used values are kept adjacent for cache effect */ 155db2f2842SOng Boon Leong u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; 156db2f2842SOng Boon Leong u32 tx_coal_timer[MTL_MAX_TX_QUEUES]; 157db2f2842SOng Boon Leong u32 rx_coal_frames[MTL_MAX_TX_QUEUES]; 158ce736788SJoao Pinto 1597ac6653aSJeff Kirsher int tx_coalesce; 1601bb6dea8SGiuseppe CAVALLARO int hwts_tx_en; 1611bb6dea8SGiuseppe CAVALLARO bool tx_path_in_lpi_mode; 162f748be53SAlexandre TORGUE bool tso; 16367afd6d1SJose Abreu int sph; 164d08d32d1SOng Boon Leong int sph_cap; 1658000ddc0SJose Abreu u32 sarc_type; 1667ac6653aSJeff Kirsher 1677ac6653aSJeff Kirsher unsigned int dma_buf_sz; 16822ad3838SGiuseppe Cavallaro unsigned int rx_copybreak; 169db2f2842SOng Boon Leong u32 rx_riwt[MTL_MAX_TX_QUEUES]; 1701bb6dea8SGiuseppe CAVALLARO int hwts_rx_en; 1715bacd778SLABBE Corentin 1721bb6dea8SGiuseppe CAVALLARO void __iomem *ioaddr; 1731bb6dea8SGiuseppe CAVALLARO struct net_device *dev; 1747ac6653aSJeff Kirsher struct device *device; 1757ac6653aSJeff Kirsher struct mac_device_info *hw; 1767cfde0afSJose Abreu int (*hwif_quirks)(struct stmmac_priv *priv); 17729555fa3SThierry Reding struct mutex lock; 1787ac6653aSJeff Kirsher 17954139cf3SJoao Pinto /* RX Queue */ 18054139cf3SJoao Pinto struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 181aa042f60SSong, Yoong Siang unsigned int dma_rx_size; 18254139cf3SJoao Pinto 183ce736788SJoao Pinto /* TX Queue */ 184ce736788SJoao Pinto struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 185aa042f60SSong, Yoong Siang unsigned int dma_tx_size; 186ce736788SJoao Pinto 1878fce3331SJose Abreu /* Generic channel for NAPI */ 1888fce3331SJose Abreu struct stmmac_channel channel[STMMAC_CH_MAX]; 1898fce3331SJose Abreu 1907ac6653aSJeff Kirsher int speed; 1917ac6653aSJeff Kirsher unsigned int flow_ctrl; 1927ac6653aSJeff Kirsher unsigned int pause; 1937ac6653aSJeff Kirsher struct mii_bus *mii; 1947ac6653aSJeff Kirsher int mii_irq[PHY_MAX_ADDR]; 1957ac6653aSJeff Kirsher 196eeef2f6bSJose Abreu struct phylink_config phylink_config; 197eeef2f6bSJose Abreu struct phylink *phylink; 198eeef2f6bSJose Abreu 1991bb6dea8SGiuseppe CAVALLARO struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 2008bf993a5SJose Abreu struct stmmac_safety_stats sstats; 2011bb6dea8SGiuseppe CAVALLARO struct plat_stmmacenet_data *plat; 2021bb6dea8SGiuseppe CAVALLARO struct dma_features dma_cap; 2031bb6dea8SGiuseppe CAVALLARO struct stmmac_counters mmc; 2041bb6dea8SGiuseppe CAVALLARO int hw_cap_support; 2051bb6dea8SGiuseppe CAVALLARO int synopsys_id; 2067ac6653aSJeff Kirsher u32 msg_enable; 2077ac6653aSJeff Kirsher int wolopts; 2083172d3afSDeepak Sikri int wol_irq; 209cd7201f4SGiuseppe CAVALLARO int clk_csr; 210d765955dSGiuseppe CAVALLARO struct timer_list eee_ctrl_timer; 211d765955dSGiuseppe CAVALLARO int lpi_irq; 212d765955dSGiuseppe CAVALLARO int eee_enabled; 213d765955dSGiuseppe CAVALLARO int eee_active; 214d765955dSGiuseppe CAVALLARO int tx_lpi_timer; 215388e201dSVineetha G. Jaya Kumaran int tx_lpi_enabled; 216388e201dSVineetha G. Jaya Kumaran int eee_tw_timer; 217be1c7eaeSVineetha G. Jaya Kumaran bool eee_sw_timer_en; 2184a7d666aSGiuseppe CAVALLARO unsigned int mode; 2195f0456b4SJose Abreu unsigned int chain_mode; 220c24602efSGiuseppe CAVALLARO int extend_desc; 221d6228b7cSArtem Panfilov struct hwtstamp_config tstamp_config; 22292ba6888SRayagond Kokatanur struct ptp_clock *ptp_clock; 22392ba6888SRayagond Kokatanur struct ptp_clock_info ptp_clock_ops; 2241bb6dea8SGiuseppe CAVALLARO unsigned int default_addend; 2259a8a02c9SJose Abreu u32 sub_second_inc; 2269a8a02c9SJose Abreu u32 systime_flags; 2271bb6dea8SGiuseppe CAVALLARO u32 adv_ts; 2281bb6dea8SGiuseppe CAVALLARO int use_riwt; 22989f7f2cfSSrinivas Kandagatla int irq_wake; 23092ba6888SRayagond Kokatanur spinlock_t ptp_lock; 23136ff7c1eSAlexandre TORGUE void __iomem *mmcaddr; 232ba1ffd74SGiuseppe CAVALLARO void __iomem *ptpaddr; 2333cd1cfcbSJose Abreu unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 2348532f613SOng Boon Leong int sfty_ce_irq; 2358532f613SOng Boon Leong int sfty_ue_irq; 2368532f613SOng Boon Leong int rx_irq[MTL_MAX_RX_QUEUES]; 2378532f613SOng Boon Leong int tx_irq[MTL_MAX_TX_QUEUES]; 2388532f613SOng Boon Leong /*irq name */ 2398532f613SOng Boon Leong char int_name_mac[IFNAMSIZ + 9]; 2408532f613SOng Boon Leong char int_name_wol[IFNAMSIZ + 9]; 2418532f613SOng Boon Leong char int_name_lpi[IFNAMSIZ + 9]; 2428532f613SOng Boon Leong char int_name_sfty_ce[IFNAMSIZ + 10]; 2438532f613SOng Boon Leong char int_name_sfty_ue[IFNAMSIZ + 10]; 2448532f613SOng Boon Leong char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14]; 2458532f613SOng Boon Leong char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18]; 246466c5ac8SMathieu Olivari 247466c5ac8SMathieu Olivari #ifdef CONFIG_DEBUG_FS 248466c5ac8SMathieu Olivari struct dentry *dbgfs_dir; 249466c5ac8SMathieu Olivari #endif 25034877a15SJose Abreu 25134877a15SJose Abreu unsigned long state; 25234877a15SJose Abreu struct workqueue_struct *wq; 25334877a15SJose Abreu struct work_struct service_task; 2544dbbe8ddSJose Abreu 2555a558611SOng Boon Leong /* Workqueue for handling FPE hand-shaking */ 2565a558611SOng Boon Leong unsigned long fpe_task_state; 2575a558611SOng Boon Leong struct workqueue_struct *fpe_wq; 2585a558611SOng Boon Leong struct work_struct fpe_task; 2595a558611SOng Boon Leong char wq_name[IFNAMSIZ + 4]; 2605a558611SOng Boon Leong 2614dbbe8ddSJose Abreu /* TC Handling */ 2624dbbe8ddSJose Abreu unsigned int tc_entries_max; 2634dbbe8ddSJose Abreu unsigned int tc_off_max; 2644dbbe8ddSJose Abreu struct stmmac_tc_entry *tc_entries; 265425eabddSJose Abreu unsigned int flow_entries_max; 266425eabddSJose Abreu struct stmmac_flow_entry *flow_entries; 2679a8a02c9SJose Abreu 2689a8a02c9SJose Abreu /* Pulse Per Second output */ 2699a8a02c9SJose Abreu struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 27076067459SJose Abreu 27176067459SJose Abreu /* Receive Side Scaling */ 27276067459SJose Abreu struct stmmac_rss rss; 273*5fabb012SOng Boon Leong 274*5fabb012SOng Boon Leong /* XDP BPF Program */ 275*5fabb012SOng Boon Leong struct bpf_prog *xdp_prog; 27634877a15SJose Abreu }; 27734877a15SJose Abreu 27834877a15SJose Abreu enum stmmac_state { 27934877a15SJose Abreu STMMAC_DOWN, 28034877a15SJose Abreu STMMAC_RESET_REQUESTED, 28134877a15SJose Abreu STMMAC_RESETING, 28234877a15SJose Abreu STMMAC_SERVICE_SCHED, 2837ac6653aSJeff Kirsher }; 2847ac6653aSJeff Kirsher 285d6cc64efSJoe Perches int stmmac_mdio_unregister(struct net_device *ndev); 286d6cc64efSJoe Perches int stmmac_mdio_register(struct net_device *ndev); 287073752aaSSrinivas Kandagatla int stmmac_mdio_reset(struct mii_bus *mii); 288d6cc64efSJoe Perches void stmmac_set_ethtool_ops(struct net_device *netdev); 289915af656SAndy Shevchenko 290c30a70d3SGiuseppe CAVALLARO void stmmac_ptp_register(struct stmmac_priv *priv); 291d6cc64efSJoe Perches void stmmac_ptp_unregister(struct stmmac_priv *priv); 292*5fabb012SOng Boon Leong int stmmac_open(struct net_device *dev); 293*5fabb012SOng Boon Leong int stmmac_release(struct net_device *dev); 294f4e7bd81SJoachim Eastwood int stmmac_resume(struct device *dev); 295f4e7bd81SJoachim Eastwood int stmmac_suspend(struct device *dev); 296f4e7bd81SJoachim Eastwood int stmmac_dvr_remove(struct device *dev); 29715ffac73SJoachim Eastwood int stmmac_dvr_probe(struct device *device, 298cf3f047bSGiuseppe CAVALLARO struct plat_stmmacenet_data *plat_dat, 299e56788cfSJoachim Eastwood struct stmmac_resources *res); 300d765955dSGiuseppe CAVALLARO void stmmac_disable_eee_mode(struct stmmac_priv *priv); 301d765955dSGiuseppe CAVALLARO bool stmmac_eee_init(struct stmmac_priv *priv); 3020366f7e0SOng Boon Leong int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt); 303aa042f60SSong, Yoong Siang int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); 3045ec55823SJoakim Zhang int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled); 3055a558611SOng Boon Leong void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable); 306ba1377ffSGiuseppe CAVALLARO 307*5fabb012SOng Boon Leong static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) 308*5fabb012SOng Boon Leong { 309*5fabb012SOng Boon Leong return !!priv->xdp_prog; 310*5fabb012SOng Boon Leong } 311*5fabb012SOng Boon Leong 312*5fabb012SOng Boon Leong static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv) 313*5fabb012SOng Boon Leong { 314*5fabb012SOng Boon Leong if (stmmac_xdp_is_enabled(priv)) 315*5fabb012SOng Boon Leong return XDP_PACKET_HEADROOM; 316*5fabb012SOng Boon Leong 317*5fabb012SOng Boon Leong return 0; 318*5fabb012SOng Boon Leong } 319*5fabb012SOng Boon Leong 320091810dbSJose Abreu #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 321091810dbSJose Abreu void stmmac_selftest_run(struct net_device *dev, 322091810dbSJose Abreu struct ethtool_test *etest, u64 *buf); 323091810dbSJose Abreu void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 324091810dbSJose Abreu int stmmac_selftest_get_count(struct stmmac_priv *priv); 325091810dbSJose Abreu #else 326091810dbSJose Abreu static inline void stmmac_selftest_run(struct net_device *dev, 327091810dbSJose Abreu struct ethtool_test *etest, u64 *buf) 328091810dbSJose Abreu { 329091810dbSJose Abreu /* Not enabled */ 330091810dbSJose Abreu } 331091810dbSJose Abreu static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 332091810dbSJose Abreu u8 *data) 333091810dbSJose Abreu { 334091810dbSJose Abreu /* Not enabled */ 335091810dbSJose Abreu } 336091810dbSJose Abreu static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 337091810dbSJose Abreu { 338091810dbSJose Abreu return -EOPNOTSUPP; 339091810dbSJose Abreu } 340091810dbSJose Abreu #endif /* CONFIG_STMMAC_SELFTESTS */ 341091810dbSJose Abreu 342bd4242dfSRayagond Kokatanur #endif /* __STMMAC_H__ */ 343