14fa9c49fSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 27ac6653aSJeff Kirsher /******************************************************************************* 37ac6653aSJeff Kirsher Copyright (C) 2007-2009 STMicroelectronics Ltd 47ac6653aSJeff Kirsher 57ac6653aSJeff Kirsher 67ac6653aSJeff Kirsher Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 77ac6653aSJeff Kirsher *******************************************************************************/ 87ac6653aSJeff Kirsher 9bd4242dfSRayagond Kokatanur #ifndef __STMMAC_H__ 10bd4242dfSRayagond Kokatanur #define __STMMAC_H__ 11bd4242dfSRayagond Kokatanur 12bfab27a1SGiuseppe CAVALLARO #define STMMAC_RESOURCE_NAME "stmmaceth" 1306bce7ddSAlexandre TORGUE #define DRV_MODULE_VERSION "Jan_2016" 14ba1377ffSGiuseppe CAVALLARO 15ba1377ffSGiuseppe CAVALLARO #include <linux/clk.h> 163cd1cfcbSJose Abreu #include <linux/if_vlan.h> 177ac6653aSJeff Kirsher #include <linux/stmmac.h> 18eeef2f6bSJose Abreu #include <linux/phylink.h> 1933d5e332SGiuseppe CAVALLARO #include <linux/pci.h> 207ac6653aSJeff Kirsher #include "common.h" 2192ba6888SRayagond Kokatanur #include <linux/ptp_clock_kernel.h> 22d6228b7cSArtem Panfilov #include <linux/net_tstamp.h> 23c5e4ddbdSChen-Yu Tsai #include <linux/reset.h> 242af6106aSJose Abreu #include <net/page_pool.h> 257ac6653aSJeff Kirsher 26e56788cfSJoachim Eastwood struct stmmac_resources { 27e56788cfSJoachim Eastwood void __iomem *addr; 28e56788cfSJoachim Eastwood const char *mac; 29e56788cfSJoachim Eastwood int wol_irq; 30e56788cfSJoachim Eastwood int lpi_irq; 31e56788cfSJoachim Eastwood int irq; 32e56788cfSJoachim Eastwood }; 33e56788cfSJoachim Eastwood 34362b37beSGiuseppe CAVALLARO struct stmmac_tx_info { 35362b37beSGiuseppe CAVALLARO dma_addr_t buf; 36362b37beSGiuseppe CAVALLARO bool map_as_page; 37553e2ab3SGiuseppe Cavallaro unsigned len; 382a6d8e17SGiuseppe Cavallaro bool last_segment; 3996951366SGiuseppe Cavallaro bool is_jumbo; 40362b37beSGiuseppe CAVALLARO }; 41362b37beSGiuseppe CAVALLARO 42579a25a8SJose Abreu #define STMMAC_TBS_AVAIL BIT(0) 43579a25a8SJose Abreu #define STMMAC_TBS_EN BIT(1) 44579a25a8SJose Abreu 45ce736788SJoao Pinto /* Frequently used values are kept adjacent for cache effect */ 46ce736788SJoao Pinto struct stmmac_tx_queue { 478fce3331SJose Abreu u32 tx_count_frames; 48579a25a8SJose Abreu int tbs; 498fce3331SJose Abreu struct timer_list txtimer; 50ce736788SJoao Pinto u32 queue_index; 51ce736788SJoao Pinto struct stmmac_priv *priv_data; 52ce736788SJoao Pinto struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 53579a25a8SJose Abreu struct dma_edesc *dma_entx; 54ce736788SJoao Pinto struct dma_desc *dma_tx; 55ce736788SJoao Pinto struct sk_buff **tx_skbuff; 56ce736788SJoao Pinto struct stmmac_tx_info *tx_skbuff_dma; 57ce736788SJoao Pinto unsigned int cur_tx; 58ce736788SJoao Pinto unsigned int dirty_tx; 59ce736788SJoao Pinto dma_addr_t dma_tx_phy; 60ce736788SJoao Pinto u32 tx_tail_addr; 618d212a9eSNiklas Cassel u32 mss; 62ce736788SJoao Pinto }; 63ce736788SJoao Pinto 642af6106aSJose Abreu struct stmmac_rx_buffer { 652af6106aSJose Abreu struct page *page; 6667afd6d1SJose Abreu struct page *sec_page; 672af6106aSJose Abreu dma_addr_t addr; 6867afd6d1SJose Abreu dma_addr_t sec_addr; 692af6106aSJose Abreu }; 702af6106aSJose Abreu 7154139cf3SJoao Pinto struct stmmac_rx_queue { 72d429b66eSJose Abreu u32 rx_count_frames; 7354139cf3SJoao Pinto u32 queue_index; 742af6106aSJose Abreu struct page_pool *page_pool; 752af6106aSJose Abreu struct stmmac_rx_buffer *buf_pool; 7654139cf3SJoao Pinto struct stmmac_priv *priv_data; 7754139cf3SJoao Pinto struct dma_extended_desc *dma_erx; 7854139cf3SJoao Pinto struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 7954139cf3SJoao Pinto unsigned int cur_rx; 8054139cf3SJoao Pinto unsigned int dirty_rx; 8154139cf3SJoao Pinto u32 rx_zeroc_thresh; 8254139cf3SJoao Pinto dma_addr_t dma_rx_phy; 8354139cf3SJoao Pinto u32 rx_tail_addr; 84ec222003SJose Abreu unsigned int state_saved; 85ec222003SJose Abreu struct { 86ec222003SJose Abreu struct sk_buff *skb; 87ec222003SJose Abreu unsigned int len; 88ec222003SJose Abreu unsigned int error; 89ec222003SJose Abreu } state; 908fce3331SJose Abreu }; 918fce3331SJose Abreu 928fce3331SJose Abreu struct stmmac_channel { 934ccb4585SJose Abreu struct napi_struct rx_napi ____cacheline_aligned_in_smp; 944ccb4585SJose Abreu struct napi_struct tx_napi ____cacheline_aligned_in_smp; 958fce3331SJose Abreu struct stmmac_priv *priv_data; 96021bd5e3SJose Abreu spinlock_t lock; 978fce3331SJose Abreu u32 index; 9854139cf3SJoao Pinto }; 9954139cf3SJoao Pinto 1004dbbe8ddSJose Abreu struct stmmac_tc_entry { 1014dbbe8ddSJose Abreu bool in_use; 1024dbbe8ddSJose Abreu bool in_hw; 1034dbbe8ddSJose Abreu bool is_last; 1044dbbe8ddSJose Abreu bool is_frag; 1054dbbe8ddSJose Abreu void *frag_ptr; 1064dbbe8ddSJose Abreu unsigned int table_pos; 1074dbbe8ddSJose Abreu u32 handle; 1084dbbe8ddSJose Abreu u32 prio; 1094dbbe8ddSJose Abreu struct { 1104dbbe8ddSJose Abreu u32 match_data; 1114dbbe8ddSJose Abreu u32 match_en; 1124dbbe8ddSJose Abreu u8 af:1; 1134dbbe8ddSJose Abreu u8 rf:1; 1144dbbe8ddSJose Abreu u8 im:1; 1154dbbe8ddSJose Abreu u8 nc:1; 1164dbbe8ddSJose Abreu u8 res1:4; 1174dbbe8ddSJose Abreu u8 frame_offset; 1184dbbe8ddSJose Abreu u8 ok_index; 1194dbbe8ddSJose Abreu u8 dma_ch_no; 1204dbbe8ddSJose Abreu u32 res2; 1214dbbe8ddSJose Abreu } __packed val; 1224dbbe8ddSJose Abreu }; 1234dbbe8ddSJose Abreu 1249a8a02c9SJose Abreu #define STMMAC_PPS_MAX 4 1259a8a02c9SJose Abreu struct stmmac_pps_cfg { 1269a8a02c9SJose Abreu bool available; 1279a8a02c9SJose Abreu struct timespec64 start; 1289a8a02c9SJose Abreu struct timespec64 period; 1299a8a02c9SJose Abreu }; 1309a8a02c9SJose Abreu 13176067459SJose Abreu struct stmmac_rss { 13276067459SJose Abreu int enable; 13376067459SJose Abreu u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 13476067459SJose Abreu u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 13576067459SJose Abreu }; 13676067459SJose Abreu 137425eabddSJose Abreu #define STMMAC_FLOW_ACTION_DROP BIT(0) 138425eabddSJose Abreu struct stmmac_flow_entry { 139425eabddSJose Abreu unsigned long cookie; 140425eabddSJose Abreu unsigned long action; 141425eabddSJose Abreu u8 ip_proto; 142425eabddSJose Abreu int in_use; 143425eabddSJose Abreu int idx; 144425eabddSJose Abreu int is_l4; 145425eabddSJose Abreu }; 146425eabddSJose Abreu 1477ac6653aSJeff Kirsher struct stmmac_priv { 1487ac6653aSJeff Kirsher /* Frequently used values are kept adjacent for cache effect */ 1491bb6dea8SGiuseppe CAVALLARO u32 tx_coal_frames; 1501bb6dea8SGiuseppe CAVALLARO u32 tx_coal_timer; 151d429b66eSJose Abreu u32 rx_coal_frames; 152ce736788SJoao Pinto 1537ac6653aSJeff Kirsher int tx_coalesce; 1541bb6dea8SGiuseppe CAVALLARO int hwts_tx_en; 1551bb6dea8SGiuseppe CAVALLARO bool tx_path_in_lpi_mode; 156f748be53SAlexandre TORGUE bool tso; 15767afd6d1SJose Abreu int sph; 1588000ddc0SJose Abreu u32 sarc_type; 1597ac6653aSJeff Kirsher 1607ac6653aSJeff Kirsher unsigned int dma_buf_sz; 16122ad3838SGiuseppe Cavallaro unsigned int rx_copybreak; 1621bb6dea8SGiuseppe CAVALLARO u32 rx_riwt; 1631bb6dea8SGiuseppe CAVALLARO int hwts_rx_en; 1645bacd778SLABBE Corentin 1651bb6dea8SGiuseppe CAVALLARO void __iomem *ioaddr; 1661bb6dea8SGiuseppe CAVALLARO struct net_device *dev; 1677ac6653aSJeff Kirsher struct device *device; 1687ac6653aSJeff Kirsher struct mac_device_info *hw; 1697cfde0afSJose Abreu int (*hwif_quirks)(struct stmmac_priv *priv); 17029555fa3SThierry Reding struct mutex lock; 1717ac6653aSJeff Kirsher 17254139cf3SJoao Pinto /* RX Queue */ 17354139cf3SJoao Pinto struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 17454139cf3SJoao Pinto 175ce736788SJoao Pinto /* TX Queue */ 176ce736788SJoao Pinto struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 177ce736788SJoao Pinto 1788fce3331SJose Abreu /* Generic channel for NAPI */ 1798fce3331SJose Abreu struct stmmac_channel channel[STMMAC_CH_MAX]; 1808fce3331SJose Abreu 1817ac6653aSJeff Kirsher int speed; 1827ac6653aSJeff Kirsher unsigned int flow_ctrl; 1837ac6653aSJeff Kirsher unsigned int pause; 1847ac6653aSJeff Kirsher struct mii_bus *mii; 1857ac6653aSJeff Kirsher int mii_irq[PHY_MAX_ADDR]; 1867ac6653aSJeff Kirsher 187eeef2f6bSJose Abreu struct phylink_config phylink_config; 188eeef2f6bSJose Abreu struct phylink *phylink; 189eeef2f6bSJose Abreu 1901bb6dea8SGiuseppe CAVALLARO struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 1918bf993a5SJose Abreu struct stmmac_safety_stats sstats; 1921bb6dea8SGiuseppe CAVALLARO struct plat_stmmacenet_data *plat; 1931bb6dea8SGiuseppe CAVALLARO struct dma_features dma_cap; 1941bb6dea8SGiuseppe CAVALLARO struct stmmac_counters mmc; 1951bb6dea8SGiuseppe CAVALLARO int hw_cap_support; 1961bb6dea8SGiuseppe CAVALLARO int synopsys_id; 1977ac6653aSJeff Kirsher u32 msg_enable; 1987ac6653aSJeff Kirsher int wolopts; 1993172d3afSDeepak Sikri int wol_irq; 200cd7201f4SGiuseppe CAVALLARO int clk_csr; 201d765955dSGiuseppe CAVALLARO struct timer_list eee_ctrl_timer; 202d765955dSGiuseppe CAVALLARO int lpi_irq; 203d765955dSGiuseppe CAVALLARO int eee_enabled; 204d765955dSGiuseppe CAVALLARO int eee_active; 205d765955dSGiuseppe CAVALLARO int tx_lpi_timer; 206*388e201dSVineetha G. Jaya Kumaran int tx_lpi_enabled; 207*388e201dSVineetha G. Jaya Kumaran int eee_tw_timer; 2084a7d666aSGiuseppe CAVALLARO unsigned int mode; 2095f0456b4SJose Abreu unsigned int chain_mode; 210c24602efSGiuseppe CAVALLARO int extend_desc; 211d6228b7cSArtem Panfilov struct hwtstamp_config tstamp_config; 21292ba6888SRayagond Kokatanur struct ptp_clock *ptp_clock; 21392ba6888SRayagond Kokatanur struct ptp_clock_info ptp_clock_ops; 2141bb6dea8SGiuseppe CAVALLARO unsigned int default_addend; 2159a8a02c9SJose Abreu u32 sub_second_inc; 2169a8a02c9SJose Abreu u32 systime_flags; 2171bb6dea8SGiuseppe CAVALLARO u32 adv_ts; 2181bb6dea8SGiuseppe CAVALLARO int use_riwt; 21989f7f2cfSSrinivas Kandagatla int irq_wake; 22092ba6888SRayagond Kokatanur spinlock_t ptp_lock; 22136ff7c1eSAlexandre TORGUE void __iomem *mmcaddr; 222ba1ffd74SGiuseppe CAVALLARO void __iomem *ptpaddr; 2233cd1cfcbSJose Abreu unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 224466c5ac8SMathieu Olivari 225466c5ac8SMathieu Olivari #ifdef CONFIG_DEBUG_FS 226466c5ac8SMathieu Olivari struct dentry *dbgfs_dir; 227466c5ac8SMathieu Olivari #endif 22834877a15SJose Abreu 22934877a15SJose Abreu unsigned long state; 23034877a15SJose Abreu struct workqueue_struct *wq; 23134877a15SJose Abreu struct work_struct service_task; 2324dbbe8ddSJose Abreu 2334dbbe8ddSJose Abreu /* TC Handling */ 2344dbbe8ddSJose Abreu unsigned int tc_entries_max; 2354dbbe8ddSJose Abreu unsigned int tc_off_max; 2364dbbe8ddSJose Abreu struct stmmac_tc_entry *tc_entries; 237425eabddSJose Abreu unsigned int flow_entries_max; 238425eabddSJose Abreu struct stmmac_flow_entry *flow_entries; 2399a8a02c9SJose Abreu 2409a8a02c9SJose Abreu /* Pulse Per Second output */ 2419a8a02c9SJose Abreu struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 24276067459SJose Abreu 24376067459SJose Abreu /* Receive Side Scaling */ 24476067459SJose Abreu struct stmmac_rss rss; 24534877a15SJose Abreu }; 24634877a15SJose Abreu 24734877a15SJose Abreu enum stmmac_state { 24834877a15SJose Abreu STMMAC_DOWN, 24934877a15SJose Abreu STMMAC_RESET_REQUESTED, 25034877a15SJose Abreu STMMAC_RESETING, 25134877a15SJose Abreu STMMAC_SERVICE_SCHED, 2527ac6653aSJeff Kirsher }; 2537ac6653aSJeff Kirsher 254d6cc64efSJoe Perches int stmmac_mdio_unregister(struct net_device *ndev); 255d6cc64efSJoe Perches int stmmac_mdio_register(struct net_device *ndev); 256073752aaSSrinivas Kandagatla int stmmac_mdio_reset(struct mii_bus *mii); 257d6cc64efSJoe Perches void stmmac_set_ethtool_ops(struct net_device *netdev); 258915af656SAndy Shevchenko 259c30a70d3SGiuseppe CAVALLARO void stmmac_ptp_register(struct stmmac_priv *priv); 260d6cc64efSJoe Perches void stmmac_ptp_unregister(struct stmmac_priv *priv); 261f4e7bd81SJoachim Eastwood int stmmac_resume(struct device *dev); 262f4e7bd81SJoachim Eastwood int stmmac_suspend(struct device *dev); 263f4e7bd81SJoachim Eastwood int stmmac_dvr_remove(struct device *dev); 26415ffac73SJoachim Eastwood int stmmac_dvr_probe(struct device *device, 265cf3f047bSGiuseppe CAVALLARO struct plat_stmmacenet_data *plat_dat, 266e56788cfSJoachim Eastwood struct stmmac_resources *res); 267d765955dSGiuseppe CAVALLARO void stmmac_disable_eee_mode(struct stmmac_priv *priv); 268d765955dSGiuseppe CAVALLARO bool stmmac_eee_init(struct stmmac_priv *priv); 269ba1377ffSGiuseppe CAVALLARO 270091810dbSJose Abreu #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 271091810dbSJose Abreu void stmmac_selftest_run(struct net_device *dev, 272091810dbSJose Abreu struct ethtool_test *etest, u64 *buf); 273091810dbSJose Abreu void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 274091810dbSJose Abreu int stmmac_selftest_get_count(struct stmmac_priv *priv); 275091810dbSJose Abreu #else 276091810dbSJose Abreu static inline void stmmac_selftest_run(struct net_device *dev, 277091810dbSJose Abreu struct ethtool_test *etest, u64 *buf) 278091810dbSJose Abreu { 279091810dbSJose Abreu /* Not enabled */ 280091810dbSJose Abreu } 281091810dbSJose Abreu static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 282091810dbSJose Abreu u8 *data) 283091810dbSJose Abreu { 284091810dbSJose Abreu /* Not enabled */ 285091810dbSJose Abreu } 286091810dbSJose Abreu static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 287091810dbSJose Abreu { 288091810dbSJose Abreu return -EOPNOTSUPP; 289091810dbSJose Abreu } 290091810dbSJose Abreu #endif /* CONFIG_STMMAC_SELFTESTS */ 291091810dbSJose Abreu 292bd4242dfSRayagond Kokatanur #endif /* __STMMAC_H__ */ 293