17ac6653aSJeff Kirsher /******************************************************************************* 27ac6653aSJeff Kirsher Copyright (C) 2007-2009 STMicroelectronics Ltd 37ac6653aSJeff Kirsher 47ac6653aSJeff Kirsher This program is free software; you can redistribute it and/or modify it 57ac6653aSJeff Kirsher under the terms and conditions of the GNU General Public License, 67ac6653aSJeff Kirsher version 2, as published by the Free Software Foundation. 77ac6653aSJeff Kirsher 87ac6653aSJeff Kirsher This program is distributed in the hope it will be useful, but WITHOUT 97ac6653aSJeff Kirsher ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 107ac6653aSJeff Kirsher FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 117ac6653aSJeff Kirsher more details. 127ac6653aSJeff Kirsher 137ac6653aSJeff Kirsher The full GNU General Public License is included in this distribution in 147ac6653aSJeff Kirsher the file called "COPYING". 157ac6653aSJeff Kirsher 167ac6653aSJeff Kirsher Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 177ac6653aSJeff Kirsher *******************************************************************************/ 187ac6653aSJeff Kirsher 19bd4242dfSRayagond Kokatanur #ifndef __STMMAC_H__ 20bd4242dfSRayagond Kokatanur #define __STMMAC_H__ 21bd4242dfSRayagond Kokatanur 22bfab27a1SGiuseppe CAVALLARO #define STMMAC_RESOURCE_NAME "stmmaceth" 2306bce7ddSAlexandre TORGUE #define DRV_MODULE_VERSION "Jan_2016" 24ba1377ffSGiuseppe CAVALLARO 25ba1377ffSGiuseppe CAVALLARO #include <linux/clk.h> 267ac6653aSJeff Kirsher #include <linux/stmmac.h> 27286a8372SGiuseppe CAVALLARO #include <linux/phy.h> 2833d5e332SGiuseppe CAVALLARO #include <linux/pci.h> 297ac6653aSJeff Kirsher #include "common.h" 3092ba6888SRayagond Kokatanur #include <linux/ptp_clock_kernel.h> 31d6228b7cSArtem Panfilov #include <linux/net_tstamp.h> 32c5e4ddbdSChen-Yu Tsai #include <linux/reset.h> 337ac6653aSJeff Kirsher 34e56788cfSJoachim Eastwood struct stmmac_resources { 35e56788cfSJoachim Eastwood void __iomem *addr; 36e56788cfSJoachim Eastwood const char *mac; 37e56788cfSJoachim Eastwood int wol_irq; 38e56788cfSJoachim Eastwood int lpi_irq; 39e56788cfSJoachim Eastwood int irq; 40e56788cfSJoachim Eastwood }; 41e56788cfSJoachim Eastwood 42362b37beSGiuseppe CAVALLARO struct stmmac_tx_info { 43362b37beSGiuseppe CAVALLARO dma_addr_t buf; 44362b37beSGiuseppe CAVALLARO bool map_as_page; 45553e2ab3SGiuseppe Cavallaro unsigned len; 462a6d8e17SGiuseppe Cavallaro bool last_segment; 4796951366SGiuseppe Cavallaro bool is_jumbo; 48362b37beSGiuseppe CAVALLARO }; 49362b37beSGiuseppe CAVALLARO 50ce736788SJoao Pinto /* Frequently used values are kept adjacent for cache effect */ 51ce736788SJoao Pinto struct stmmac_tx_queue { 528fce3331SJose Abreu u32 tx_count_frames; 538fce3331SJose Abreu struct timer_list txtimer; 54ce736788SJoao Pinto u32 queue_index; 55ce736788SJoao Pinto struct stmmac_priv *priv_data; 56ce736788SJoao Pinto struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 57ce736788SJoao Pinto struct dma_desc *dma_tx; 58ce736788SJoao Pinto struct sk_buff **tx_skbuff; 59ce736788SJoao Pinto struct stmmac_tx_info *tx_skbuff_dma; 60ce736788SJoao Pinto unsigned int cur_tx; 61ce736788SJoao Pinto unsigned int dirty_tx; 62ce736788SJoao Pinto dma_addr_t dma_tx_phy; 63ce736788SJoao Pinto u32 tx_tail_addr; 648d212a9eSNiklas Cassel u32 mss; 65ce736788SJoao Pinto }; 66ce736788SJoao Pinto 6754139cf3SJoao Pinto struct stmmac_rx_queue { 6854139cf3SJoao Pinto u32 queue_index; 6954139cf3SJoao Pinto struct stmmac_priv *priv_data; 7054139cf3SJoao Pinto struct dma_extended_desc *dma_erx; 7154139cf3SJoao Pinto struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 7254139cf3SJoao Pinto struct sk_buff **rx_skbuff; 7354139cf3SJoao Pinto dma_addr_t *rx_skbuff_dma; 7454139cf3SJoao Pinto unsigned int cur_rx; 7554139cf3SJoao Pinto unsigned int dirty_rx; 7654139cf3SJoao Pinto u32 rx_zeroc_thresh; 7754139cf3SJoao Pinto dma_addr_t dma_rx_phy; 7854139cf3SJoao Pinto u32 rx_tail_addr; 798fce3331SJose Abreu }; 808fce3331SJose Abreu 818fce3331SJose Abreu struct stmmac_channel { 824ccb4585SJose Abreu struct napi_struct rx_napi ____cacheline_aligned_in_smp; 834ccb4585SJose Abreu struct napi_struct tx_napi ____cacheline_aligned_in_smp; 848fce3331SJose Abreu struct stmmac_priv *priv_data; 858fce3331SJose Abreu u32 index; 8654139cf3SJoao Pinto }; 8754139cf3SJoao Pinto 884dbbe8ddSJose Abreu struct stmmac_tc_entry { 894dbbe8ddSJose Abreu bool in_use; 904dbbe8ddSJose Abreu bool in_hw; 914dbbe8ddSJose Abreu bool is_last; 924dbbe8ddSJose Abreu bool is_frag; 934dbbe8ddSJose Abreu void *frag_ptr; 944dbbe8ddSJose Abreu unsigned int table_pos; 954dbbe8ddSJose Abreu u32 handle; 964dbbe8ddSJose Abreu u32 prio; 974dbbe8ddSJose Abreu struct { 984dbbe8ddSJose Abreu u32 match_data; 994dbbe8ddSJose Abreu u32 match_en; 1004dbbe8ddSJose Abreu u8 af:1; 1014dbbe8ddSJose Abreu u8 rf:1; 1024dbbe8ddSJose Abreu u8 im:1; 1034dbbe8ddSJose Abreu u8 nc:1; 1044dbbe8ddSJose Abreu u8 res1:4; 1054dbbe8ddSJose Abreu u8 frame_offset; 1064dbbe8ddSJose Abreu u8 ok_index; 1074dbbe8ddSJose Abreu u8 dma_ch_no; 1084dbbe8ddSJose Abreu u32 res2; 1094dbbe8ddSJose Abreu } __packed val; 1104dbbe8ddSJose Abreu }; 1114dbbe8ddSJose Abreu 1129a8a02c9SJose Abreu #define STMMAC_PPS_MAX 4 1139a8a02c9SJose Abreu struct stmmac_pps_cfg { 1149a8a02c9SJose Abreu bool available; 1159a8a02c9SJose Abreu struct timespec64 start; 1169a8a02c9SJose Abreu struct timespec64 period; 1179a8a02c9SJose Abreu }; 1189a8a02c9SJose Abreu 1197ac6653aSJeff Kirsher struct stmmac_priv { 1207ac6653aSJeff Kirsher /* Frequently used values are kept adjacent for cache effect */ 1211bb6dea8SGiuseppe CAVALLARO u32 tx_coal_frames; 1221bb6dea8SGiuseppe CAVALLARO u32 tx_coal_timer; 123ce736788SJoao Pinto 1247ac6653aSJeff Kirsher int tx_coalesce; 1251bb6dea8SGiuseppe CAVALLARO int hwts_tx_en; 1261bb6dea8SGiuseppe CAVALLARO bool tx_path_in_lpi_mode; 127f748be53SAlexandre TORGUE bool tso; 1287ac6653aSJeff Kirsher 1297ac6653aSJeff Kirsher unsigned int dma_buf_sz; 13022ad3838SGiuseppe Cavallaro unsigned int rx_copybreak; 1311bb6dea8SGiuseppe CAVALLARO u32 rx_riwt; 1321bb6dea8SGiuseppe CAVALLARO int hwts_rx_en; 1335bacd778SLABBE Corentin 1341bb6dea8SGiuseppe CAVALLARO void __iomem *ioaddr; 1351bb6dea8SGiuseppe CAVALLARO struct net_device *dev; 1367ac6653aSJeff Kirsher struct device *device; 1377ac6653aSJeff Kirsher struct mac_device_info *hw; 1387cfde0afSJose Abreu int (*hwif_quirks)(struct stmmac_priv *priv); 13929555fa3SThierry Reding struct mutex lock; 1407ac6653aSJeff Kirsher 14154139cf3SJoao Pinto /* RX Queue */ 14254139cf3SJoao Pinto struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 14354139cf3SJoao Pinto 144ce736788SJoao Pinto /* TX Queue */ 145ce736788SJoao Pinto struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 146ce736788SJoao Pinto 1478fce3331SJose Abreu /* Generic channel for NAPI */ 1488fce3331SJose Abreu struct stmmac_channel channel[STMMAC_CH_MAX]; 1498fce3331SJose Abreu 1504d869b03SLABBE Corentin bool oldlink; 1517ac6653aSJeff Kirsher int speed; 1527ac6653aSJeff Kirsher int oldduplex; 1537ac6653aSJeff Kirsher unsigned int flow_ctrl; 1547ac6653aSJeff Kirsher unsigned int pause; 1557ac6653aSJeff Kirsher struct mii_bus *mii; 1567ac6653aSJeff Kirsher int mii_irq[PHY_MAX_ADDR]; 1577ac6653aSJeff Kirsher 1581bb6dea8SGiuseppe CAVALLARO struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 1598bf993a5SJose Abreu struct stmmac_safety_stats sstats; 1601bb6dea8SGiuseppe CAVALLARO struct plat_stmmacenet_data *plat; 1611bb6dea8SGiuseppe CAVALLARO struct dma_features dma_cap; 1621bb6dea8SGiuseppe CAVALLARO struct stmmac_counters mmc; 1631bb6dea8SGiuseppe CAVALLARO int hw_cap_support; 1641bb6dea8SGiuseppe CAVALLARO int synopsys_id; 1657ac6653aSJeff Kirsher u32 msg_enable; 1667ac6653aSJeff Kirsher int wolopts; 1673172d3afSDeepak Sikri int wol_irq; 168cd7201f4SGiuseppe CAVALLARO int clk_csr; 169d765955dSGiuseppe CAVALLARO struct timer_list eee_ctrl_timer; 170d765955dSGiuseppe CAVALLARO int lpi_irq; 171d765955dSGiuseppe CAVALLARO int eee_enabled; 172d765955dSGiuseppe CAVALLARO int eee_active; 173d765955dSGiuseppe CAVALLARO int tx_lpi_timer; 1744a7d666aSGiuseppe CAVALLARO unsigned int mode; 1755f0456b4SJose Abreu unsigned int chain_mode; 176c24602efSGiuseppe CAVALLARO int extend_desc; 177d6228b7cSArtem Panfilov struct hwtstamp_config tstamp_config; 17892ba6888SRayagond Kokatanur struct ptp_clock *ptp_clock; 17992ba6888SRayagond Kokatanur struct ptp_clock_info ptp_clock_ops; 1801bb6dea8SGiuseppe CAVALLARO unsigned int default_addend; 1819a8a02c9SJose Abreu u32 sub_second_inc; 1829a8a02c9SJose Abreu u32 systime_flags; 1831bb6dea8SGiuseppe CAVALLARO u32 adv_ts; 1841bb6dea8SGiuseppe CAVALLARO int use_riwt; 18589f7f2cfSSrinivas Kandagatla int irq_wake; 18692ba6888SRayagond Kokatanur spinlock_t ptp_lock; 18736ff7c1eSAlexandre TORGUE void __iomem *mmcaddr; 188ba1ffd74SGiuseppe CAVALLARO void __iomem *ptpaddr; 189466c5ac8SMathieu Olivari 190466c5ac8SMathieu Olivari #ifdef CONFIG_DEBUG_FS 191466c5ac8SMathieu Olivari struct dentry *dbgfs_dir; 192466c5ac8SMathieu Olivari struct dentry *dbgfs_rings_status; 193466c5ac8SMathieu Olivari struct dentry *dbgfs_dma_cap; 194466c5ac8SMathieu Olivari #endif 19534877a15SJose Abreu 19634877a15SJose Abreu unsigned long state; 19734877a15SJose Abreu struct workqueue_struct *wq; 19834877a15SJose Abreu struct work_struct service_task; 1994dbbe8ddSJose Abreu 2004dbbe8ddSJose Abreu /* TC Handling */ 2014dbbe8ddSJose Abreu unsigned int tc_entries_max; 2024dbbe8ddSJose Abreu unsigned int tc_off_max; 2034dbbe8ddSJose Abreu struct stmmac_tc_entry *tc_entries; 2049a8a02c9SJose Abreu 2059a8a02c9SJose Abreu /* Pulse Per Second output */ 2069a8a02c9SJose Abreu struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 20734877a15SJose Abreu }; 20834877a15SJose Abreu 20934877a15SJose Abreu enum stmmac_state { 21034877a15SJose Abreu STMMAC_DOWN, 21134877a15SJose Abreu STMMAC_RESET_REQUESTED, 21234877a15SJose Abreu STMMAC_RESETING, 21334877a15SJose Abreu STMMAC_SERVICE_SCHED, 2147ac6653aSJeff Kirsher }; 2157ac6653aSJeff Kirsher 216d6cc64efSJoe Perches int stmmac_mdio_unregister(struct net_device *ndev); 217d6cc64efSJoe Perches int stmmac_mdio_register(struct net_device *ndev); 218073752aaSSrinivas Kandagatla int stmmac_mdio_reset(struct mii_bus *mii); 219d6cc64efSJoe Perches void stmmac_set_ethtool_ops(struct net_device *netdev); 220915af656SAndy Shevchenko 221c30a70d3SGiuseppe CAVALLARO void stmmac_ptp_register(struct stmmac_priv *priv); 222d6cc64efSJoe Perches void stmmac_ptp_unregister(struct stmmac_priv *priv); 223f4e7bd81SJoachim Eastwood int stmmac_resume(struct device *dev); 224f4e7bd81SJoachim Eastwood int stmmac_suspend(struct device *dev); 225f4e7bd81SJoachim Eastwood int stmmac_dvr_remove(struct device *dev); 22615ffac73SJoachim Eastwood int stmmac_dvr_probe(struct device *device, 227cf3f047bSGiuseppe CAVALLARO struct plat_stmmacenet_data *plat_dat, 228e56788cfSJoachim Eastwood struct stmmac_resources *res); 229d765955dSGiuseppe CAVALLARO void stmmac_disable_eee_mode(struct stmmac_priv *priv); 230d765955dSGiuseppe CAVALLARO bool stmmac_eee_init(struct stmmac_priv *priv); 231ba1377ffSGiuseppe CAVALLARO 232*091810dbSJose Abreu #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 233*091810dbSJose Abreu void stmmac_selftest_run(struct net_device *dev, 234*091810dbSJose Abreu struct ethtool_test *etest, u64 *buf); 235*091810dbSJose Abreu void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 236*091810dbSJose Abreu int stmmac_selftest_get_count(struct stmmac_priv *priv); 237*091810dbSJose Abreu #else 238*091810dbSJose Abreu static inline void stmmac_selftest_run(struct net_device *dev, 239*091810dbSJose Abreu struct ethtool_test *etest, u64 *buf) 240*091810dbSJose Abreu { 241*091810dbSJose Abreu /* Not enabled */ 242*091810dbSJose Abreu } 243*091810dbSJose Abreu static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 244*091810dbSJose Abreu u8 *data) 245*091810dbSJose Abreu { 246*091810dbSJose Abreu /* Not enabled */ 247*091810dbSJose Abreu } 248*091810dbSJose Abreu static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 249*091810dbSJose Abreu { 250*091810dbSJose Abreu return -EOPNOTSUPP; 251*091810dbSJose Abreu } 252*091810dbSJose Abreu #endif /* CONFIG_STMMAC_SELFTESTS */ 253*091810dbSJose Abreu 254bd4242dfSRayagond Kokatanur #endif /* __STMMAC_H__ */ 255