xref: /openbmc/linux/drivers/net/ethernet/stmicro/stmmac/stmmac.h (revision 021bd5e369709717231338a182f00611794fb588)
14fa9c49fSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
27ac6653aSJeff Kirsher /*******************************************************************************
37ac6653aSJeff Kirsher   Copyright (C) 2007-2009  STMicroelectronics Ltd
47ac6653aSJeff Kirsher 
57ac6653aSJeff Kirsher 
67ac6653aSJeff Kirsher   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
77ac6653aSJeff Kirsher *******************************************************************************/
87ac6653aSJeff Kirsher 
9bd4242dfSRayagond Kokatanur #ifndef __STMMAC_H__
10bd4242dfSRayagond Kokatanur #define __STMMAC_H__
11bd4242dfSRayagond Kokatanur 
12bfab27a1SGiuseppe CAVALLARO #define STMMAC_RESOURCE_NAME   "stmmaceth"
1306bce7ddSAlexandre TORGUE #define DRV_MODULE_VERSION	"Jan_2016"
14ba1377ffSGiuseppe CAVALLARO 
15ba1377ffSGiuseppe CAVALLARO #include <linux/clk.h>
163cd1cfcbSJose Abreu #include <linux/if_vlan.h>
177ac6653aSJeff Kirsher #include <linux/stmmac.h>
18eeef2f6bSJose Abreu #include <linux/phylink.h>
1933d5e332SGiuseppe CAVALLARO #include <linux/pci.h>
207ac6653aSJeff Kirsher #include "common.h"
2192ba6888SRayagond Kokatanur #include <linux/ptp_clock_kernel.h>
22d6228b7cSArtem Panfilov #include <linux/net_tstamp.h>
23c5e4ddbdSChen-Yu Tsai #include <linux/reset.h>
242af6106aSJose Abreu #include <net/page_pool.h>
257ac6653aSJeff Kirsher 
26e56788cfSJoachim Eastwood struct stmmac_resources {
27e56788cfSJoachim Eastwood 	void __iomem *addr;
28e56788cfSJoachim Eastwood 	const char *mac;
29e56788cfSJoachim Eastwood 	int wol_irq;
30e56788cfSJoachim Eastwood 	int lpi_irq;
31e56788cfSJoachim Eastwood 	int irq;
32e56788cfSJoachim Eastwood };
33e56788cfSJoachim Eastwood 
34362b37beSGiuseppe CAVALLARO struct stmmac_tx_info {
35362b37beSGiuseppe CAVALLARO 	dma_addr_t buf;
36362b37beSGiuseppe CAVALLARO 	bool map_as_page;
37553e2ab3SGiuseppe Cavallaro 	unsigned len;
382a6d8e17SGiuseppe Cavallaro 	bool last_segment;
3996951366SGiuseppe Cavallaro 	bool is_jumbo;
40362b37beSGiuseppe CAVALLARO };
41362b37beSGiuseppe CAVALLARO 
42ce736788SJoao Pinto /* Frequently used values are kept adjacent for cache effect */
43ce736788SJoao Pinto struct stmmac_tx_queue {
448fce3331SJose Abreu 	u32 tx_count_frames;
458fce3331SJose Abreu 	struct timer_list txtimer;
46ce736788SJoao Pinto 	u32 queue_index;
47ce736788SJoao Pinto 	struct stmmac_priv *priv_data;
48ce736788SJoao Pinto 	struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
49ce736788SJoao Pinto 	struct dma_desc *dma_tx;
50ce736788SJoao Pinto 	struct sk_buff **tx_skbuff;
51ce736788SJoao Pinto 	struct stmmac_tx_info *tx_skbuff_dma;
52ce736788SJoao Pinto 	unsigned int cur_tx;
53ce736788SJoao Pinto 	unsigned int dirty_tx;
54ce736788SJoao Pinto 	dma_addr_t dma_tx_phy;
55ce736788SJoao Pinto 	u32 tx_tail_addr;
568d212a9eSNiklas Cassel 	u32 mss;
57ce736788SJoao Pinto };
58ce736788SJoao Pinto 
592af6106aSJose Abreu struct stmmac_rx_buffer {
602af6106aSJose Abreu 	struct page *page;
6167afd6d1SJose Abreu 	struct page *sec_page;
622af6106aSJose Abreu 	dma_addr_t addr;
6367afd6d1SJose Abreu 	dma_addr_t sec_addr;
642af6106aSJose Abreu };
652af6106aSJose Abreu 
6654139cf3SJoao Pinto struct stmmac_rx_queue {
67d429b66eSJose Abreu 	u32 rx_count_frames;
6854139cf3SJoao Pinto 	u32 queue_index;
692af6106aSJose Abreu 	struct page_pool *page_pool;
702af6106aSJose Abreu 	struct stmmac_rx_buffer *buf_pool;
7154139cf3SJoao Pinto 	struct stmmac_priv *priv_data;
7254139cf3SJoao Pinto 	struct dma_extended_desc *dma_erx;
7354139cf3SJoao Pinto 	struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
7454139cf3SJoao Pinto 	unsigned int cur_rx;
7554139cf3SJoao Pinto 	unsigned int dirty_rx;
7654139cf3SJoao Pinto 	u32 rx_zeroc_thresh;
7754139cf3SJoao Pinto 	dma_addr_t dma_rx_phy;
7854139cf3SJoao Pinto 	u32 rx_tail_addr;
79ec222003SJose Abreu 	unsigned int state_saved;
80ec222003SJose Abreu 	struct {
81ec222003SJose Abreu 		struct sk_buff *skb;
82ec222003SJose Abreu 		unsigned int len;
83ec222003SJose Abreu 		unsigned int error;
84ec222003SJose Abreu 	} state;
858fce3331SJose Abreu };
868fce3331SJose Abreu 
878fce3331SJose Abreu struct stmmac_channel {
884ccb4585SJose Abreu 	struct napi_struct rx_napi ____cacheline_aligned_in_smp;
894ccb4585SJose Abreu 	struct napi_struct tx_napi ____cacheline_aligned_in_smp;
908fce3331SJose Abreu 	struct stmmac_priv *priv_data;
91*021bd5e3SJose Abreu 	spinlock_t lock;
928fce3331SJose Abreu 	u32 index;
9354139cf3SJoao Pinto };
9454139cf3SJoao Pinto 
954dbbe8ddSJose Abreu struct stmmac_tc_entry {
964dbbe8ddSJose Abreu 	bool in_use;
974dbbe8ddSJose Abreu 	bool in_hw;
984dbbe8ddSJose Abreu 	bool is_last;
994dbbe8ddSJose Abreu 	bool is_frag;
1004dbbe8ddSJose Abreu 	void *frag_ptr;
1014dbbe8ddSJose Abreu 	unsigned int table_pos;
1024dbbe8ddSJose Abreu 	u32 handle;
1034dbbe8ddSJose Abreu 	u32 prio;
1044dbbe8ddSJose Abreu 	struct {
1054dbbe8ddSJose Abreu 		u32 match_data;
1064dbbe8ddSJose Abreu 		u32 match_en;
1074dbbe8ddSJose Abreu 		u8 af:1;
1084dbbe8ddSJose Abreu 		u8 rf:1;
1094dbbe8ddSJose Abreu 		u8 im:1;
1104dbbe8ddSJose Abreu 		u8 nc:1;
1114dbbe8ddSJose Abreu 		u8 res1:4;
1124dbbe8ddSJose Abreu 		u8 frame_offset;
1134dbbe8ddSJose Abreu 		u8 ok_index;
1144dbbe8ddSJose Abreu 		u8 dma_ch_no;
1154dbbe8ddSJose Abreu 		u32 res2;
1164dbbe8ddSJose Abreu 	} __packed val;
1174dbbe8ddSJose Abreu };
1184dbbe8ddSJose Abreu 
1199a8a02c9SJose Abreu #define STMMAC_PPS_MAX		4
1209a8a02c9SJose Abreu struct stmmac_pps_cfg {
1219a8a02c9SJose Abreu 	bool available;
1229a8a02c9SJose Abreu 	struct timespec64 start;
1239a8a02c9SJose Abreu 	struct timespec64 period;
1249a8a02c9SJose Abreu };
1259a8a02c9SJose Abreu 
12676067459SJose Abreu struct stmmac_rss {
12776067459SJose Abreu 	int enable;
12876067459SJose Abreu 	u8 key[STMMAC_RSS_HASH_KEY_SIZE];
12976067459SJose Abreu 	u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
13076067459SJose Abreu };
13176067459SJose Abreu 
132425eabddSJose Abreu #define STMMAC_FLOW_ACTION_DROP		BIT(0)
133425eabddSJose Abreu struct stmmac_flow_entry {
134425eabddSJose Abreu 	unsigned long cookie;
135425eabddSJose Abreu 	unsigned long action;
136425eabddSJose Abreu 	u8 ip_proto;
137425eabddSJose Abreu 	int in_use;
138425eabddSJose Abreu 	int idx;
139425eabddSJose Abreu 	int is_l4;
140425eabddSJose Abreu };
141425eabddSJose Abreu 
1427ac6653aSJeff Kirsher struct stmmac_priv {
1437ac6653aSJeff Kirsher 	/* Frequently used values are kept adjacent for cache effect */
1441bb6dea8SGiuseppe CAVALLARO 	u32 tx_coal_frames;
1451bb6dea8SGiuseppe CAVALLARO 	u32 tx_coal_timer;
146d429b66eSJose Abreu 	u32 rx_coal_frames;
147ce736788SJoao Pinto 
1487ac6653aSJeff Kirsher 	int tx_coalesce;
1491bb6dea8SGiuseppe CAVALLARO 	int hwts_tx_en;
1501bb6dea8SGiuseppe CAVALLARO 	bool tx_path_in_lpi_mode;
151f748be53SAlexandre TORGUE 	bool tso;
15267afd6d1SJose Abreu 	int sph;
1538000ddc0SJose Abreu 	u32 sarc_type;
1547ac6653aSJeff Kirsher 
1557ac6653aSJeff Kirsher 	unsigned int dma_buf_sz;
15622ad3838SGiuseppe Cavallaro 	unsigned int rx_copybreak;
1571bb6dea8SGiuseppe CAVALLARO 	u32 rx_riwt;
1581bb6dea8SGiuseppe CAVALLARO 	int hwts_rx_en;
1595bacd778SLABBE Corentin 
1601bb6dea8SGiuseppe CAVALLARO 	void __iomem *ioaddr;
1611bb6dea8SGiuseppe CAVALLARO 	struct net_device *dev;
1627ac6653aSJeff Kirsher 	struct device *device;
1637ac6653aSJeff Kirsher 	struct mac_device_info *hw;
1647cfde0afSJose Abreu 	int (*hwif_quirks)(struct stmmac_priv *priv);
16529555fa3SThierry Reding 	struct mutex lock;
1667ac6653aSJeff Kirsher 
16754139cf3SJoao Pinto 	/* RX Queue */
16854139cf3SJoao Pinto 	struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
16954139cf3SJoao Pinto 
170ce736788SJoao Pinto 	/* TX Queue */
171ce736788SJoao Pinto 	struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
172ce736788SJoao Pinto 
1738fce3331SJose Abreu 	/* Generic channel for NAPI */
1748fce3331SJose Abreu 	struct stmmac_channel channel[STMMAC_CH_MAX];
1758fce3331SJose Abreu 
1767ac6653aSJeff Kirsher 	int speed;
1777ac6653aSJeff Kirsher 	unsigned int flow_ctrl;
1787ac6653aSJeff Kirsher 	unsigned int pause;
1797ac6653aSJeff Kirsher 	struct mii_bus *mii;
1807ac6653aSJeff Kirsher 	int mii_irq[PHY_MAX_ADDR];
1817ac6653aSJeff Kirsher 
182eeef2f6bSJose Abreu 	struct phylink_config phylink_config;
183eeef2f6bSJose Abreu 	struct phylink *phylink;
184eeef2f6bSJose Abreu 
1851bb6dea8SGiuseppe CAVALLARO 	struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
1868bf993a5SJose Abreu 	struct stmmac_safety_stats sstats;
1871bb6dea8SGiuseppe CAVALLARO 	struct plat_stmmacenet_data *plat;
1881bb6dea8SGiuseppe CAVALLARO 	struct dma_features dma_cap;
1891bb6dea8SGiuseppe CAVALLARO 	struct stmmac_counters mmc;
1901bb6dea8SGiuseppe CAVALLARO 	int hw_cap_support;
1911bb6dea8SGiuseppe CAVALLARO 	int synopsys_id;
1927ac6653aSJeff Kirsher 	u32 msg_enable;
1937ac6653aSJeff Kirsher 	int wolopts;
1943172d3afSDeepak Sikri 	int wol_irq;
195cd7201f4SGiuseppe CAVALLARO 	int clk_csr;
196d765955dSGiuseppe CAVALLARO 	struct timer_list eee_ctrl_timer;
197d765955dSGiuseppe CAVALLARO 	int lpi_irq;
198d765955dSGiuseppe CAVALLARO 	int eee_enabled;
199d765955dSGiuseppe CAVALLARO 	int eee_active;
200d765955dSGiuseppe CAVALLARO 	int tx_lpi_timer;
2014a7d666aSGiuseppe CAVALLARO 	unsigned int mode;
2025f0456b4SJose Abreu 	unsigned int chain_mode;
203c24602efSGiuseppe CAVALLARO 	int extend_desc;
204d6228b7cSArtem Panfilov 	struct hwtstamp_config tstamp_config;
20592ba6888SRayagond Kokatanur 	struct ptp_clock *ptp_clock;
20692ba6888SRayagond Kokatanur 	struct ptp_clock_info ptp_clock_ops;
2071bb6dea8SGiuseppe CAVALLARO 	unsigned int default_addend;
2089a8a02c9SJose Abreu 	u32 sub_second_inc;
2099a8a02c9SJose Abreu 	u32 systime_flags;
2101bb6dea8SGiuseppe CAVALLARO 	u32 adv_ts;
2111bb6dea8SGiuseppe CAVALLARO 	int use_riwt;
21289f7f2cfSSrinivas Kandagatla 	int irq_wake;
21392ba6888SRayagond Kokatanur 	spinlock_t ptp_lock;
21436ff7c1eSAlexandre TORGUE 	void __iomem *mmcaddr;
215ba1ffd74SGiuseppe CAVALLARO 	void __iomem *ptpaddr;
2163cd1cfcbSJose Abreu 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
217466c5ac8SMathieu Olivari 
218466c5ac8SMathieu Olivari #ifdef CONFIG_DEBUG_FS
219466c5ac8SMathieu Olivari 	struct dentry *dbgfs_dir;
220466c5ac8SMathieu Olivari #endif
22134877a15SJose Abreu 
22234877a15SJose Abreu 	unsigned long state;
22334877a15SJose Abreu 	struct workqueue_struct *wq;
22434877a15SJose Abreu 	struct work_struct service_task;
2254dbbe8ddSJose Abreu 
2264dbbe8ddSJose Abreu 	/* TC Handling */
2274dbbe8ddSJose Abreu 	unsigned int tc_entries_max;
2284dbbe8ddSJose Abreu 	unsigned int tc_off_max;
2294dbbe8ddSJose Abreu 	struct stmmac_tc_entry *tc_entries;
230425eabddSJose Abreu 	unsigned int flow_entries_max;
231425eabddSJose Abreu 	struct stmmac_flow_entry *flow_entries;
2329a8a02c9SJose Abreu 
2339a8a02c9SJose Abreu 	/* Pulse Per Second output */
2349a8a02c9SJose Abreu 	struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
23576067459SJose Abreu 
23676067459SJose Abreu 	/* Receive Side Scaling */
23776067459SJose Abreu 	struct stmmac_rss rss;
23834877a15SJose Abreu };
23934877a15SJose Abreu 
24034877a15SJose Abreu enum stmmac_state {
24134877a15SJose Abreu 	STMMAC_DOWN,
24234877a15SJose Abreu 	STMMAC_RESET_REQUESTED,
24334877a15SJose Abreu 	STMMAC_RESETING,
24434877a15SJose Abreu 	STMMAC_SERVICE_SCHED,
2457ac6653aSJeff Kirsher };
2467ac6653aSJeff Kirsher 
247d6cc64efSJoe Perches int stmmac_mdio_unregister(struct net_device *ndev);
248d6cc64efSJoe Perches int stmmac_mdio_register(struct net_device *ndev);
249073752aaSSrinivas Kandagatla int stmmac_mdio_reset(struct mii_bus *mii);
250d6cc64efSJoe Perches void stmmac_set_ethtool_ops(struct net_device *netdev);
251915af656SAndy Shevchenko 
252c30a70d3SGiuseppe CAVALLARO void stmmac_ptp_register(struct stmmac_priv *priv);
253d6cc64efSJoe Perches void stmmac_ptp_unregister(struct stmmac_priv *priv);
254f4e7bd81SJoachim Eastwood int stmmac_resume(struct device *dev);
255f4e7bd81SJoachim Eastwood int stmmac_suspend(struct device *dev);
256f4e7bd81SJoachim Eastwood int stmmac_dvr_remove(struct device *dev);
25715ffac73SJoachim Eastwood int stmmac_dvr_probe(struct device *device,
258cf3f047bSGiuseppe CAVALLARO 		     struct plat_stmmacenet_data *plat_dat,
259e56788cfSJoachim Eastwood 		     struct stmmac_resources *res);
260d765955dSGiuseppe CAVALLARO void stmmac_disable_eee_mode(struct stmmac_priv *priv);
261d765955dSGiuseppe CAVALLARO bool stmmac_eee_init(struct stmmac_priv *priv);
262ba1377ffSGiuseppe CAVALLARO 
263091810dbSJose Abreu #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
264091810dbSJose Abreu void stmmac_selftest_run(struct net_device *dev,
265091810dbSJose Abreu 			 struct ethtool_test *etest, u64 *buf);
266091810dbSJose Abreu void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
267091810dbSJose Abreu int stmmac_selftest_get_count(struct stmmac_priv *priv);
268091810dbSJose Abreu #else
269091810dbSJose Abreu static inline void stmmac_selftest_run(struct net_device *dev,
270091810dbSJose Abreu 				       struct ethtool_test *etest, u64 *buf)
271091810dbSJose Abreu {
272091810dbSJose Abreu 	/* Not enabled */
273091810dbSJose Abreu }
274091810dbSJose Abreu static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
275091810dbSJose Abreu 					       u8 *data)
276091810dbSJose Abreu {
277091810dbSJose Abreu 	/* Not enabled */
278091810dbSJose Abreu }
279091810dbSJose Abreu static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
280091810dbSJose Abreu {
281091810dbSJose Abreu 	return -EOPNOTSUPP;
282091810dbSJose Abreu }
283091810dbSJose Abreu #endif /* CONFIG_STMMAC_SELFTESTS */
284091810dbSJose Abreu 
285bd4242dfSRayagond Kokatanur #endif /* __STMMAC_H__ */
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