154baba33SEmil Renner Berthing// SPDX-License-Identifier: GPL-2.0 OR MIT 254baba33SEmil Renner Berthing/* 354baba33SEmil Renner Berthing * Copyright (C) 2022 StarFive Technology Co., Ltd. 454baba33SEmil Renner Berthing * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> 554baba33SEmil Renner Berthing */ 654baba33SEmil Renner Berthing 754baba33SEmil Renner Berthing/dts-v1/; 854baba33SEmil Renner Berthing#include "jh7110.dtsi" 954baba33SEmil Renner Berthing#include "jh7110-pinfunc.h" 1054baba33SEmil Renner Berthing#include <dt-bindings/gpio/gpio.h> 1154baba33SEmil Renner Berthing 1254baba33SEmil Renner Berthing/ { 1354baba33SEmil Renner Berthing aliases { 140104340aSSamin Guo ethernet0 = &gmac0; 150104340aSSamin Guo ethernet1 = &gmac1; 1654baba33SEmil Renner Berthing i2c0 = &i2c0; 1754baba33SEmil Renner Berthing i2c2 = &i2c2; 1854baba33SEmil Renner Berthing i2c5 = &i2c5; 1954baba33SEmil Renner Berthing i2c6 = &i2c6; 20b127dbf9SWilliam Qiu mmc0 = &mmc0; 21b127dbf9SWilliam Qiu mmc1 = &mmc1; 2254baba33SEmil Renner Berthing serial0 = &uart0; 2354baba33SEmil Renner Berthing }; 2454baba33SEmil Renner Berthing 2554baba33SEmil Renner Berthing chosen { 2654baba33SEmil Renner Berthing stdout-path = "serial0:115200n8"; 2754baba33SEmil Renner Berthing }; 2854baba33SEmil Renner Berthing 2954baba33SEmil Renner Berthing cpus { 3054baba33SEmil Renner Berthing timebase-frequency = <4000000>; 3154baba33SEmil Renner Berthing }; 3254baba33SEmil Renner Berthing 3354baba33SEmil Renner Berthing memory@40000000 { 3454baba33SEmil Renner Berthing device_type = "memory"; 3554baba33SEmil Renner Berthing reg = <0x0 0x40000000 0x1 0x0>; 3654baba33SEmil Renner Berthing }; 3754baba33SEmil Renner Berthing 3854baba33SEmil Renner Berthing gpio-restart { 3954baba33SEmil Renner Berthing compatible = "gpio-restart"; 4054baba33SEmil Renner Berthing gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>; 4154baba33SEmil Renner Berthing priority = <224>; 4254baba33SEmil Renner Berthing }; 4354baba33SEmil Renner Berthing}; 4454baba33SEmil Renner Berthing 4543f09605SXingyu Wu&dvp_clk { 4643f09605SXingyu Wu clock-frequency = <74250000>; 4743f09605SXingyu Wu}; 4843f09605SXingyu Wu 4954baba33SEmil Renner Berthing&gmac0_rgmii_rxin { 5054baba33SEmil Renner Berthing clock-frequency = <125000000>; 5154baba33SEmil Renner Berthing}; 5254baba33SEmil Renner Berthing 5354baba33SEmil Renner Berthing&gmac0_rmii_refin { 5454baba33SEmil Renner Berthing clock-frequency = <50000000>; 5554baba33SEmil Renner Berthing}; 5654baba33SEmil Renner Berthing 5754baba33SEmil Renner Berthing&gmac1_rgmii_rxin { 5854baba33SEmil Renner Berthing clock-frequency = <125000000>; 5954baba33SEmil Renner Berthing}; 6054baba33SEmil Renner Berthing 6154baba33SEmil Renner Berthing&gmac1_rmii_refin { 6254baba33SEmil Renner Berthing clock-frequency = <50000000>; 6354baba33SEmil Renner Berthing}; 6454baba33SEmil Renner Berthing 6543f09605SXingyu Wu&hdmitx0_pixelclk { 6643f09605SXingyu Wu clock-frequency = <297000000>; 6743f09605SXingyu Wu}; 6843f09605SXingyu Wu 6954baba33SEmil Renner Berthing&i2srx_bclk_ext { 7054baba33SEmil Renner Berthing clock-frequency = <12288000>; 7154baba33SEmil Renner Berthing}; 7254baba33SEmil Renner Berthing 7354baba33SEmil Renner Berthing&i2srx_lrck_ext { 7454baba33SEmil Renner Berthing clock-frequency = <192000>; 7554baba33SEmil Renner Berthing}; 7654baba33SEmil Renner Berthing 7754baba33SEmil Renner Berthing&i2stx_bclk_ext { 7854baba33SEmil Renner Berthing clock-frequency = <12288000>; 7954baba33SEmil Renner Berthing}; 8054baba33SEmil Renner Berthing 8154baba33SEmil Renner Berthing&i2stx_lrck_ext { 8254baba33SEmil Renner Berthing clock-frequency = <192000>; 8354baba33SEmil Renner Berthing}; 8454baba33SEmil Renner Berthing 8554baba33SEmil Renner Berthing&mclk_ext { 8654baba33SEmil Renner Berthing clock-frequency = <12288000>; 8754baba33SEmil Renner Berthing}; 8854baba33SEmil Renner Berthing 8954baba33SEmil Renner Berthing&osc { 9054baba33SEmil Renner Berthing clock-frequency = <24000000>; 9154baba33SEmil Renner Berthing}; 9254baba33SEmil Renner Berthing 9354baba33SEmil Renner Berthing&rtc_osc { 9454baba33SEmil Renner Berthing clock-frequency = <32768>; 9554baba33SEmil Renner Berthing}; 9654baba33SEmil Renner Berthing 9754baba33SEmil Renner Berthing&tdm_ext { 9854baba33SEmil Renner Berthing clock-frequency = <49152000>; 9954baba33SEmil Renner Berthing}; 10054baba33SEmil Renner Berthing 1010104340aSSamin Guo&gmac0 { 1020104340aSSamin Guo phy-handle = <&phy0>; 1030104340aSSamin Guo phy-mode = "rgmii-id"; 1040104340aSSamin Guo status = "okay"; 1050104340aSSamin Guo 1060104340aSSamin Guo mdio { 1070104340aSSamin Guo #address-cells = <1>; 1080104340aSSamin Guo #size-cells = <0>; 1090104340aSSamin Guo compatible = "snps,dwmac-mdio"; 1100104340aSSamin Guo 1110104340aSSamin Guo phy0: ethernet-phy@0 { 1120104340aSSamin Guo reg = <0>; 1130104340aSSamin Guo }; 1140104340aSSamin Guo }; 1150104340aSSamin Guo}; 1160104340aSSamin Guo 1170104340aSSamin Guo&gmac1 { 1180104340aSSamin Guo phy-handle = <&phy1>; 1190104340aSSamin Guo phy-mode = "rgmii-id"; 1200104340aSSamin Guo status = "okay"; 1210104340aSSamin Guo 1220104340aSSamin Guo mdio { 1230104340aSSamin Guo #address-cells = <1>; 1240104340aSSamin Guo #size-cells = <0>; 1250104340aSSamin Guo compatible = "snps,dwmac-mdio"; 1260104340aSSamin Guo 1270104340aSSamin Guo phy1: ethernet-phy@1 { 1280104340aSSamin Guo reg = <0>; 1290104340aSSamin Guo }; 1300104340aSSamin Guo }; 1310104340aSSamin Guo}; 1320104340aSSamin Guo 13354baba33SEmil Renner Berthing&i2c0 { 13454baba33SEmil Renner Berthing clock-frequency = <100000>; 13554baba33SEmil Renner Berthing i2c-sda-hold-time-ns = <300>; 13654baba33SEmil Renner Berthing i2c-sda-falling-time-ns = <510>; 13754baba33SEmil Renner Berthing i2c-scl-falling-time-ns = <510>; 13854baba33SEmil Renner Berthing pinctrl-names = "default"; 13954baba33SEmil Renner Berthing pinctrl-0 = <&i2c0_pins>; 14054baba33SEmil Renner Berthing status = "okay"; 14154baba33SEmil Renner Berthing}; 14254baba33SEmil Renner Berthing 14354baba33SEmil Renner Berthing&i2c2 { 14454baba33SEmil Renner Berthing clock-frequency = <100000>; 14554baba33SEmil Renner Berthing i2c-sda-hold-time-ns = <300>; 14654baba33SEmil Renner Berthing i2c-sda-falling-time-ns = <510>; 14754baba33SEmil Renner Berthing i2c-scl-falling-time-ns = <510>; 14854baba33SEmil Renner Berthing pinctrl-names = "default"; 14954baba33SEmil Renner Berthing pinctrl-0 = <&i2c2_pins>; 15054baba33SEmil Renner Berthing status = "okay"; 15154baba33SEmil Renner Berthing}; 15254baba33SEmil Renner Berthing 15354baba33SEmil Renner Berthing&i2c5 { 15454baba33SEmil Renner Berthing clock-frequency = <100000>; 15554baba33SEmil Renner Berthing i2c-sda-hold-time-ns = <300>; 15654baba33SEmil Renner Berthing i2c-sda-falling-time-ns = <510>; 15754baba33SEmil Renner Berthing i2c-scl-falling-time-ns = <510>; 15854baba33SEmil Renner Berthing pinctrl-names = "default"; 15954baba33SEmil Renner Berthing pinctrl-0 = <&i2c5_pins>; 16054baba33SEmil Renner Berthing status = "okay"; 16123783415SMason Huo 16223783415SMason Huo axp15060: pmic@36 { 16323783415SMason Huo compatible = "x-powers,axp15060"; 16423783415SMason Huo reg = <0x36>; 16523783415SMason Huo interrupt-controller; 16623783415SMason Huo #interrupt-cells = <1>; 16723783415SMason Huo 16823783415SMason Huo regulators { 1697dafcfa7SWilliam Qiu vcc_3v3: dcdc1 { 1707dafcfa7SWilliam Qiu regulator-boot-on; 1717dafcfa7SWilliam Qiu regulator-always-on; 1727dafcfa7SWilliam Qiu regulator-min-microvolt = <3300000>; 1737dafcfa7SWilliam Qiu regulator-max-microvolt = <3300000>; 1747dafcfa7SWilliam Qiu regulator-name = "vcc_3v3"; 1757dafcfa7SWilliam Qiu }; 1767dafcfa7SWilliam Qiu 17723783415SMason Huo vdd_cpu: dcdc2 { 17823783415SMason Huo regulator-always-on; 17923783415SMason Huo regulator-min-microvolt = <500000>; 18023783415SMason Huo regulator-max-microvolt = <1540000>; 18123783415SMason Huo regulator-name = "vdd-cpu"; 18223783415SMason Huo }; 1837dafcfa7SWilliam Qiu 1847dafcfa7SWilliam Qiu emmc_vdd: aldo4 { 1857dafcfa7SWilliam Qiu regulator-boot-on; 1867dafcfa7SWilliam Qiu regulator-always-on; 1877dafcfa7SWilliam Qiu regulator-min-microvolt = <1800000>; 1887dafcfa7SWilliam Qiu regulator-max-microvolt = <1800000>; 1897dafcfa7SWilliam Qiu regulator-name = "emmc_vdd"; 1907dafcfa7SWilliam Qiu }; 19123783415SMason Huo }; 19223783415SMason Huo }; 19354baba33SEmil Renner Berthing}; 19454baba33SEmil Renner Berthing 19554baba33SEmil Renner Berthing&i2c6 { 19654baba33SEmil Renner Berthing clock-frequency = <100000>; 19754baba33SEmil Renner Berthing i2c-sda-hold-time-ns = <300>; 19854baba33SEmil Renner Berthing i2c-sda-falling-time-ns = <510>; 19954baba33SEmil Renner Berthing i2c-scl-falling-time-ns = <510>; 20054baba33SEmil Renner Berthing pinctrl-names = "default"; 20154baba33SEmil Renner Berthing pinctrl-0 = <&i2c6_pins>; 20254baba33SEmil Renner Berthing status = "okay"; 20354baba33SEmil Renner Berthing}; 20454baba33SEmil Renner Berthing 205b127dbf9SWilliam Qiu&mmc0 { 206b127dbf9SWilliam Qiu max-frequency = <100000000>; 207*bd9c3c2dSWilliam Qiu assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; 208*bd9c3c2dSWilliam Qiu assigned-clock-rates = <50000000>; 209b127dbf9SWilliam Qiu bus-width = <8>; 210b127dbf9SWilliam Qiu cap-mmc-highspeed; 211b127dbf9SWilliam Qiu mmc-ddr-1_8v; 212b127dbf9SWilliam Qiu mmc-hs200-1_8v; 213b127dbf9SWilliam Qiu non-removable; 214b127dbf9SWilliam Qiu cap-mmc-hw-reset; 215b127dbf9SWilliam Qiu post-power-on-delay-ms = <200>; 216b127dbf9SWilliam Qiu pinctrl-names = "default"; 217b127dbf9SWilliam Qiu pinctrl-0 = <&mmc0_pins>; 218b127dbf9SWilliam Qiu vmmc-supply = <&vcc_3v3>; 219b127dbf9SWilliam Qiu vqmmc-supply = <&emmc_vdd>; 220b127dbf9SWilliam Qiu status = "okay"; 221b127dbf9SWilliam Qiu}; 222b127dbf9SWilliam Qiu 223b127dbf9SWilliam Qiu&mmc1 { 224b127dbf9SWilliam Qiu max-frequency = <100000000>; 225*bd9c3c2dSWilliam Qiu assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; 226*bd9c3c2dSWilliam Qiu assigned-clock-rates = <50000000>; 227b127dbf9SWilliam Qiu bus-width = <4>; 228b127dbf9SWilliam Qiu no-sdio; 229b127dbf9SWilliam Qiu no-mmc; 230b127dbf9SWilliam Qiu broken-cd; 231b127dbf9SWilliam Qiu cap-sd-highspeed; 232b127dbf9SWilliam Qiu post-power-on-delay-ms = <200>; 233b127dbf9SWilliam Qiu pinctrl-names = "default"; 234b127dbf9SWilliam Qiu pinctrl-0 = <&mmc1_pins>; 235b127dbf9SWilliam Qiu status = "okay"; 236b127dbf9SWilliam Qiu}; 237b127dbf9SWilliam Qiu 2388384087aSWilliam Qiu&qspi { 2398384087aSWilliam Qiu #address-cells = <1>; 2408384087aSWilliam Qiu #size-cells = <0>; 2418384087aSWilliam Qiu status = "okay"; 2428384087aSWilliam Qiu 2438384087aSWilliam Qiu nor_flash: flash@0 { 2448384087aSWilliam Qiu compatible = "jedec,spi-nor"; 2458384087aSWilliam Qiu reg = <0>; 2468384087aSWilliam Qiu cdns,read-delay = <5>; 2478384087aSWilliam Qiu spi-max-frequency = <12000000>; 2488384087aSWilliam Qiu cdns,tshsl-ns = <1>; 2498384087aSWilliam Qiu cdns,tsd2d-ns = <1>; 2508384087aSWilliam Qiu cdns,tchsh-ns = <1>; 2518384087aSWilliam Qiu cdns,tslch-ns = <1>; 2528384087aSWilliam Qiu 2538384087aSWilliam Qiu partitions { 2548384087aSWilliam Qiu compatible = "fixed-partitions"; 2558384087aSWilliam Qiu #address-cells = <1>; 2568384087aSWilliam Qiu #size-cells = <1>; 2578384087aSWilliam Qiu 2588384087aSWilliam Qiu spl@0 { 2598384087aSWilliam Qiu reg = <0x0 0x80000>; 2608384087aSWilliam Qiu }; 2618384087aSWilliam Qiu uboot-env@f0000 { 2628384087aSWilliam Qiu reg = <0xf0000 0x10000>; 2638384087aSWilliam Qiu }; 2648384087aSWilliam Qiu uboot@100000 { 2658384087aSWilliam Qiu reg = <0x100000 0x400000>; 2668384087aSWilliam Qiu }; 2678384087aSWilliam Qiu reserved-data@600000 { 2683e8bd1baSAurelien Jarno reg = <0x600000 0xa00000>; 2698384087aSWilliam Qiu }; 2708384087aSWilliam Qiu }; 2718384087aSWilliam Qiu }; 2728384087aSWilliam Qiu}; 2738384087aSWilliam Qiu 27474fb20c8SWilliam Qiu&spi0 { 27574fb20c8SWilliam Qiu pinctrl-names = "default"; 27674fb20c8SWilliam Qiu pinctrl-0 = <&spi0_pins>; 27774fb20c8SWilliam Qiu status = "okay"; 27874fb20c8SWilliam Qiu 27974fb20c8SWilliam Qiu spi_dev0: spi@0 { 28074fb20c8SWilliam Qiu compatible = "rohm,dh2228fv"; 28174fb20c8SWilliam Qiu reg = <0>; 28274fb20c8SWilliam Qiu spi-max-frequency = <10000000>; 28374fb20c8SWilliam Qiu }; 28474fb20c8SWilliam Qiu}; 28574fb20c8SWilliam Qiu 28654baba33SEmil Renner Berthing&sysgpio { 28754baba33SEmil Renner Berthing i2c0_pins: i2c0-0 { 28854baba33SEmil Renner Berthing i2c-pins { 28954baba33SEmil Renner Berthing pinmux = <GPIOMUX(57, GPOUT_LOW, 29054baba33SEmil Renner Berthing GPOEN_SYS_I2C0_CLK, 29154baba33SEmil Renner Berthing GPI_SYS_I2C0_CLK)>, 29254baba33SEmil Renner Berthing <GPIOMUX(58, GPOUT_LOW, 29354baba33SEmil Renner Berthing GPOEN_SYS_I2C0_DATA, 29454baba33SEmil Renner Berthing GPI_SYS_I2C0_DATA)>; 29554baba33SEmil Renner Berthing bias-disable; /* external pull-up */ 29654baba33SEmil Renner Berthing input-enable; 29754baba33SEmil Renner Berthing input-schmitt-enable; 29854baba33SEmil Renner Berthing }; 29954baba33SEmil Renner Berthing }; 30054baba33SEmil Renner Berthing 30154baba33SEmil Renner Berthing i2c2_pins: i2c2-0 { 30254baba33SEmil Renner Berthing i2c-pins { 30354baba33SEmil Renner Berthing pinmux = <GPIOMUX(3, GPOUT_LOW, 30454baba33SEmil Renner Berthing GPOEN_SYS_I2C2_CLK, 30554baba33SEmil Renner Berthing GPI_SYS_I2C2_CLK)>, 30654baba33SEmil Renner Berthing <GPIOMUX(2, GPOUT_LOW, 30754baba33SEmil Renner Berthing GPOEN_SYS_I2C2_DATA, 30854baba33SEmil Renner Berthing GPI_SYS_I2C2_DATA)>; 30954baba33SEmil Renner Berthing bias-disable; /* external pull-up */ 31054baba33SEmil Renner Berthing input-enable; 31154baba33SEmil Renner Berthing input-schmitt-enable; 31254baba33SEmil Renner Berthing }; 31354baba33SEmil Renner Berthing }; 31454baba33SEmil Renner Berthing 31554baba33SEmil Renner Berthing i2c5_pins: i2c5-0 { 31654baba33SEmil Renner Berthing i2c-pins { 31754baba33SEmil Renner Berthing pinmux = <GPIOMUX(19, GPOUT_LOW, 31854baba33SEmil Renner Berthing GPOEN_SYS_I2C5_CLK, 31954baba33SEmil Renner Berthing GPI_SYS_I2C5_CLK)>, 32054baba33SEmil Renner Berthing <GPIOMUX(20, GPOUT_LOW, 32154baba33SEmil Renner Berthing GPOEN_SYS_I2C5_DATA, 32254baba33SEmil Renner Berthing GPI_SYS_I2C5_DATA)>; 32354baba33SEmil Renner Berthing bias-disable; /* external pull-up */ 32454baba33SEmil Renner Berthing input-enable; 32554baba33SEmil Renner Berthing input-schmitt-enable; 32654baba33SEmil Renner Berthing }; 32754baba33SEmil Renner Berthing }; 32854baba33SEmil Renner Berthing 32954baba33SEmil Renner Berthing i2c6_pins: i2c6-0 { 33054baba33SEmil Renner Berthing i2c-pins { 33154baba33SEmil Renner Berthing pinmux = <GPIOMUX(16, GPOUT_LOW, 33254baba33SEmil Renner Berthing GPOEN_SYS_I2C6_CLK, 33354baba33SEmil Renner Berthing GPI_SYS_I2C6_CLK)>, 33454baba33SEmil Renner Berthing <GPIOMUX(17, GPOUT_LOW, 33554baba33SEmil Renner Berthing GPOEN_SYS_I2C6_DATA, 33654baba33SEmil Renner Berthing GPI_SYS_I2C6_DATA)>; 33754baba33SEmil Renner Berthing bias-disable; /* external pull-up */ 33854baba33SEmil Renner Berthing input-enable; 33954baba33SEmil Renner Berthing input-schmitt-enable; 34054baba33SEmil Renner Berthing }; 34154baba33SEmil Renner Berthing }; 34254baba33SEmil Renner Berthing 343b127dbf9SWilliam Qiu mmc0_pins: mmc0-0 { 344b127dbf9SWilliam Qiu rst-pins { 345b127dbf9SWilliam Qiu pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, 346b127dbf9SWilliam Qiu GPOEN_ENABLE, 347b127dbf9SWilliam Qiu GPI_NONE)>; 348b127dbf9SWilliam Qiu bias-pull-up; 349b127dbf9SWilliam Qiu drive-strength = <12>; 350b127dbf9SWilliam Qiu input-disable; 351b127dbf9SWilliam Qiu input-schmitt-disable; 352b127dbf9SWilliam Qiu slew-rate = <0>; 353b127dbf9SWilliam Qiu }; 354b127dbf9SWilliam Qiu 355b127dbf9SWilliam Qiu mmc-pins { 356b127dbf9SWilliam Qiu pinmux = <PINMUX(64, 0)>, 357b127dbf9SWilliam Qiu <PINMUX(65, 0)>, 358b127dbf9SWilliam Qiu <PINMUX(66, 0)>, 359b127dbf9SWilliam Qiu <PINMUX(67, 0)>, 360b127dbf9SWilliam Qiu <PINMUX(68, 0)>, 361b127dbf9SWilliam Qiu <PINMUX(69, 0)>, 362b127dbf9SWilliam Qiu <PINMUX(70, 0)>, 363b127dbf9SWilliam Qiu <PINMUX(71, 0)>, 364b127dbf9SWilliam Qiu <PINMUX(72, 0)>, 365b127dbf9SWilliam Qiu <PINMUX(73, 0)>; 366b127dbf9SWilliam Qiu bias-pull-up; 367b127dbf9SWilliam Qiu drive-strength = <12>; 368b127dbf9SWilliam Qiu input-enable; 369b127dbf9SWilliam Qiu }; 370b127dbf9SWilliam Qiu }; 371b127dbf9SWilliam Qiu 372b127dbf9SWilliam Qiu mmc1_pins: mmc1-0 { 373b127dbf9SWilliam Qiu clk-pins { 374b127dbf9SWilliam Qiu pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK, 375b127dbf9SWilliam Qiu GPOEN_ENABLE, 376b127dbf9SWilliam Qiu GPI_NONE)>; 377b127dbf9SWilliam Qiu bias-pull-up; 378b127dbf9SWilliam Qiu drive-strength = <12>; 379b127dbf9SWilliam Qiu input-disable; 380b127dbf9SWilliam Qiu input-schmitt-disable; 381b127dbf9SWilliam Qiu slew-rate = <0>; 382b127dbf9SWilliam Qiu }; 383b127dbf9SWilliam Qiu 384b127dbf9SWilliam Qiu mmc-pins { 385b127dbf9SWilliam Qiu pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD, 386b127dbf9SWilliam Qiu GPOEN_SYS_SDIO1_CMD, 387b127dbf9SWilliam Qiu GPI_SYS_SDIO1_CMD)>, 388b127dbf9SWilliam Qiu <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0, 389b127dbf9SWilliam Qiu GPOEN_SYS_SDIO1_DATA0, 390b127dbf9SWilliam Qiu GPI_SYS_SDIO1_DATA0)>, 391b127dbf9SWilliam Qiu <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1, 392b127dbf9SWilliam Qiu GPOEN_SYS_SDIO1_DATA1, 393b127dbf9SWilliam Qiu GPI_SYS_SDIO1_DATA1)>, 394b127dbf9SWilliam Qiu <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2, 395b127dbf9SWilliam Qiu GPOEN_SYS_SDIO1_DATA2, 396b127dbf9SWilliam Qiu GPI_SYS_SDIO1_DATA2)>, 397b127dbf9SWilliam Qiu <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3, 398b127dbf9SWilliam Qiu GPOEN_SYS_SDIO1_DATA3, 399b127dbf9SWilliam Qiu GPI_SYS_SDIO1_DATA3)>; 400b127dbf9SWilliam Qiu bias-pull-up; 401b127dbf9SWilliam Qiu drive-strength = <12>; 402b127dbf9SWilliam Qiu input-enable; 403b127dbf9SWilliam Qiu input-schmitt-enable; 404b127dbf9SWilliam Qiu slew-rate = <0>; 405b127dbf9SWilliam Qiu }; 406b127dbf9SWilliam Qiu }; 407b127dbf9SWilliam Qiu 40874fb20c8SWilliam Qiu spi0_pins: spi0-0 { 40974fb20c8SWilliam Qiu mosi-pins { 41074fb20c8SWilliam Qiu pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD, 41174fb20c8SWilliam Qiu GPOEN_ENABLE, 41274fb20c8SWilliam Qiu GPI_NONE)>; 41374fb20c8SWilliam Qiu bias-disable; 41474fb20c8SWilliam Qiu input-disable; 41574fb20c8SWilliam Qiu input-schmitt-disable; 41674fb20c8SWilliam Qiu }; 41774fb20c8SWilliam Qiu 41874fb20c8SWilliam Qiu miso-pins { 41974fb20c8SWilliam Qiu pinmux = <GPIOMUX(53, GPOUT_LOW, 42074fb20c8SWilliam Qiu GPOEN_DISABLE, 42174fb20c8SWilliam Qiu GPI_SYS_SPI0_RXD)>; 42274fb20c8SWilliam Qiu bias-pull-up; 42374fb20c8SWilliam Qiu input-enable; 42474fb20c8SWilliam Qiu input-schmitt-enable; 42574fb20c8SWilliam Qiu }; 42674fb20c8SWilliam Qiu 42774fb20c8SWilliam Qiu sck-pins { 42874fb20c8SWilliam Qiu pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK, 42974fb20c8SWilliam Qiu GPOEN_ENABLE, 43074fb20c8SWilliam Qiu GPI_SYS_SPI0_CLK)>; 43174fb20c8SWilliam Qiu bias-disable; 43274fb20c8SWilliam Qiu input-disable; 43374fb20c8SWilliam Qiu input-schmitt-disable; 43474fb20c8SWilliam Qiu }; 43574fb20c8SWilliam Qiu 43674fb20c8SWilliam Qiu ss-pins { 437cf98fe6bSNam Cao pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS, 43874fb20c8SWilliam Qiu GPOEN_ENABLE, 43974fb20c8SWilliam Qiu GPI_SYS_SPI0_FSS)>; 44074fb20c8SWilliam Qiu bias-disable; 44174fb20c8SWilliam Qiu input-disable; 44274fb20c8SWilliam Qiu input-schmitt-disable; 44374fb20c8SWilliam Qiu }; 44474fb20c8SWilliam Qiu }; 44574fb20c8SWilliam Qiu 44615582095SHal Feng uart0_pins: uart0-0 { 44715582095SHal Feng tx-pins { 44815582095SHal Feng pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, 44915582095SHal Feng GPOEN_ENABLE, 45015582095SHal Feng GPI_NONE)>; 45115582095SHal Feng bias-disable; 45215582095SHal Feng drive-strength = <12>; 45315582095SHal Feng input-disable; 45415582095SHal Feng input-schmitt-disable; 45515582095SHal Feng slew-rate = <0>; 45615582095SHal Feng }; 45715582095SHal Feng 45815582095SHal Feng rx-pins { 45915582095SHal Feng pinmux = <GPIOMUX(6, GPOUT_LOW, 46015582095SHal Feng GPOEN_DISABLE, 46115582095SHal Feng GPI_SYS_UART0_RX)>; 46215582095SHal Feng bias-disable; /* external pull-up */ 46315582095SHal Feng drive-strength = <2>; 46415582095SHal Feng input-enable; 46515582095SHal Feng input-schmitt-enable; 46615582095SHal Feng slew-rate = <0>; 46715582095SHal Feng }; 46815582095SHal Feng }; 469e7c304c0SWalker Chen}; 470e7c304c0SWalker Chen 47154baba33SEmil Renner Berthing&uart0 { 47254baba33SEmil Renner Berthing pinctrl-names = "default"; 47354baba33SEmil Renner Berthing pinctrl-0 = <&uart0_pins>; 47454baba33SEmil Renner Berthing status = "okay"; 47554baba33SEmil Renner Berthing}; 476e2c510d6SMason Huo 477e126aa3aSMinda Chen&usb0 { 478e126aa3aSMinda Chen dr_mode = "peripheral"; 4792f9f488eSHal Feng status = "okay"; 480e126aa3aSMinda Chen}; 481e126aa3aSMinda Chen 482e2c510d6SMason Huo&U74_1 { 483e2c510d6SMason Huo cpu-supply = <&vdd_cpu>; 484e2c510d6SMason Huo}; 485e2c510d6SMason Huo 486e2c510d6SMason Huo&U74_2 { 487e2c510d6SMason Huo cpu-supply = <&vdd_cpu>; 488e2c510d6SMason Huo}; 489e2c510d6SMason Huo 490e2c510d6SMason Huo&U74_3 { 491e2c510d6SMason Huo cpu-supply = <&vdd_cpu>; 492e2c510d6SMason Huo}; 493e2c510d6SMason Huo 494e2c510d6SMason Huo&U74_4 { 495e2c510d6SMason Huo cpu-supply = <&vdd_cpu>; 496e2c510d6SMason Huo}; 497