1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare PCIe interface 8 9maintainers: 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 12 13description: | 14 Synopsys DesignWare PCIe host controller 15 16allOf: 17 - $ref: /schemas/pci/pci-bus.yaml# 18 19properties: 20 compatible: 21 anyOf: 22 - {} 23 - const: snps,dw-pcie 24 25 reg: 26 description: | 27 It should contain Data Bus Interface (dbi) and config registers for all 28 versions. 29 For designware core version >= 4.80, it may contain ATU address space. 30 minItems: 2 31 maxItems: 5 32 33 reg-names: 34 minItems: 2 35 maxItems: 5 36 items: 37 enum: [dbi, dbi2, config, atu, app, elbi, mgmt, ctrl, parf, cfg, link] 38 39 num-lanes: 40 description: | 41 number of lanes to use (this property should be specified unless 42 the link is brought already up in firmware) 43 maximum: 16 44 45 reset-gpio: 46 description: GPIO pin number of PERST# signal 47 maxItems: 1 48 deprecated: true 49 50 reset-gpios: 51 description: GPIO controlled connection to PERST# signal 52 maxItems: 1 53 54 interrupts: true 55 56 interrupt-names: true 57 58 clocks: true 59 60 snps,enable-cdm-check: 61 type: boolean 62 description: | 63 This is a boolean property and if present enables 64 automatic checking of CDM (Configuration Dependent Module) registers 65 for data corruption. CDM registers include standard PCIe configuration 66 space registers, Port Logic registers, DMA and iATU (internal Address 67 Translation Unit) registers. 68 69 num-viewport: 70 description: | 71 number of view ports configured in hardware. If a platform 72 does not specify it, the driver autodetects it. 73 deprecated: true 74 75unevaluatedProperties: false 76 77required: 78 - reg 79 - reg-names 80 - compatible 81 82examples: 83 - | 84 bus { 85 #address-cells = <1>; 86 #size-cells = <1>; 87 pcie@dfc00000 { 88 device_type = "pci"; 89 compatible = "snps,dw-pcie"; 90 reg = <0xdfc00000 0x0001000>, /* IP registers */ 91 <0xd0000000 0x0002000>; /* Configuration space */ 92 reg-names = "dbi", "config"; 93 #address-cells = <3>; 94 #size-cells = <2>; 95 ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000>, 96 <0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>; 97 interrupts = <25>, <24>; 98 #interrupt-cells = <1>; 99 num-lanes = <1>; 100 }; 101 }; 102