| /openbmc/u-boot/include/configs/ |
| H A D | omap5_uevm.h | 31 #define CONFIG_SYS_NS16550_COM3 UART3_BASE
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| H A D | kc1.h | 94 #define CONFIG_SYS_NS16550_COM3 UART3_BASE
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| H A D | pdu001.h | 75 #define CONFIG_SYS_NS16550_COM4 UART3_BASE
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| H A D | cl-som-am57x.h | 14 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
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| H A D | am57xx_evm.h | 30 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
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| H A D | imx6dl-mamoj.h | 50 #define CONFIG_MXC_UART_BASE UART3_BASE
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| H A D | ti_omap4_common.h | 51 #define CONFIG_SYS_NS16550_COM3 UART3_BASE
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| H A D | flea3.h | 53 #define CONFIG_MXC_UART_BASE UART3_BASE
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| H A D | dra7xx_evm.h | 37 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
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| H A D | ge_bx50v3.h | 19 #define CONFIG_MXC_UART_BASE UART3_BASE
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| /openbmc/u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| H A D | cpu.h | 36 #define UART3_BASE 0x40080000 /* UART 3 registers base */ macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-am33xx/ |
| H A D | hardware_am33xx.h | 19 #define UART3_BASE 0x481A6000 macro
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| H A D | hardware.h | 62 # define DEFAULT_UART_BASE UART3_BASE
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| /openbmc/u-boot/arch/arm/include/asm/arch-omap4/ |
| H A D | omap.h | 50 #define UART3_BASE (OMAP44XX_L4_PER_BASE + 0x20000) macro
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| /openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/ |
| H A D | jz4780.h | 27 #define UART3_BASE 0xb0033000 macro
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/ |
| H A D | devices.c | 47 { .base = UART3_BASE, .reg_shift = 2,
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| /openbmc/u-boot/arch/arm/include/asm/arch-omap5/ |
| H A D | omap.h | 74 #define UART3_BASE (OMAP54XX_L4_PER_BASE + 0x20000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx35/ |
| H A D | imx-regs.h | 42 #define UART3_BASE 0x5000C000 macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-ep93xx/ |
| H A D | ep93xx.h | 558 #define UART3_BASE (EP93XX_APB_BASE | UART3_OFFSET) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx27/ |
| H A D | imx-regs.h | 184 #define UART3_BASE (0x0c000 + IMX_IO_BASE) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx25/ |
| H A D | imx-regs.h | 318 #define UART3_BASE (0x5000C000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 45 #define UART3_BASE (SPBA0_BASE_ADDR + 0x0000C000) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | imx-regs.h | 46 #define UART3_BASE (AIPS0_BASE_ADDR + 0x0002A000) macro
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| /openbmc/u-boot/board/aristainetos/ |
| H A D | aristainetos-v2.c | 289 case UART3_BASE: in setup_iomux_uart()
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| /openbmc/u-boot/board/toradex/colibri_imx6/ |
| H A D | colibri_imx6.c | 268 setbits_le32((u32 *)(UART3_BASE + UFCR), UFCR_DCEDTE); in setup_dtemode_uart()
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