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Searched refs:HCLK_HOST0 (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Drk3228-cru.h140 #define HCLK_HOST0 471 macro
H A Drv1108-cru.h158 #define HCLK_HOST0 339 macro
H A Drk3368-cru.h158 #define HCLK_HOST0 450 macro
H A Drk3328-cru.h195 #define HCLK_HOST0 334 macro
H A Drk3399-cru.h296 #define HCLK_HOST0 456 macro
H A Drockchip,rk3588-cru.h413 #define HCLK_HOST0 398 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3368-cru.h158 #define HCLK_HOST0 450 macro
H A Drv1108-cru.h161 #define HCLK_HOST0 339 macro
H A Drk3328-cru.h193 #define HCLK_HOST0 434 macro
H A Drk3399-cru.h294 #define HCLK_HOST0 456 macro
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1108.dtsi504 clocks = <&cru HCLK_HOST0>, <&u2phy>;
514 clocks = <&cru HCLK_HOST0>, <&u2phy>;
H A Drk322x.dtsi817 clocks = <&cru HCLK_HOST0>, <&u2phy0>;
827 clocks = <&cru HCLK_HOST0>, <&u2phy0>;
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3228.c563 GATE(HCLK_HOST0, "hclk_host0", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 6, GFLAGS),
H A Dclk-rk3328.c735 GATE(HCLK_HOST0, "hclk_host0", "hclk_peri", 0, RK3328_CLKGATE_CON(19), 6, GFLAGS),
H A Dclk-rv1108.c739 GATE(HCLK_HOST0, "hclk_host0", "hclk_periph", 0, RV1108_CLKGATE_CON(15), 6, GFLAGS),
H A Dclk-rk3368.c782 GATE(HCLK_HOST0, "hclk_host0", "hclk_peri", 0, RK3368_CLKGATE_CON(20), 3, GFLAGS),
H A Dclk-rk3399.c861 GATE(HCLK_HOST0, "hclk_host0", "hclk_perihp", 0,
H A Dclk-rk3588.c2375 GATE(HCLK_HOST0, "hclk_host0", "hclk_usb", 0,
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588s.dtsi406 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
417 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
895 <&cru HCLK_HOST0>,
H A Drk3328.dtsi991 clocks = <&cru HCLK_HOST0>, <&u2phy>;
1001 clocks = <&cru HCLK_HOST0>, <&u2phy>;
H A Drk3368.dtsi499 clocks = <&cru HCLK_HOST0>;
H A Drk3399.dtsi372 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
383 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3399.c1064 case HCLK_HOST0: in rk3399_clk_enable()
/openbmc/u-boot/arch/arm/dts/
H A Drk3368.dtsi545 clocks = <&cru HCLK_HOST0>;
H A Drk3399.dtsi300 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
314 clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,