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Searched refs:xsr (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/arch/xtensa/kernel/
H A Dvectors.S74 xsr a3, excsave1 # save a3 and get dispatch table
82 xsr a3, excsave1 # restore a3 and dispatch table
101 xsr a3, excsave1 # save a3, and get dispatch table
109 xsr a3, excsave1 # restore a3 and dispatch table
212 xsr a3, excsave1
227 xsr a0, depc # get DEPC, save a0
260 xsr a3, excsave1
269 xsr a2, depc # save a2 and get stack pointer
271 xsr a3, excsave1
275 xsr a3, excsave1
[all …]
H A Dentry.S82 xsr \flags, ps
140 xsr a2, icountlevel
293 xsr a2, icountlevel
824 xsr a3, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
825 xsr a0, depc
876 xsr a0, icount
879 xsr a3, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
886 xsr a0, SREG_DBREAKC + _index
892 xsr a0, icountlevel
896 xsr a0, icount
[all …]
H A Dhead.S275 xsr abi_arg0, excsave1
/openbmc/qemu/target/xtensa/core-fsf/
H A Dxtensa-modules.c.inc7780 { "xsr.windowbase", 20 /* xt_iclass_xsr.windowbase */,
7789 { "xsr.windowstart", 23 /* xt_iclass_xsr.windowstart */,
8077 { "xsr.lend", 79 /* xt_iclass_xsr.lend */,
8086 { "xsr.lcount", 82 /* xt_iclass_xsr.lcount */,
8095 { "xsr.lbeg", 85 /* xt_iclass_xsr.lbeg */,
8104 { "xsr.sar", 88 /* xt_iclass_xsr.sar */,
8113 { "xsr.litbase", 91 /* xt_iclass_xsr.litbase */,
8128 { "xsr.ps", 96 /* xt_iclass_xsr.ps */,
8137 { "xsr.epc1", 99 /* xt_iclass_xsr.epc1 */,
8146 { "xsr.excsave1", 102 /* xt_iclass_xsr.excsave1 */,
[all …]
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dxtensa-modules.c.inc10820 { "xsr.windowbase", 20 /* xt_iclass_xsr.windowbase */,
10829 { "xsr.windowstart", 23 /* xt_iclass_xsr.windowstart */,
11123 { "xsr.lend", 81 /* xt_iclass_xsr.lend */,
11132 { "xsr.lcount", 84 /* xt_iclass_xsr.lcount */,
11141 { "xsr.lbeg", 87 /* xt_iclass_xsr.lbeg */,
11150 { "xsr.sar", 90 /* xt_iclass_xsr.sar */,
11159 { "xsr.litbase", 93 /* xt_iclass_xsr.litbase */,
11174 { "xsr.ps", 98 /* xt_iclass_xsr.ps */,
11183 { "xsr.epc1", 101 /* xt_iclass_xsr.epc1 */,
11192 { "xsr.excsave1", 104 /* xt_iclass_xsr.excsave1 */,
[all …]
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dxtensa-modules.c.inc8685 { "xsr.windowbase", ICLASS_xt_iclass_xsr_windowbase,
8694 { "xsr.windowstart", ICLASS_xt_iclass_xsr_windowstart,
8979 { "xsr.sar", ICLASS_xt_iclass_xsr_sar,
8988 { "xsr.memctl", ICLASS_xt_iclass_xsr_memctl,
8997 { "xsr.litbase", ICLASS_xt_iclass_xsr_litbase,
9015 { "xsr.ps", ICLASS_xt_iclass_xsr_ps,
9024 { "xsr.epc1", ICLASS_xt_iclass_xsr_epc1,
9033 { "xsr.excsave1", ICLASS_xt_iclass_xsr_excsave1,
9042 { "xsr.epc2", ICLASS_xt_iclass_xsr_epc2,
9051 { "xsr.excsave2", ICLASS_xt_iclass_xsr_excsave2,
[all …]
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dxtensa-modules.c.inc11462 { "xsr.windowbase", ICLASS_xt_iclass_xsr_windowbase,
11471 { "xsr.windowstart", ICLASS_xt_iclass_xsr_windowstart,
11765 { "xsr.lend", ICLASS_xt_iclass_xsr_lend,
11774 { "xsr.lcount", ICLASS_xt_iclass_xsr_lcount,
11783 { "xsr.lbeg", ICLASS_xt_iclass_xsr_lbeg,
11792 { "xsr.sar", ICLASS_xt_iclass_xsr_sar,
11801 { "xsr.litbase", ICLASS_xt_iclass_xsr_litbase,
11819 { "xsr.ps", ICLASS_xt_iclass_xsr_ps,
11828 { "xsr.epc1", ICLASS_xt_iclass_xsr_epc1,
11837 { "xsr.excsave1", ICLASS_xt_iclass_xsr_excsave1,
[all …]
/openbmc/qemu/target/xtensa/core-de212/
H A Dxtensa-modules.c.inc10822 { "xsr.windowbase", ICLASS_xt_iclass_xsr_windowbase,
10831 { "xsr.windowstart", ICLASS_xt_iclass_xsr_windowstart,
11125 { "xsr.lend", ICLASS_xt_iclass_xsr_lend,
11134 { "xsr.lcount", ICLASS_xt_iclass_xsr_lcount,
11143 { "xsr.lbeg", ICLASS_xt_iclass_xsr_lbeg,
11152 { "xsr.sar", ICLASS_xt_iclass_xsr_sar,
11161 { "xsr.memctl", ICLASS_xt_iclass_xsr_memctl,
11170 { "xsr.litbase", ICLASS_xt_iclass_xsr_litbase,
11188 { "xsr.ps", ICLASS_xt_iclass_xsr_ps,
11197 { "xsr.epc1", ICLASS_xt_iclass_xsr_epc1,
[all …]
/openbmc/linux/drivers/mailbox/
H A Dimx-mailbox.c262 u32 xsr; in imx_mu_specific_tx() local
295 xsr, in imx_mu_specific_tx()
296 xsr & IMX_MU_xSR_TEn(priv->dcfg->type, i % num_tr), in imx_mu_specific_tx()
319 u32 xsr; in imx_mu_specific_rx() local
341 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_RSR], xsr, in imx_mu_specific_rx()
342 xsr & IMX_MU_xSR_RFn(priv->dcfg->type, i % 4), 0, in imx_mu_specific_rx()
/openbmc/qemu/target/xtensa/core-lx106/
H A Dxtensa-modules.c.inc6115 { "xsr.sar", ICLASS_xt_iclass_xsr_sar,
6124 { "xsr.litbase", ICLASS_xt_iclass_xsr_litbase,
6142 { "xsr.ps", ICLASS_xt_iclass_xsr_ps,
6151 { "xsr.epc1", ICLASS_xt_iclass_xsr_epc1,
6160 { "xsr.excsave1", ICLASS_xt_iclass_xsr_excsave1,
6169 { "xsr.epc2", ICLASS_xt_iclass_xsr_epc2,
6178 { "xsr.excsave2", ICLASS_xt_iclass_xsr_excsave2,
6187 { "xsr.epc3", ICLASS_xt_iclass_xsr_epc3,
6196 { "xsr.excsave3", ICLASS_xt_iclass_xsr_excsave3,
6205 { "xsr.eps2", ICLASS_xt_iclass_xsr_eps2,
[all …]
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dxtensa-modules.c.inc16078 { "xsr.windowbase", ICLASS_xt_iclass_xsr_windowbase,
16087 { "xsr.windowstart", ICLASS_xt_iclass_xsr_windowstart,
16387 { "xsr.lend", ICLASS_xt_iclass_xsr_lend,
16396 { "xsr.lcount", ICLASS_xt_iclass_xsr_lcount,
16405 { "xsr.lbeg", ICLASS_xt_iclass_xsr_lbeg,
16414 { "xsr.sar", ICLASS_xt_iclass_xsr_sar,
16423 { "xsr.memctl", ICLASS_xt_iclass_xsr_memctl,
16441 { "xsr.ps", ICLASS_xt_iclass_xsr_ps,
16450 { "xsr.epc1", ICLASS_xt_iclass_xsr_epc1,
16459 { "xsr.excsave1", ICLASS_xt_iclass_xsr_excsave1,
[all …]
/openbmc/u-boot/arch/xtensa/cpu/
H A Dstart.S431 xsr a2, LCOUNT
449 xsr a3, PS
/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_sr.S49 test_sr_op \sym, \mask & 4, xsr, HI_XSR, \sr
/openbmc/linux/drivers/dma/
H A Dimx-dma.c114 u16 xsr; member
504 ((imxdma->slots_2d[i].xsr != d->x) || in imxdma_xfer_desc()
514 imxdma->slots_2d[slot].xsr = d->x; in imxdma_xfer_desc()
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dxtensa-modules.c.inc32957 { "xsr.windowbase", ICLASS_xt_iclass_xsr_windowbase,
32966 { "xsr.windowstart", ICLASS_xt_iclass_xsr_windowstart,
33266 { "xsr.lend", ICLASS_xt_iclass_xsr_lend,
33275 { "xsr.lcount", ICLASS_xt_iclass_xsr_lcount,
33284 { "xsr.lbeg", ICLASS_xt_iclass_xsr_lbeg,
33293 { "xsr.sar", ICLASS_xt_iclass_xsr_sar,
33302 { "xsr.memctl", ICLASS_xt_iclass_xsr_memctl,
33311 { "xsr.litbase", ICLASS_xt_iclass_xsr_litbase,
33332 { "xsr.ps", ICLASS_xt_iclass_xsr_ps,
33341 { "xsr.epc1", ICLASS_xt_iclass_xsr_epc1,
[all …]
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dxtensa-modules.c.inc26831 { "xsr.windowbase", ICLASS_xt_iclass_xsr_windowbase,
26840 { "xsr.windowstart", ICLASS_xt_iclass_xsr_windowstart,
27137 { "xsr.lend", ICLASS_xt_iclass_xsr_lend,
27146 { "xsr.lcount", ICLASS_xt_iclass_xsr_lcount,
27155 { "xsr.lbeg", ICLASS_xt_iclass_xsr_lbeg,
27164 { "xsr.sar", ICLASS_xt_iclass_xsr_sar,
27173 { "xsr.litbase", ICLASS_xt_iclass_xsr_litbase,
27191 { "xsr.ps", ICLASS_xt_iclass_xsr_ps,
27200 { "xsr.epc1", ICLASS_xt_iclass_xsr_epc1,
27209 { "xsr.excsave1", ICLASS_xt_iclass_xsr_excsave1,
[all …]
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dxtensa-modules.c.inc75377 { "xsr.windowbase", ICLASS_xt_iclass_xsr_windowbase,
75386 { "xsr.windowstart", ICLASS_xt_iclass_xsr_windowstart,
75680 { "xsr.lend", ICLASS_xt_iclass_xsr_lend,
75689 { "xsr.lcount", ICLASS_xt_iclass_xsr_lcount,
75698 { "xsr.lbeg", ICLASS_xt_iclass_xsr_lbeg,
75707 { "xsr.sar", ICLASS_xt_iclass_xsr_sar,
75716 { "xsr.litbase", ICLASS_xt_iclass_xsr_litbase,
75734 { "xsr.ps", ICLASS_xt_iclass_xsr_ps,
75743 { "xsr.epc1", ICLASS_xt_iclass_xsr_epc1,
75752 { "xsr.excsave1", ICLASS_xt_iclass_xsr_excsave1,
[all …]