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Searched refs:wm (Results 1 – 25 of 125) sorted by relevance

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/openbmc/linux/drivers/input/touchscreen/
H A Dwm97xx-core.c84 int wm97xx_reg_read(struct wm97xx *wm, u16 reg) in wm97xx_reg_read() argument
86 if (wm->ac97) in wm97xx_reg_read()
87 return wm->ac97->bus->ops->read(wm->ac97, reg); in wm97xx_reg_read()
93 void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val) in wm97xx_reg_write() argument
97 wm->dig[(reg - AC97_WM9713_DIG1) >> 1] = val; in wm97xx_reg_write()
101 wm->gpio[(reg - AC97_GPIO_CFG) >> 1] = val; in wm97xx_reg_write()
105 wm->misc = val; in wm97xx_reg_write()
107 if (wm->ac97) in wm97xx_reg_write()
108 wm->ac97->bus->ops->write(wm->ac97, reg, val); in wm97xx_reg_write()
120 int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel) in wm97xx_read_aux_adc() argument
[all …]
H A Dwm9713.c151 static void wm9713_phy_init(struct wm97xx *wm) in wm9713_phy_init() argument
163 dev_info(wm->dev, "setting pen detect pull-up to %d Ohms\n", in wm9713_phy_init()
170 dev_info(wm->dev, "setting 5-wire touchscreen mode."); in wm9713_phy_init()
173 dev_warn(wm->dev, in wm9713_phy_init()
183 dev_info(wm->dev, in wm9713_phy_init()
186 dev_info(wm->dev, in wm9713_phy_init()
193 dev_info(wm->dev, "supplied delay out of range."); in wm9713_phy_init()
195 dev_info(wm->dev, "setting adc sample delay to %d u Secs.", in wm9713_phy_init()
206 wm->misc = wm97xx_reg_read(wm, 0x5a); in wm9713_phy_init()
208 wm97xx_reg_write(wm, AC97_WM9713_DIG1, dig1); in wm9713_phy_init()
[all …]
H A Dwm9712.c151 static void wm9712_phy_init(struct wm97xx *wm) in wm9712_phy_init() argument
160 dev_dbg(wm->dev, "setting pen detect pull-up to %d Ohms\n", in wm9712_phy_init()
167 dev_dbg(wm->dev, "setting 5-wire touchscreen mode.\n"); in wm9712_phy_init()
170 dev_warn(wm->dev, "pressure measurement is not " in wm9712_phy_init()
179 dev_dbg(wm->dev, in wm9712_phy_init()
182 dev_dbg(wm->dev, in wm9712_phy_init()
189 dev_dbg(wm->dev, "supplied delay out of range.\n"); in wm9712_phy_init()
194 dev_dbg(wm->dev, "setting adc sample delay to %d u Secs.\n", in wm9712_phy_init()
202 reg = wm97xx_reg_read(wm, AC97_MISC_AFE); in wm9712_phy_init()
203 wm97xx_reg_write(wm, AC97_MISC_AFE, reg | WM97XX_GPIO_4); in wm9712_phy_init()
[all …]
H A Dwm9705.c133 static void wm9705_phy_init(struct wm97xx *wm) in wm9705_phy_init() argument
141 wm97xx_reg_write(wm, AC97_AUX, 0x8000); in wm9705_phy_init()
142 wm97xx_reg_write(wm, AC97_VIDEO, 0x8000); in wm9705_phy_init()
147 dev_dbg(wm->dev, in wm9705_phy_init()
150 dev_dbg(wm->dev, in wm9705_phy_init()
158 dev_dbg(wm->dev, "supplied delay out of range."); in wm9705_phy_init()
164 dev_dbg(wm->dev, "setting adc sample delay to %d u Secs.", in wm9705_phy_init()
169 dev_dbg(wm->dev, "setting pdd to Vmid/%d", 1 - (pdd & 0x000f)); in wm9705_phy_init()
174 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, dig1); in wm9705_phy_init()
175 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2); in wm9705_phy_init()
[all …]
H A Dmainstone-wm97xx.c100 static void wm97xx_acc_pen_up(struct wm97xx *wm) in wm97xx_acc_pen_up() argument
115 static int wm97xx_acc_pen_down(struct wm97xx *wm) in wm97xx_acc_pen_down() argument
146 dev_dbg(wm->dev, "Raw coordinates: x=%x, y=%x, p=%x\n", in wm97xx_acc_pen_down()
157 input_report_abs(wm->input_dev, ABS_X, x & 0xfff); in wm97xx_acc_pen_down()
158 input_report_abs(wm->input_dev, ABS_Y, y & 0xfff); in wm97xx_acc_pen_down()
159 input_report_abs(wm->input_dev, ABS_PRESSURE, p & 0xfff); in wm97xx_acc_pen_down()
160 input_report_key(wm->input_dev, BTN_TOUCH, (p != 0)); in wm97xx_acc_pen_down()
161 input_sync(wm->input_dev); in wm97xx_acc_pen_down()
168 static int wm97xx_acc_startup(struct wm97xx *wm) in wm97xx_acc_startup() argument
173 if (wm->ac97 == NULL) in wm97xx_acc_startup()
[all …]
/openbmc/linux/sound/pci/ice1712/
H A Dwm8766.c18 static void snd_wm8766_write(struct snd_wm8766 *wm, u16 addr, u16 data) in snd_wm8766_write() argument
21 wm->regs[addr] = data; in snd_wm8766_write()
22 wm->ops.write(wm, addr, data); in snd_wm8766_write()
137 void snd_wm8766_init(struct snd_wm8766 *wm) in snd_wm8766_init() argument
147 memcpy(wm->ctl, snd_wm8766_default_ctl, sizeof(wm->ctl)); in snd_wm8766_init()
149 snd_wm8766_write(wm, WM8766_REG_RESET, 0x00); /* reset */ in snd_wm8766_init()
153 snd_wm8766_write(wm, i, default_values[i]); in snd_wm8766_init()
156 void snd_wm8766_resume(struct snd_wm8766 *wm) in snd_wm8766_resume() argument
161 snd_wm8766_write(wm, i, wm->regs[i]); in snd_wm8766_resume()
164 void snd_wm8766_set_if(struct snd_wm8766 *wm, u16 dac) in snd_wm8766_set_if() argument
[all …]
H A Dwm8776.c18 static void snd_wm8776_write(struct snd_wm8776 *wm, u16 addr, u16 data) in snd_wm8776_write() argument
24 wm->regs[addr] = data; in snd_wm8776_write()
25 wm->ops.write(wm, bus_addr, bus_data); in snd_wm8776_write()
30 static void snd_wm8776_activate_ctl(struct snd_wm8776 *wm, in snd_wm8776_activate_ctl() argument
34 struct snd_card *card = wm->card; in snd_wm8776_activate_ctl()
51 static void snd_wm8776_update_agc_ctl(struct snd_wm8776 *wm) in snd_wm8776_update_agc_ctl() argument
55 switch (wm->agc_mode) { in snd_wm8776_update_agc_ctl()
72 if (wm->ctl[i].flags & flags_off) in snd_wm8776_update_agc_ctl()
73 snd_wm8776_activate_ctl(wm, wm->ctl[i].name, false); in snd_wm8776_update_agc_ctl()
74 else if (wm->ctl[i].flags & flags_on) in snd_wm8776_update_agc_ctl()
[all …]
H A Dmaya44.c70 struct snd_wm8776 wm[2]; member
76 static void wm8776_write(struct snd_ice1712 *ice, struct snd_wm8776 *wm, in wm8776_write() argument
83 snd_vt1724_write_i2c(ice, wm->addr, in wm8776_write()
86 wm->regs[reg] = val; in wm8776_write()
92 static int wm8776_write_bits(struct snd_ice1712 *ice, struct snd_wm8776 *wm, in wm8776_write_bits() argument
96 val |= wm->regs[reg] & ~mask; in wm8776_write_bits()
97 if (val != wm->regs[reg]) { in wm8776_write_bits()
98 wm8776_write(ice, wm, reg, val); in wm8776_write_bits()
174 struct snd_wm8776 *wm = in maya_vol_get() local
175 &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)]; in maya_vol_get()
[all …]
H A Dwm8766.h88 void (*write)(struct snd_wm8766 *wm, u16 addr, u16 data);
125 void (*set)(struct snd_wm8766 *wm, u16 ch1, u16 ch2);
126 void (*get)(struct snd_wm8766 *wm, u16 *ch1, u16 *ch2);
141 void snd_wm8766_init(struct snd_wm8766 *wm);
142 void snd_wm8766_resume(struct snd_wm8766 *wm);
143 void snd_wm8766_set_if(struct snd_wm8766 *wm, u16 dac);
144 void snd_wm8766_volume_restore(struct snd_wm8766 *wm);
145 int snd_wm8766_build_controls(struct snd_wm8766 *wm);
H A Dwm8776.h127 void (*write)(struct snd_wm8776 *wm, u8 addr, u8 data);
181 void (*set)(struct snd_wm8776 *wm, u16 ch1, u16 ch2);
182 void (*get)(struct snd_wm8776 *wm, u16 *ch1, u16 *ch2);
203 void snd_wm8776_init(struct snd_wm8776 *wm);
204 void snd_wm8776_resume(struct snd_wm8776 *wm);
205 void snd_wm8776_set_power(struct snd_wm8776 *wm, u16 power);
206 void snd_wm8776_volume_restore(struct snd_wm8776 *wm);
207 int snd_wm8776_build_controls(struct snd_wm8776 *wm);
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c232 mutex_lock(&dev_priv->display.wm.wm_mutex); in intel_set_memory_cxsr()
235 dev_priv->display.wm.vlv.cxsr = enable; in intel_set_memory_cxsr()
237 dev_priv->display.wm.g4x.cxsr = enable; in intel_set_memory_cxsr()
238 mutex_unlock(&dev_priv->display.wm.wm_mutex); in intel_set_memory_cxsr()
266 struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; in vlv_get_fifo_size()
546 const struct intel_watermark_params *wm, in intel_calculate_wm() argument
560 entries = DIV_ROUND_UP(entries, wm->cacheline_size) + in intel_calculate_wm()
561 wm->guard_size; in intel_calculate_wm()
568 if (wm_size > wm->max_wm) in intel_calculate_wm()
569 wm_size = wm->max_wm; in intel_calculate_wm()
[all …]
H A Dintel_wm.c47 if (i915->display.funcs.wm->update_wm) in intel_update_watermarks()
48 i915->display.funcs.wm->update_wm(i915); in intel_update_watermarks()
56 if (i915->display.funcs.wm->compute_pipe_wm) in intel_compute_pipe_wm()
57 return i915->display.funcs.wm->compute_pipe_wm(state, crtc); in intel_compute_pipe_wm()
67 if (!i915->display.funcs.wm->compute_intermediate_wm) in intel_compute_intermediate_wm()
70 if (drm_WARN_ON(&i915->drm, !i915->display.funcs.wm->compute_pipe_wm)) in intel_compute_intermediate_wm()
73 return i915->display.funcs.wm->compute_intermediate_wm(state, crtc); in intel_compute_intermediate_wm()
81 if (i915->display.funcs.wm->initial_watermarks) { in intel_initial_watermarks()
82 i915->display.funcs.wm->initial_watermarks(state, crtc); in intel_initial_watermarks()
94 if (i915->display.funcs.wm->atomic_update_watermarks) in intel_atomic_update_watermarks()
[all …]
H A Dskl_watermark.c355 const struct skl_plane_wm *wm = in skl_crtc_can_enable_sagv() local
356 &crtc_state->wm.skl.optimal.planes[plane_id]; in skl_crtc_can_enable_sagv()
360 if (!wm->wm[0].enable) in skl_crtc_can_enable_sagv()
364 for (level = i915->display.wm.num_levels - 1; in skl_crtc_can_enable_sagv()
365 !wm->wm[level].enable; --level) in skl_crtc_can_enable_sagv()
377 const struct skl_plane_wm *wm = in skl_crtc_can_enable_sagv() local
378 &crtc_state->wm.skl.optimal.planes[plane_id]; in skl_crtc_can_enable_sagv()
384 if (wm->wm[0].enable && !wm->wm[max_level].can_sagv) in skl_crtc_can_enable_sagv()
400 const struct skl_plane_wm *wm = in tgl_crtc_can_enable_sagv() local
401 &crtc_state->wm.skl.optimal.planes[plane_id]; in tgl_crtc_can_enable_sagv()
[all …]
/openbmc/linux/drivers/media/platform/qcom/camss/
H A Dcamss-vfe-gen1.h21 void (*bus_connect_wm_to_rdi)(struct vfe_device *vfe, u8 wm, enum vfe_line_id id);
22 void (*bus_disconnect_wm_from_rdi)(struct vfe_device *vfe, u8 wm, enum vfe_line_id id);
24 void (*bus_reload_wm)(struct vfe_device *vfe, u8 wm);
27 void (*enable_irq_wm_line)(struct vfe_device *vfe, u8 wm, enum vfe_line_id line_id,
36 void (*set_cgc_override)(struct vfe_device *vfe, u8 wm, u8 enable);
47 void (*wm_frame_based)(struct vfe_device *vfe, u8 wm, u8 enable);
48 void (*wm_line_based)(struct vfe_device *vfe, u32 wm, struct v4l2_pix_format_mplane *pix,
50 void (*wm_set_ub_cfg)(struct vfe_device *vfe, u8 wm, u16 offset, u16 depth);
51 void (*wm_set_subsample)(struct vfe_device *vfe, u8 wm);
52 void (*wm_set_framedrop_period)(struct vfe_device *vfe, u8 wm, u8 per);
[all …]
H A Dcamss-vfe-480.c117 static void vfe_wm_start(struct vfe_device *vfe, u8 wm, struct vfe_line *line) in vfe_wm_start() argument
122 wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */ in vfe_wm_start()
130 vfe->base + VFE_BUS_WM_FRAME_INCR(wm)); in vfe_wm_start()
131 writel_relaxed(0xf, vfe->base + VFE_BUS_WM_BURST_LIMIT(wm)); in vfe_wm_start()
133 vfe->base + VFE_BUS_WM_IMAGE_CFG_0(wm)); in vfe_wm_start()
135 vfe->base + VFE_BUS_WM_IMAGE_CFG_2(wm)); in vfe_wm_start()
136 writel_relaxed(0, vfe->base + VFE_BUS_WM_PACKER_CFG(wm)); in vfe_wm_start()
139 writel_relaxed(0, vfe->base + VFE_BUS_WM_FRAMEDROP_PERIOD(wm)); in vfe_wm_start()
140 writel_relaxed(1, vfe->base + VFE_BUS_WM_FRAMEDROP_PATTERN(wm)); in vfe_wm_start()
141 writel_relaxed(0, vfe->base + VFE_BUS_WM_IRQ_SUBSAMPLE_PERIOD(wm)); in vfe_wm_start()
[all …]
H A Dcamss-vfe-4-1.c270 static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_enable() argument
273 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_enable()
276 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_enable()
280 static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_frame_based() argument
283 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_frame_based()
286 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_frame_based()
303 static void vfe_wm_line_based(struct vfe_device *vfe, u32 wm, in vfe_wm_line_based() argument
320 VFE_0_BUS_IMAGE_MASTER_n_WR_IMAGE_SIZE(wm)); in vfe_wm_line_based()
329 VFE_0_BUS_IMAGE_MASTER_n_WR_BUFFER_CFG(wm)); in vfe_wm_line_based()
332 VFE_0_BUS_IMAGE_MASTER_n_WR_IMAGE_SIZE(wm)); in vfe_wm_line_based()
[all …]
H A Dcamss-vfe-4-7.c321 static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_enable() argument
324 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_enable()
327 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm), in vfe_wm_enable()
331 static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_frame_based() argument
334 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm), in vfe_wm_frame_based()
337 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm), in vfe_wm_frame_based()
396 static void vfe_wm_line_based(struct vfe_device *vfe, u32 wm, in vfe_wm_line_based() argument
413 VFE_0_BUS_IMAGE_MASTER_n_WR_IMAGE_SIZE(wm)); in vfe_wm_line_based()
422 VFE_0_BUS_IMAGE_MASTER_n_WR_BUFFER_CFG(wm)); in vfe_wm_line_based()
425 VFE_0_BUS_IMAGE_MASTER_n_WR_IMAGE_SIZE(wm)); in vfe_wm_line_based()
[all …]
H A Dcamss-vfe-4-8.c304 static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_frame_based() argument
307 vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm), in vfe_wm_frame_based()
310 vfe_reg_clr(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm), in vfe_wm_frame_based()
369 static void vfe_wm_line_based(struct vfe_device *vfe, u32 wm, in vfe_wm_line_based() argument
386 VFE_0_BUS_IMAGE_MASTER_n_WR_IMAGE_SIZE(wm)); in vfe_wm_line_based()
395 VFE_0_BUS_IMAGE_MASTER_n_WR_BUFFER_CFG(wm)); in vfe_wm_line_based()
398 VFE_0_BUS_IMAGE_MASTER_n_WR_IMAGE_SIZE(wm)); in vfe_wm_line_based()
400 VFE_0_BUS_IMAGE_MASTER_n_WR_BUFFER_CFG(wm)); in vfe_wm_line_based()
404 static void vfe_wm_set_framedrop_period(struct vfe_device *vfe, u8 wm, u8 per) in vfe_wm_set_framedrop_period() argument
409 VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm)); in vfe_wm_set_framedrop_period()
[all …]
H A Dcamss-vfe-170.c222 static void vfe_wm_start(struct vfe_device *vfe, u8 wm, struct vfe_line *line) in vfe_wm_start() argument
244 writel_relaxed(0xf, vfe->base + VFE_BUS_WM_BURST_LIMIT(wm)); in vfe_wm_start()
247 writel_relaxed(val, vfe->base + VFE_BUS_WM_BUFFER_WIDTH_CFG(wm)); in vfe_wm_start()
250 writel_relaxed(val, vfe->base + VFE_BUS_WM_BUFFER_HEIGHT_CFG(wm)); in vfe_wm_start()
253 writel_relaxed(val, vfe->base + VFE_BUS_WM_PACKER_CFG(wm)); // XXX 1 for PLAIN8? in vfe_wm_start()
257 writel_relaxed(val, vfe->base + VFE_BUS_WM_STRIDE(wm)); in vfe_wm_start()
262 writel_relaxed(val, vfe->base + VFE_BUS_WM_CFG(wm)); in vfe_wm_start()
265 static void vfe_wm_stop(struct vfe_device *vfe, u8 wm) in vfe_wm_stop() argument
268 writel_relaxed(0, vfe->base + VFE_BUS_WM_CFG(wm)); in vfe_wm_stop()
271 static void vfe_wm_update(struct vfe_device *vfe, u8 wm, u32 addr, in vfe_wm_update() argument
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-vt8500.txt7 - compatible: "via,vt8500-pinctrl", "wm,wm8505-pinctrl", "wm,wm8650-pinctrl",
8 "wm8750-pinctrl" or "wm,wm8850-pinctrl"
31 - wm,pins: An array of cells. Each cell contains the ID of a pin.
34 - wm,function: Integer, containing the function to mux to the pin(s):
39 - wm,pull: Integer, representing the pull-down/up to apply to the pin(s):
44 Each of wm,function and wm,pull may contain either a single value which
45 will be applied to all pins in wm,pins, or one value for each entry in
46 wm,pins.
51 compatible = "wm,wm8505-pinctrl";
/openbmc/linux/drivers/video/fbdev/
H A Di740fb.c220 u32 wm; in i740_calc_fifo() local
225 wm = 0x18120000; in i740_calc_fifo()
227 wm = 0x16110000; in i740_calc_fifo()
229 wm = 0x120E0000; in i740_calc_fifo()
231 wm = 0x100D0000; in i740_calc_fifo()
237 wm = 0x2C1D0000; in i740_calc_fifo()
239 wm = 0x2C180000; in i740_calc_fifo()
241 wm = 0x24160000; in i740_calc_fifo()
243 wm = 0x18120000; in i740_calc_fifo()
245 wm = 0x16110000; in i740_calc_fifo()
[all …]
/openbmc/linux/drivers/gpu/drm/radeon/
H A Drs690.c274 struct rs690_watermark *wm, in rs690_crtc_bandwidth_compute() argument
286 wm->lb_request_fifo_depth = 4; in rs690_crtc_bandwidth_compute()
306 wm->num_line_pair.full = dfixed_const(2); in rs690_crtc_bandwidth_compute()
308 wm->num_line_pair.full = dfixed_const(1); in rs690_crtc_bandwidth_compute()
313 request_fifo_depth.full = dfixed_mul(a, wm->num_line_pair); in rs690_crtc_bandwidth_compute()
316 wm->lb_request_fifo_depth = 4; in rs690_crtc_bandwidth_compute()
318 wm->lb_request_fifo_depth = dfixed_trunc(request_fifo_depth); in rs690_crtc_bandwidth_compute()
343 wm->consumption_rate.full = dfixed_div(a, consumption_time); in rs690_crtc_bandwidth_compute()
361 wm->active_time.full = dfixed_mul(line_time, b); in rs690_crtc_bandwidth_compute()
362 wm->active_time.full = dfixed_div(wm->active_time, a); in rs690_crtc_bandwidth_compute()
[all …]
/openbmc/linux/arch/arm/boot/dts/vt8500/
H A Dwm8850.dtsi11 compatible = "wm,wm8850";
60 compatible = "wm,wm8850-pinctrl";
90 compatible = "wm,wm8850-pll-clock";
97 compatible = "wm,wm8850-pll-clock";
104 compatible = "wm,wm8850-pll-clock";
111 compatible = "wm,wm8850-pll-clock";
118 compatible = "wm,wm8850-pll-clock";
125 compatible = "wm,wm8850-pll-clock";
132 compatible = "wm,wm8850-pll-clock";
219 compatible = "wm,wm8505-fb";
[all …]
H A Dwm8650.dtsi11 compatible = "wm,wm8650";
57 compatible = "wm,wm8650-pinctrl";
87 compatible = "wm,wm8650-pll-clock";
94 compatible = "wm,wm8650-pll-clock";
101 compatible = "wm,wm8650-pll-clock";
108 compatible = "wm,wm8650-pll-clock";
115 compatible = "wm,wm8650-pll-clock";
195 compatible = "wm,wm8505-sdhc";
204 compatible = "wm,wm8505-fb";
209 compatible = "wm,prizm-ge-rops";
/openbmc/linux/include/linux/
H A Dwm97xx.h311 enum wm97xx_gpio_status wm97xx_get_gpio(struct wm97xx *wm, u32 gpio);
312 void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio,
314 void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio,
320 void wm97xx_set_suspend_mode(struct wm97xx *wm, u16 mode);
323 int wm97xx_reg_read(struct wm97xx *wm, u16 reg);
324 void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val);
327 int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel);

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