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Searched refs:vsr (Results 1 – 18 of 18) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dhelper.h280 DEF_HELPER_4(LXVL, void, env, tl, vsr, tl)
281 DEF_HELPER_4(LXVLL, void, env, tl, vsr, tl)
282 DEF_HELPER_4(STXVL, void, env, tl, vsr, tl)
283 DEF_HELPER_4(STXVLL, void, env, tl, vsr, tl)
367 DEF_HELPER_4(XSADDDP, void, env, vsr, vsr, vsr)
368 DEF_HELPER_5(xsaddqp, void, env, i32, vsr, vsr, vsr)
369 DEF_HELPER_4(XSSUBDP, void, env, vsr, vsr, vsr)
370 DEF_HELPER_4(XSMULDP, void, env, vsr, vsr, vsr)
371 DEF_HELPER_5(xsmulqp, void, env, i32, vsr, vsr, vsr)
372 DEF_HELPER_4(XSDIVDP, void, env, vsr, vsr, vsr)
[all …]
H A Dkvm.c643 uint64_t vsr[2]; in kvm_put_fp() local
648 vsr[0] = float64_val(*fpr); in kvm_put_fp()
649 vsr[1] = *vsrl; in kvm_put_fp()
651 vsr[0] = *vsrl; in kvm_put_fp()
652 vsr[1] = float64_val(*fpr); in kvm_put_fp()
654 reg.addr = (uintptr_t) &vsr; in kvm_put_fp()
711 uint64_t vsr[2]; in kvm_get_fp() local
715 reg.addr = (uintptr_t) &vsr; in kvm_get_fp()
725 *fpr = vsr[0]; in kvm_get_fp()
727 *vsrl = vsr[1]; in kvm_get_fp()
[all …]
H A Darch_dump.c77 uint64_t vsr[32]; member
200 vsxregset->vsr[i] = cpu_to_dump64(s, *vsrl); in ppc_write_elf_vsxregset()
H A Dmachine.c294 VMSTATE_FPR_ARRAY(env.vsr, PowerPCCPU, 32),
335 VMSTATE_AVR_ARRAY(env.vsr, PowerPCCPU, 32),
368 VMSTATE_VSR_ARRAY(env.vsr, PowerPCCPU, 32),
H A Dcpu.h1295 ppc_vsr_t vsr[64] QEMU_ALIGNED(16); member
2936 return offsetof(CPUPPCState, vsr[i].VsrD(high ? 0 : 1)); in vsr64_offset()
2941 return offsetof(CPUPPCState, vsr[i].u64[0]); in vsr_full_offset()
/openbmc/qemu/hw/ppc/
H A Dspapr_nested.c185 memcpy(save->vsr, env->vsr, sizeof(save->vsr)); in nested_save_state()
284 memcpy(env->vsr, load->vsr, sizeof(env->vsr)); in nested_load_state()
911 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR0, vsr[0]),
912 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR1, vsr[1]),
913 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR2, vsr[2]),
914 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR3, vsr[3]),
915 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR4, vsr[4]),
916 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR5, vsr[5]),
917 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR6, vsr[6]),
918 GUEST_STATE_ELEMENT_ENV_QW(GSB_VCPU_SPR_VSR7, vsr[7]),
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm59056.dtsi67 vsr_reg: vsr {
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dbrcm,bcm59056.txt22 csr, iosr1, iosr2, msr, sdsr1, sdsr2, vsr,
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddce_calcs.c487 data->vsr[i] = bw_mul(data->vsr_after_stereo, bw_int_to_fixed(2)); in calculate_bandwidth()
490 data->vsr[i] = data->vsr_after_stereo; in calculate_bandwidth()
541 if (bw_neq(data->vsr[i], bw_int_to_fixed(1))) { in calculate_bandwidth()
542 if (bw_mtn(data->vsr[i], bw_int_to_fixed(4))) { in calculate_bandwidth()
546 if (bw_mtn(data->vsr[i], data->v_taps[i])) { in calculate_bandwidth()
805 …), data->v_taps[i]), data->vsr[i]), bw_mul(bw_mul(bw_int_to_fixed(data->interlace_mode[i]), bw_frc… in calculate_bandwidth()
818 …if ((bw_mtn(data->vsr[i], bw_int_to_fixed(1)) && surface_type[i] == bw_def_graphics) || data->pann… in calculate_bandwidth()
821 … && (bw_mtn(data->lb_partitions[i], bw_add(data->v_taps[i], bw_ceil2(data->vsr[i], bw_int_to_fixed… in calculate_bandwidth()
829 … data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_max2(bw_int_to_fixed(1), data->vsr[i]); in calculate_bandwidth()
831 else if (bw_leq(data->vsr[i], bw_int_to_fixed(1))) { in calculate_bandwidth()
[all …]
H A Dcalcs_logger.h439 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] vsr[%d]:%d", i, bw_fixed_to_int(data->vsr[i])); in print_bw_calcs_data()
/openbmc/linux/drivers/regulator/
H A Dbcm590xx-regulator.c184 BCM590XX_REG_RANGES(vsr, dcdc_iosr1_ranges),
/openbmc/qemu/target/ppc/translate/
H A Dvmx-ops.c.inc67 GEN_VXFORM(vsr, 2, 11),
H A Ddfp-impl.c.inc6 tcg_gen_addi_ptr(r, tcg_env, offsetof(CPUPPCState, vsr[reg].u64[0]));
H A Dvmx-impl.c.inc518 * vsr VRT,VRA,VRB - Vector Shift Right
643 offsetof(CPUPPCState, vsr[32 + VB].u64[0]) + i * 4);
646 offsetof(CPUPPCState, vsr[32 + VT].u64[0]) + i * 4);
1059 GEN_VXFORM_TRANS(vsr, 2, 11);
2776 /* prod1 = vsr[vra+32].dw[1] * vsr[vrb+32].dw[1] */
2781 /* prod0 = vsr[vra+32].dw[0] * vsr[vrb+32].dw[0] */
H A Dvsx-impl.c.inc1169 static bool do_XX2_bf_uim(DisasContext *ctx, arg_XX2_bf_uim *a, bool vsr,
1175 xb = vsr ? gen_vsr_ptr(a->xb) : gen_avr_ptr(a->xb);
1696 offsetof(CPUPPCState, vsr[a->xt].VsrW(0 + a->ix)));
1698 offsetof(CPUPPCState, vsr[a->xt].VsrW(2 + a->ix)));
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Ddce_calcs.h403 struct bw_fixed vsr[maximum_number_of_surfaces]; member
/openbmc/qemu/include/hw/ppc/
H A Dspapr_nested.h461 ppc_vsr_t vsr[64] QEMU_ALIGNED(16); member
/openbmc/linux/arch/powerpc/lib/
H A Dsstep.c44 extern void load_vsrn(int vsr, const void *p);
45 extern void store_vsrn(int vsr, void *p);