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Searched refs:vpr (Results 1 – 17 of 17) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dtranslate-m-nocp.c187 store_cpu_field(tcg_constant_i32(0), v7m.vpr); in trans_VSCCLRM()
405 store_cpu_field(tmp, v7m.vpr); in gen_M_fp_sysreg_write()
410 TCGv_i32 vpr; in gen_M_fp_sysreg_write() local
412 vpr = load_cpu_field(v7m.vpr); in gen_M_fp_sysreg_write()
413 tcg_gen_deposit_i32(vpr, vpr, tmp, in gen_M_fp_sysreg_write()
415 store_cpu_field(vpr, v7m.vpr); in gen_M_fp_sysreg_write()
552 tmp = load_cpu_field(v7m.vpr); in gen_M_fp_sysreg_read()
556 tmp = load_cpu_field(v7m.vpr); in gen_M_fp_sysreg_read()
H A Dmve_helper.c79 uint16_t mask = FIELD_EX32(env->v7m.vpr, V7M_VPR, P0); in mve_element_mask()
81 if (!(env->v7m.vpr & R_V7M_VPR_MASK01_MASK)) { in mve_element_mask()
84 if (!(env->v7m.vpr & R_V7M_VPR_MASK23_MASK)) { in mve_element_mask()
113 uint32_t vpr = env->v7m.vpr; in mve_advance_vpt() local
123 if (!(vpr & (R_V7M_VPR_MASK01_MASK | R_V7M_VPR_MASK23_MASK))) { in mve_advance_vpt()
129 mask01 = FIELD_EX32(vpr, V7M_VPR, MASK01); in mve_advance_vpt()
130 mask23 = FIELD_EX32(vpr, V7M_VPR, MASK23); in mve_advance_vpt()
141 vpr ^= inv_mask; in mve_advance_vpt()
144 vpr = FIELD_DP32(vpr, V7M_VPR, MASK01, mask01 << 1); in mve_advance_vpt()
147 vpr = FIELD_DP32(vpr, V7M_VPR, MASK23, mask23 << 1); in mve_advance_vpt()
[all …]
H A Dm_helper.c417 env->v7m.vpr, mmu_idx, STACK_LAZYFP); in HELPER()
449 env->v7m.vpr = 0; in HELPER()
1098 cpu_stl_data_ra(env, fptr + 0x44, env->v7m.vpr, ra); in HELPER()
1111 env->v7m.vpr = 0; in HELPER()
1168 env->v7m.vpr = cpu_ldl_data_ra(env, fptr + 0x44, ra); in HELPER()
1327 env->v7m.vpr, mmu_idx, STACK_NORMAL); in v7m_push_stack()
1335 env->v7m.vpr = 0; in v7m_push_stack()
1569 env->v7m.vpr = 0; in do_v7m_exception_exit()
1818 v7m_stack_read(cpu, &env->v7m.vpr, in do_v7m_exception_exit()
1831 env->v7m.vpr = 0; in do_v7m_exception_exit()
H A Dtranslate-mve.c1328 TCGv_i32 vpr = load_cpu_field(v7m.vpr); in gen_vpst() local
1333 tcg_gen_deposit_i32(vpr, vpr, in gen_vpst()
1342 tcg_gen_deposit_i32(vpr, vpr, in gen_vpst()
1349 store_cpu_field(vpr, v7m.vpr); in gen_vpst()
H A Dtranslate-vfp.c183 store_cpu_field(tcg_constant_i32(0), v7m.vpr); in gen_update_fp_context()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dgv100.c40 .vpr.scrub_required = gp102_fb_vpr_scrub_required,
41 .vpr.scrub = gp102_fb_vpr_scrub,
H A Dtu102.c40 .vpr.scrub_required = tu102_fb_vpr_scrub_required,
41 .vpr.scrub = gp102_fb_vpr_scrub,
H A Dga102.c55 .vpr.scrub_required = tu102_fb_vpr_scrub_required,
56 .vpr.scrub = gp102_fb_vpr_scrub,
H A Dgp102.c77 .vpr.scrub_required = gp102_fb_vpr_scrub_required,
78 .vpr.scrub = gp102_fb_vpr_scrub,
H A Dbase.c143 if (!fb->func->vpr.scrub_required) in nvkm_fb_mem_unlock()
150 if (!fb->func->vpr.scrub_required(fb)) { in nvkm_fb_mem_unlock()
162 ret = fb->func->vpr.scrub(fb); in nvkm_fb_mem_unlock()
168 if (fb->func->vpr.scrub_required(fb)) { in nvkm_fb_mem_unlock()
H A Dpriv.h30 } vpr; member
/openbmc/qemu/target/arm/
H A Dgdbstub.c199 return gdb_get_reg32(buf, env->v7m.vpr); in mve_gdb_get_reg()
212 env->v7m.vpr = ldl_p(buf); in mve_gdb_set_reg()
H A Dmachine.c506 VMSTATE_UINT32(env.v7m.vpr, ARMCPU),
H A Dcpu.h570 uint32_t vpr; member
H A Dcpu.c1474 qemu_fprintf(f, "VPR: %08x\n", env->v7m.vpr); in arm_cpu_dump_state()
H A Dhelper.c12665 if (env->v7m.vpr) { in mve_no_pred()
/openbmc/linux/drivers/net/ethernet/sun/
H A Dniu.c2767 int port, int vpr, int rdc_table) in vlan_tbl_write() argument
2774 if (vpr) in vlan_tbl_write()