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Searched refs:vld (Results 1 – 19 of 19) sorted by relevance

/openbmc/qemu/host/include/loongarch64/host/
H A Dbufferiszero.c.inc20 asm("vld $vr0,%2,0\n\t" /* first: buf + 0 */
21 "vld $vr1,%4,-16\n\t" /* last: buf + len - 16 */
22 "vld $vr2,%3,0\n\t" /* e[0] */
23 "vld $vr3,%3,16\n\t" /* e[1] */
24 "vld $vr4,%3,32\n\t" /* e[2] */
25 "vld $vr5,%3,48\n\t" /* e[3] */
26 "vld $vr6,%3,64\n\t" /* e[4] */
27 "vld $vr7,%3,80\n\t" /* e[5] */
28 "vld $vr8,%3,96\n\t" /* e[6] */
41 "vld $vr0,%1,0\n\t" /* p[0] */
[all …]
H A Dload-extract-al16-al8.h.inc31 asm("vld $vr0, %2, 0\n\t"
/openbmc/linux/arch/loongarch/kernel/
H A Dfpu.S194 EX vld $vr0, \base, (0 * LSX_REG_WIDTH)
195 EX vld $vr1, \base, (1 * LSX_REG_WIDTH)
196 EX vld $vr2, \base, (2 * LSX_REG_WIDTH)
197 EX vld $vr3, \base, (3 * LSX_REG_WIDTH)
198 EX vld $vr4, \base, (4 * LSX_REG_WIDTH)
199 EX vld $vr5, \base, (5 * LSX_REG_WIDTH)
200 EX vld $vr6, \base, (6 * LSX_REG_WIDTH)
201 EX vld $vr7, \base, (7 * LSX_REG_WIDTH)
202 EX vld $vr8, \base, (8 * LSX_REG_WIDTH)
203 EX vld $vr9, \base, (9 * LSX_REG_WIDTH)
[all …]
/openbmc/linux/arch/loongarch/include/asm/
H A Dasmmacro.h245 vld $vr0, \tmp, THREAD_FPR0 - THREAD_FPR0
246 vld $vr1, \tmp, THREAD_FPR1 - THREAD_FPR0
247 vld $vr2, \tmp, THREAD_FPR2 - THREAD_FPR0
248 vld $vr3, \tmp, THREAD_FPR3 - THREAD_FPR0
249 vld $vr4, \tmp, THREAD_FPR4 - THREAD_FPR0
250 vld $vr5, \tmp, THREAD_FPR5 - THREAD_FPR0
251 vld $vr6, \tmp, THREAD_FPR6 - THREAD_FPR0
252 vld $vr7, \tmp, THREAD_FPR7 - THREAD_FPR0
253 vld $vr8, \tmp, THREAD_FPR8 - THREAD_FPR0
254 vld $vr9, \tmp, THREAD_FPR9 - THREAD_FPR0
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Di2c.h45 #define I2C_MRXADDR_SET(vld, addr) (((vld) << 24) | (addr)) argument
48 #define I2C_MRXRADDR_SET(vld, raddr) (((vld) << 24) | (raddr)) argument
/openbmc/linux/drivers/infiniband/hw/hfi1/
H A Dpio.c50 for (i = 0; i < ARRAY_SIZE(dd->vld); i++) in pio_send_control()
51 if (!dd->vld[i].mtu) in pio_send_control()
1781 return dd->vld[0].sc; in pio_select_send_context_vl()
1788 rval = !rval ? dd->vld[0].sc : rval; in pio_select_send_context_vl()
1840 dd->vld[i].mtu, in set_threshold()
1979 dd->vld[15].sc = sc_alloc(dd, SC_VL15, in init_pervl_scs()
1981 if (!dd->vld[15].sc) in init_pervl_scs()
1984 hfi1_init_ctxt(dd->vld[15].sc); in init_pervl_scs()
1985 dd->vld[15].mtu = enum_to_mtu(OPA_MTU_2048); in init_pervl_scs()
1993 dd->kernel_send_context[0] = dd->vld[15].sc; in init_pervl_scs()
[all …]
H A Dqp.c290 if (wqe->length > dd->vld[15].mtu) in hfi1_setup_wqe()
571 return dd->vld[15].sc; in qp_to_send_context()
817 mtu = min_t(u32, mtu, dd->vld[vl].mtu); in mtu_from_qp()
H A Dmad.c783 ppd->vls_supported > ARRAY_SIZE(dd->vld)) { in __subn_get_opa_portinfo()
848 mtu = mtu_to_enum(dd->vld[i].mtu, HFI1_DEFAULT_ACTIVE_MTU); in __subn_get_opa_portinfo()
855 mtu = mtu_to_enum(dd->vld[15].mtu, 2048); in __subn_get_opa_portinfo()
1485 ppd->vls_supported > ARRAY_SIZE(dd->vld)) { in __subn_set_opa_portinfo()
1503 if (dd->vld[i].mtu != mtu) { in __subn_set_opa_portinfo()
1506 i, dd->vld[i].mtu, mtu); in __subn_set_opa_portinfo()
1507 dd->vld[i].mtu = mtu; in __subn_set_opa_portinfo()
1517 if (dd->vld[15].mtu != mtu) { in __subn_set_opa_portinfo()
1520 dd->vld[15].mtu, mtu); in __subn_set_opa_portinfo()
1521 dd->vld[15].mtu = mtu; in __subn_set_opa_portinfo()
H A Dchip.c5798 if (dd->vld[15].sc == sc) in sc_to_vl()
5801 if (dd->vld[i].sc == sc) in sc_to_vl()
10121 u32 maxvlmtu = dd->vld[15].mtu; in set_send_length()
10122 u64 len1 = 0, len2 = (((dd->vld[15].mtu + max_hb) >> 2) in set_send_length()
10129 if (dd->vld[i].mtu > maxvlmtu) in set_send_length()
10130 maxvlmtu = dd->vld[i].mtu; in set_send_length()
10132 len1 |= (((dd->vld[i].mtu + max_hb) >> 2) in set_send_length()
10136 len2 |= (((dd->vld[i].mtu + max_hb) >> 2) in set_send_length()
10145 thres = min(sc_percent_to_threshold(dd->vld[i].sc, 50), in set_send_length()
10146 sc_mtu_to_threshold(dd->vld[i].sc, in set_send_length()
[all …]
H A Dsysfs.c349 return sysfs_emit(buf, "%u\n", dd->vld[vlattr->vl].mtu); in vl2mtu_attr_show()
H A Ddriver.c1245 if (ppd->ibmtu < dd->vld[i].mtu) in set_mtu()
1246 ppd->ibmtu = dd->vld[i].mtu; in set_mtu()
H A Dhfi.h1041 struct per_vl_data vld[PER_VL_SEND_CONTEXTS]; member
H A Dverbs.c1529 ah->log_pmtu = ilog2(dd->vld[ah->vl].mtu); in hfi1_notify_new_ah()
/openbmc/linux/drivers/perf/
H A Dxgene_pmu.c535 XGENE_PMU_EVENT_ATTR(pd-entry-vld, 0x07),
536 XGENE_PMU_EVENT_ATTR(sref-entry-vld, 0x08),
546 XGENE_PMU_EVENT_ATTR(hprd-lprd-wr-req-vld, 0x12),
547 XGENE_PMU_EVENT_ATTR(lprd-req-vld, 0x13),
548 XGENE_PMU_EVENT_ATTR(hprd-req-vld, 0x14),
549 XGENE_PMU_EVENT_ATTR(hprd-lprd-req-vld, 0x15),
550 XGENE_PMU_EVENT_ATTR(wr-req-vld, 0x16),
551 XGENE_PMU_EVENT_ATTR(partial-wr-req-vld, 0x17),
/openbmc/linux/drivers/mtd/nand/raw/
H A Dqcom_nandc.c325 __le32 vld; member
440 u32 cmd1, vld; member
725 return &regs->vld; in offset_to_nandc_reg()
2896 (nandc->vld & ~READ_START_VLD)); in qcom_param_page_type_exec()
2906 nandc_set_reg(chip, NAND_DEV_CMD_VLD_RESTORE, nandc->vld); in qcom_param_page_type_exec()
3181 nandc->vld = NAND_DEV_CMD_VLD_VAL; in qcom_nandc_setup()
/openbmc/linux/arch/loongarch/
H A DKconfig260 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
/openbmc/qemu/target/loongarch/
H A Dinsns.decode1293 vld 0010 110000 ............ ..... ..... @vr_i12
H A Ddisas.c1697 INSN_LSX(vld, vr_i) in LSX_FCMP_INSN()
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-insn-defs.c.inc2023 /* Emits the `vld vd, j, sk12` instruction. */