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/openbmc/linux/net/ceph/
H A Dmessenger_v2.c114 iov_iter_is_discard(&con->v2.in_iter) ? "discard" : "need", in ceph_tcp_recv()
115 iov_iter_count(&con->v2.in_iter)); in ceph_tcp_recv()
116 ret = do_recvmsg(con->sock, &con->v2.in_iter); in ceph_tcp_recv()
118 iov_iter_count(&con->v2.in_iter)); in ceph_tcp_recv()
201 iov_iter_count(&con->v2.out_iter), con->v2.out_iter_sendpage); in ceph_tcp_send()
202 if (con->v2.out_iter_sendpage) in ceph_tcp_send()
203 ret = do_try_sendpage(con->sock, &con->v2.out_iter); in ceph_tcp_send()
205 ret = do_sendmsg(con->sock, &con->v2.out_iter); in ceph_tcp_send()
207 iov_iter_count(&con->v2.out_iter)); in ceph_tcp_send()
213 BUG_ON(con->v2.in_kvec_cnt >= ARRAY_SIZE(con->v2.in_kvecs)); in add_in_kvec()
[all …]
/openbmc/linux/arch/loongarch/lib/
H A Dxor_template.c18 const unsigned long * __restrict v2)
25 LD_AND_XOR_LINE(v2)
27 : : [v1] "r"(v1), [v2] "r"(v2) : "memory"
31 v2 += LINE_WIDTH / sizeof(unsigned long);
37 const unsigned long * __restrict v2,
45 LD_AND_XOR_LINE(v2)
48 : : [v1] "r"(v1), [v2] "r"(v2), [v3] "r"(v3) : "memory"
52 v2 += LINE_WIDTH / sizeof(unsigned long);
59 const unsigned long * __restrict v2,
68 LD_AND_XOR_LINE(v2)
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/etcd/etcd/
H A D0001-xxhash-bump-to-v2.1.2.patch4 Subject: [PATCH] xxhash: bump to v2.1.2
6 There is a known issue in v2.1.1:
45 - github.com/cespare/xxhash/v2 v2.1.1 // indirect
46 + github.com/cespare/xxhash/v2 v2.1.2 // indirect
56 github.com/cespare/xxhash/v2 v2.1.1 h1:6MnRN8NT7+YBpUIWxHtefFZOKTAPgGjpQSxqLNn0+qY=
57 github.com/cespare/xxhash/v2 v2.1.1/go.mod h1:VGX0DQ3Q6kWi7AoAeZDth3/j3BFtOZR5XLFGgcrjCOs=
58 +github.com/cespare/xxhash/v2 v2.1.2 h1:YRXhKfTDauu4ajMg1TPgFO5jnlC2HCbmLXMcTG5cbYE=
59 +github.com/cespare/xxhash/v2 v2.1.2/go.mod h1:VGX0DQ3Q6kWi7AoAeZDth3/j3BFtOZR5XLFGgcrjCOs=
71 - github.com/cespare/xxhash/v2 v2.1.1 // indirect
72 + github.com/cespare/xxhash/v2 v2.1.2 // indirect
[all …]
/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_BB.c227 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_AGC_TAB() local
231 odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
240 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
241 } else if (!CheckPositive(pDM_Odm, v1, v2)) { in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
243 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
244 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
246 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
247 if (!CheckNegative(pDM_Odm, v1, v2)) in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
251 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
259 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
[all …]
H A DHalHWImg8723B_MAC.c197 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_MAC_REG() local
201 odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
210 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
211 } else if (!CheckPositive(pDM_Odm, v1, v2)) { in ODM_ReadAndConfig_MP_8723B_MAC_REG()
213 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
214 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
216 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
217 if (!CheckNegative(pDM_Odm, v1, v2)) in ODM_ReadAndConfig_MP_8723B_MAC_REG()
221 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
227 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
[all …]
/openbmc/qemu/docs/system/
H A Dcpu-models-x86-abi.csv1 Model,baseline,v2,v3,v4
4 Broadwell-v2,✅,✅,✅,
8 Cascadelake-Server-v2,✅,✅,✅,✅
14 Cooperlake-v2,✅,✅,✅,✅
16 Denverton-v2,✅,✅,,
19 Dhyana-v2,✅,✅,✅,
22 EPYC-Milan-v2,✅,✅,✅,
24 EPYC-Rome-v2,✅,✅,✅,
28 EPYC-v2,✅,✅,✅,
33 Haswell-v2,✅,✅,✅,
[all …]
/openbmc/qemu/tests/tcg/s390x/
H A Dvxeh2_vs.c7 #define vtst(v1, v2) \ argument
8 if (v1.d[0] != v2.d[0] || v1.d[1] != v2.d[1]) { \
12 static inline void vsl(S390Vector *v1, S390Vector *v2, S390Vector *v3) in vsl() argument
16 : [v2] "v" (v2->v) in vsl()
20 static inline void vsra(S390Vector *v1, S390Vector *v2, S390Vector *v3) in vsra() argument
24 : [v2] "v" (v2->v) in vsra()
28 static inline void vsrl(S390Vector *v1, S390Vector *v2, S390Vector *v3) in vsrl() argument
32 : [v2] "v" (v2->v) in vsrl()
36 static inline void vsld(S390Vector *v1, S390Vector *v2, in vsld() argument
41 : [v2] "v" (v2->v) in vsld()
[all …]
H A Dvxeh2_vcvt.c11 static inline void vcfps(S390Vector *v1, S390Vector *v2, in vcfps() argument
16 : [v2] "v" (v2->v) in vcfps()
22 static inline void vcfpl(S390Vector *v1, S390Vector *v2, in vcfpl() argument
27 : [v2] "v" (v2->v) in vcfpl()
33 static inline void vcsfp(S390Vector *v1, S390Vector *v2, in vcsfp() argument
38 : [v2] "v" (v2->v) in vcsfp()
44 static inline void vclfp(S390Vector *v1, S390Vector *v2, in vclfp() argument
49 : [v2] "v" (v2->v) in vclfp()
H A Dvxeh2_vstrs.c13 vstrs(S390Vector *v1, const S390Vector *v2, const S390Vector *v3, in vstrs() argument
22 : [v2] "v" (v2->v) in vstrs()
35 S390Vector v2 = {.d[0] = 0x222000205e410000ULL, .d[1] = 0}; in test_ignored_match() local
39 assert(vstrs(&v1, &v2, &v3, &v4, 0, 2) == 1); in test_ignored_match()
47 S390Vector v2 = {.d[0] = 0x5300000000000000ULL, .d[1] = 0}; in test_empty_needle() local
51 assert(vstrs(&v1, &v2, &v3, &v4, 0, 0) == 2); in test_empty_needle()
59 S390Vector v2 = {.d[0] = 0x1122334455667700ULL, .d[1] = 0}; in test_max_length() local
63 assert(vstrs(&v1, &v2, &v3, &v4, 0, 0) == 3); in test_max_length()
71 S390Vector v2 = {.d[0] = 0xffffff000fffff00ULL, .d[1] = 0x82b}; in test_no_match() local
76 assert(vstrs(&v1, &v2, &v3, &v4, 0, 2) == 1); in test_no_match()
/openbmc/qemu/target/s390x/tcg/
H A Dvec_int_helper.c101 void HELPER(gvec_vavg##BITS)(void *v1, const void *v2, const void *v3, \
107 const int32_t a = (int##BITS##_t)s390_vec_read_element##BITS(v2, i); \
117 void HELPER(gvec_vavgl##BITS)(void *v1, const void *v2, const void *v3, \
123 const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
133 void HELPER(gvec_vclz##BITS)(void *v1, const void *v2, uint32_t desc) \
138 const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
147 void HELPER(gvec_vctz##BITS)(void *v1, const void *v2, uint32_t desc) \
152 const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
171 void HELPER(gvec_vgfm8)(void *v1, const void *v2, const void *v3, uint32_t d) in HELPER()
174 const uint64_t *q2 = v2, *q3 = v3; in HELPER()
[all …]
H A Dvec_string_helper.c78 static int vfae(void *v1, const void *v2, const void *v3, bool in, in vfae() argument
88 a0 = s390_vec_read_element64(v2, 0); in vfae()
89 a1 = s390_vec_read_element64(v2, 1); in vfae()
137 void HELPER(gvec_vfae##BITS)(void *v1, const void *v2, const void *v3, \
144 vfae(v1, v2, v3, in, rt, zs, MO_##BITS); \
151 void HELPER(gvec_vfae_cc##BITS)(void *v1, const void *v2, const void *v3, \
158 env->cc_op = vfae(v1, v2, v3, in, rt, zs, MO_##BITS); \
164 static int vfee(void *v1, const void *v2, const void *v3, bool zs, uint8_t es) in vfee() argument
171 a0 = s390_vec_read_element64(v2, 0); in vfee()
172 a1 = s390_vec_read_element64(v2, 1); in vfee()
[all …]
H A Dfpu_helper.c460 uint64_t HELPER(cegb)(CPUS390XState *env, int64_t v2, uint32_t m34) in HELPER()
463 float32 ret = int64_to_float32(v2, &env->fpu_status); in HELPER()
471 uint64_t HELPER(cdgb)(CPUS390XState *env, int64_t v2, uint32_t m34) in HELPER()
474 float64 ret = int64_to_float64(v2, &env->fpu_status); in HELPER()
482 Int128 HELPER(cxgb)(CPUS390XState *env, int64_t v2, uint32_t m34) in HELPER()
485 float128 ret = int64_to_float128(v2, &env->fpu_status); in HELPER()
493 uint64_t HELPER(celgb)(CPUS390XState *env, uint64_t v2, uint32_t m34) in HELPER()
496 float32 ret = uint64_to_float32(v2, &env->fpu_status); in HELPER()
504 uint64_t HELPER(cdlgb)(CPUS390XState *env, uint64_t v2, uint32_t m34) in HELPER()
507 float64 ret = uint64_to_float64(v2, &env->fpu_status); in HELPER()
[all …]
/openbmc/linux/arch/s390/crypto/
H A Dcrc32le-vx.S134 VPERM %v2,%v2,%v2,CONST_PERM_LE2BE
161 VGFMAG %v2,CONST_R2R1,%v2,%v6
177 VGFMAG %v1,CONST_R4R3,%v1,%v2
186 VL %v2,0,,%r3 /* Load next data chunk */
187 VPERM %v2,%v2,%v2,CONST_PERM_LE2BE
188 VGFMAG %v1,CONST_R4R3,%v1,%v2 /* Fold next data chunk */
235 VSRLB %v2,%v1,%v9 /* Store remaining bits in V2 */
237 VGFMAG %v1,CONST_R5,%v1,%v2 /* V1 = (V1 * R5) XOR V2 */
259 VUPLLF %v2,%v1
260 VGFMG %v2,CONST_RU_POLY,%v2
[all …]
H A Dcrc32be-vx.S125 VGFMAG %v2,CONST_R1R2,%v2,%v6
138 VGFMAG %v1,CONST_R3R4,%v1,%v2
148 VL %v2,0,,%r3 /* Load next data chunk */
149 VGFMAG %v1,CONST_R3R4,%v1,%v2 /* Fold next data chunk */
197 VUPLLF %v2,%v1
198 VGFMG %v2,CONST_RU_POLY,%v2
205 VUPLLF %v2,%v2
206 VGFMAG %v2,CONST_CRC_POLY,%v2,%v1
209 VLGVF %r2,%v2,3
/openbmc/linux/drivers/char/mwave/
H A Dmwavedd.h84 #define PRINTK_3(f,s,v1,v2) \ argument
86 printk(s,v1,v2); \
89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
[all …]
/openbmc/linux/Documentation/powerpc/
H A Disa-versions.rst14 Power8 Power ISA v2.07
15 e6500 Power ISA v2.06 with some exceptions
16 e5500 Power ISA v2.06 with some exceptions, no Altivec
17 Power7 Power ISA v2.06
18 Power6 Power ISA v2.05
19 PA6T Power ISA v2.04
20 Cell PPU - Power ISA v2.02 with some minor exceptions
22 Power5++ Power ISA v2.04 (no VMX)
23 Power5+ Power ISA v2.03
24 Power5 - PowerPC User Instruction Set Architecture Book I v2.02
[all …]
/openbmc/linux/tools/testing/selftests/powerpc/math/
H A Dvmx_asm.S9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
17 vmr v2,v1
22 vand v2,v2,v1
27 vand v2,v2,v1
32 vand v2,v2,v1
37 vand v2,v2,v1
42 vand v2,v2,v1
47 vand v2,v2,v1
52 vand v2,v2,v1
57 vand v2,v2,v1
[all …]
/openbmc/linux/arch/arm64/lib/
H A Dxor-neon.c19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local
26 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_2()
32 vst1q_u64(dp1 + 4, v2); in xor_arm64_neon_2()
48 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local
55 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_3()
61 v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); in xor_arm64_neon_3()
67 vst1q_u64(dp1 + 4, v2); in xor_arm64_neon_3()
86 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local
93 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_4()
99 v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); in xor_arm64_neon_4()
[all …]
/openbmc/linux/include/pcmcia/
H A Ddevice_id.h29 #define PCMCIA_DEVICE_PROD_ID2(v2, vh2) { \ argument
31 .prod_id = { NULL, (v2), NULL, NULL }, \
39 #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \ argument
42 .prod_id = { (v1), (v2), NULL, NULL }, \
57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ argument
61 .prod_id = { (v1), (v2), (v3), NULL },\
64 #define PCMCIA_DEVICE_PROD_ID124(v1, v2, v4, vh1, vh2, vh4) { \ argument
68 .prod_id = { (v1), (v2), NULL, (v4) }, \
78 #define PCMCIA_DEVICE_PROD_ID1234(v1, v2, v3, v4, vh1, vh2, vh3, vh4) { \ argument
83 .prod_id = { (v1), (v2), (v3), (v4) }, \
[all …]
/openbmc/qemu/target/i386/hvf/
H A Dx86_flags.h46 void SET_FLAGS_OSZAPC_SUB32(CPUX86State *env, uint32_t v1, uint32_t v2,
48 void SET_FLAGS_OSZAPC_SUB16(CPUX86State *env, uint16_t v1, uint16_t v2,
50 void SET_FLAGS_OSZAPC_SUB8(CPUX86State *env, uint8_t v1, uint8_t v2,
53 void SET_FLAGS_OSZAPC_ADD32(CPUX86State *env, uint32_t v1, uint32_t v2,
55 void SET_FLAGS_OSZAPC_ADD16(CPUX86State *env, uint16_t v1, uint16_t v2,
57 void SET_FLAGS_OSZAPC_ADD8(CPUX86State *env, uint8_t v1, uint8_t v2,
60 void SET_FLAGS_OSZAP_SUB32(CPUX86State *env, uint32_t v1, uint32_t v2,
62 void SET_FLAGS_OSZAP_SUB16(CPUX86State *env, uint16_t v1, uint16_t v2,
64 void SET_FLAGS_OSZAP_SUB8(CPUX86State *env, uint8_t v1, uint8_t v2,
67 void SET_FLAGS_OSZAP_ADD32(CPUX86State *env, uint32_t v1, uint32_t v2,
[all …]
H A Dx86_flags.c123 void SET_FLAGS_OSZAPC_SUB32(CPUX86State *env, uint32_t v1, uint32_t v2, in SET_FLAGS_OSZAPC_SUB32() argument
126 SET_FLAGS_OSZAPC_32(SUB_COUT_VEC(v1, v2, diff), diff); in SET_FLAGS_OSZAPC_SUB32()
129 void SET_FLAGS_OSZAPC_SUB16(CPUX86State *env, uint16_t v1, uint16_t v2, in SET_FLAGS_OSZAPC_SUB16() argument
132 SET_FLAGS_OSZAPC_16(SUB_COUT_VEC(v1, v2, diff), diff); in SET_FLAGS_OSZAPC_SUB16()
135 void SET_FLAGS_OSZAPC_SUB8(CPUX86State *env, uint8_t v1, uint8_t v2, in SET_FLAGS_OSZAPC_SUB8() argument
138 SET_FLAGS_OSZAPC_8(SUB_COUT_VEC(v1, v2, diff), diff); in SET_FLAGS_OSZAPC_SUB8()
141 void SET_FLAGS_OSZAPC_ADD32(CPUX86State *env, uint32_t v1, uint32_t v2, in SET_FLAGS_OSZAPC_ADD32() argument
144 SET_FLAGS_OSZAPC_32(ADD_COUT_VEC(v1, v2, diff), diff); in SET_FLAGS_OSZAPC_ADD32()
147 void SET_FLAGS_OSZAPC_ADD16(CPUX86State *env, uint16_t v1, uint16_t v2, in SET_FLAGS_OSZAPC_ADD16() argument
150 SET_FLAGS_OSZAPC_16(ADD_COUT_VEC(v1, v2, diff), diff); in SET_FLAGS_OSZAPC_ADD16()
[all …]
/openbmc/linux/arch/powerpc/lib/
H A Dxor_vmx.c57 DEFINE(v2); in __xor_altivec_2()
62 LOAD(v2); in __xor_altivec_2()
63 XOR(v1, v2); in __xor_altivec_2()
67 v2 += 4; in __xor_altivec_2()
77 DEFINE(v2); in __xor_altivec_3()
83 LOAD(v2); in __xor_altivec_3()
85 XOR(v1, v2); in __xor_altivec_3()
90 v2 += 4; in __xor_altivec_3()
102 DEFINE(v2); in __xor_altivec_4()
109 LOAD(v2); in __xor_altivec_4()
[all …]
/openbmc/linux/arch/s390/include/asm/
H A Dvx-insn-asm.h100 .ifc \vxr,%v2
203 .macro RXB rxb v1 v2=0 v3=0 v4=0
208 .if \v2 & 0x10
227 .macro MRXB m v1 v2=0 v3=0 v4=0
229 RXB rxb, \v1, \v2, \v3, \v4
242 .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0
243 MRXB \m, \v1, \v2, \v3, \v4
286 .macro VLR v1, v2
288 VX_NUM v2, \v2
289 .word 0xE700 | ((v1&15) << 4) | (v2&15)
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
70 FN(reg, f2), v2)
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
75 FN(reg, f2), v2,\
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
81 FN(reg, f2), v2,\
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
89 FN(reg, f2), v2,\
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
98 FN(reg, f2), v2,\
[all …]
/openbmc/linux/lib/
H A Dxxhash.c111 uint32_t v2 = seed + PRIME32_2; in xxh32() local
118 v2 = xxh32_round(v2, get_unaligned_le32(p)); in xxh32()
126 h32 = xxh_rotl32(v1, 1) + xxh_rotl32(v2, 7) + in xxh32()
181 uint64_t v2 = seed + PRIME64_2; in xxh64() local
188 v2 = xxh64_round(v2, get_unaligned_le64(p)); in xxh64()
196 h64 = xxh_rotl64(v1, 1) + xxh_rotl64(v2, 7) + in xxh64()
199 h64 = xxh64_merge_round(h64, v2); in xxh64()
249 state.v2 = seed + PRIME32_2; in xxh32_reset()
263 state.v2 = seed + PRIME64_2; in xxh64_reset()
295 state->v2 = xxh32_round(state->v2, get_unaligned_le32(p32)); in xxh32_update()
[all …]

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