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Searched refs:ull (Results 1 – 25 of 117) sorted by relevance

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/openbmc/linux/drivers/clk/imx/
H A Dclk-pllv1.c56 unsigned long long ull; in clk_pllv1_recalc_rate() local
98 ull = (unsigned long long)rate * mfn_abs; in clk_pllv1_recalc_rate()
100 do_div(ull, mfd + 1); in clk_pllv1_recalc_rate()
103 ull = (rate * mfi) - ull; in clk_pllv1_recalc_rate()
105 ull = (rate * mfi) + ull; in clk_pllv1_recalc_rate()
107 return ull; in clk_pllv1_recalc_rate()
/openbmc/linux/arch/parisc/lib/
H A Ducmpdi2.c6 unsigned long long ull; member
15 union ull_union au = {.ull = a}; in __ucmpdi2()
16 union ull_union bu = {.ull = b}; in __ucmpdi2()
/openbmc/linux/drivers/crypto/cavium/zip/
H A Dzip_main.c160 que_sbuf_ctl.u_reg64 = 0ull; in zip_init_hw()
189 que_sbuf_addr.u_reg64 = 0ull; in zip_init_hw()
223 que_map.u_reg64 = 0ull; in zip_init_hw()
233 que_pri.u_reg64 = 0ull; in zip_init_hw()
487 u64 val = 0ull; in zip_stats_show()
488 u64 avg_chunk = 0ull, avg_cr = 0ull; in zip_stats_show()
H A Dzip_device.c133 ncp.u_reg64 = 0ull; in zip_load_instr()
158 dbell.u_reg64 = 0ull; in zip_load_instr()
/openbmc/linux/include/linux/
H A Dminmax.h101 __careful_cmp(min, (x) + 0u + 0ul + 0ull, (y) + 0u + 0ul + 0ull)
109 __careful_cmp(max, (x) + 0u + 0ul + 0ull, (y) + 0u + 0ul + 0ull)
/openbmc/linux/tools/testing/selftests/bpf/progs/
H A Dbpf_cubic.c130 if (!(x & (~0ull << (BITS_PER_U64-32)))) { in fls64()
134 if (!(x & (~0ull << (BITS_PER_U64-16)))) { in fls64()
138 if (!(x & (~0ull << (BITS_PER_U64-8)))) { in fls64()
142 if (!(x & (~0ull << (BITS_PER_U64-4)))) { in fls64()
146 if (!(x & (~0ull << (BITS_PER_U64-2)))) { in fls64()
150 if (!(x & (~0ull << (BITS_PER_U64-1)))) in fls64()
/openbmc/qemu/target/i386/tcg/sysemu/
H A Dtcg-cpu.c63 memory_region_init(cpu->cpu_as_root, OBJECT(cpu), "memory", ~0ull); in tcg_cpu_realizefn()
71 get_system_memory(), 0, ~0ull); in tcg_cpu_realizefn()
/openbmc/linux/arch/powerpc/include/asm/
H A Dspu.h379 #define MFC_CNTL_RESUME_DMA_QUEUE (0ull << 0)
383 #define MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION (0ull << 8)
579 #define MFC_LSACR_COMPARE_MASK ((~0ull) << 32)
580 #define MFC_LSACR_COMPARE_ADDR ((~0ull) >> 32)
585 #define MFC_LSCRR_QI_MASK ((~0ull) << MFC_LSCRR_QI_SHIFT)
630 #define SPU_ECC_CNTL_E (1ull << 0ull)
/openbmc/qemu/hw/m68k/
H A Dmcf_intc.c122 s->imr = ~0ull; in mcf_intc_write()
129 s->imr = 0ull; in mcf_intc_write()
158 s->imr = ~0ull; in mcf_intc_reset()
/openbmc/qemu/hw/ppc/
H A Dpnv_i2c.c192 SETFIELD(I2C_RESIDUAL_FRONT_END, 0ull, len_bytes) | in pnv_i2c_handle_cmd()
193 SETFIELD(I2C_RESIDUAL_BACK_END, 0ull, len_bytes); in pnv_i2c_handle_cmd()
286 i2c->regs[I2C_FIFO_REG] = SETFIELD(I2C_FIFO, 0ull, data); in pnv_i2c_fifo_out()
344 SETFIELD(I2C_STAT_UPPER_THRS, 0ull, i2c->num_busses - 1) | in pnv_i2c_reset()
348 SETFIELD(I2C_EXTD_STAT_FIFO_SIZE, 0ull, PNV_I2C_FIFO_SIZE) | in pnv_i2c_reset()
349 SETFIELD(I2C_EXTD_STAT_I2C_VERSION, 0ull, 23); /* last version */ in pnv_i2c_reset()
H A Dpnv_n1_chiplet.c34 uint64_t val = ~0ull; in pnv_n1_chiplet_pb_scom_eq_read()
78 uint64_t val = ~0ull; in pnv_n1_chiplet_pb_scom_es_read()
/openbmc/linux/arch/x86/kvm/mmu/
H A Dspte.c436 shadow_accessed_mask = has_ad_bits ? VMX_EPT_ACCESS_BIT : 0ull; in kvm_mmu_set_ept_masks()
437 shadow_dirty_mask = has_ad_bits ? VMX_EPT_DIRTY_BIT : 0ull; in kvm_mmu_set_ept_masks()
438 shadow_nx_mask = 0ull; in kvm_mmu_set_ept_masks()
440 shadow_present_mask = has_exec_only ? 0ull : VMX_EPT_READABLE_MASK; in kvm_mmu_set_ept_masks()
/openbmc/linux/arch/x86/kvm/
H A Dpmu.c524 u64 mask = fast_mode ? ~0u : ~0ull; in kvm_pmu_rdpmc()
712 pmu->global_ctrl_mask = ~0ull; in kvm_pmu_refresh()
713 pmu->global_status_mask = ~0ull; in kvm_pmu_refresh()
714 pmu->fixed_ctr_ctrl_mask = ~0ull; in kvm_pmu_refresh()
715 pmu->pebs_enable_mask = ~0ull; in kvm_pmu_refresh()
716 pmu->pebs_data_cfg_mask = ~0ull; in kvm_pmu_refresh()
/openbmc/linux/drivers/crypto/cavium/cpt/
H A Dcptpf_main.c94 cpt_write_csr64(cpt->reg_base, CPTX_PF_MBOX_ENA_W1CX(0, 0), ~0ull); in cpt_disable_mbox_interrupts()
100 cpt_write_csr64(cpt->reg_base, CPTX_PF_ECC0_ENA_W1C(0), ~0ull); in cpt_disable_ecc_interrupts()
106 cpt_write_csr64(cpt->reg_base, CPTX_PF_EXEC_ENA_W1C(0), ~0ull); in cpt_disable_exec_interrupts()
119 cpt_write_csr64(cpt->reg_base, CPTX_PF_MBOX_ENA_W1SX(0, 0), ~0ull); in cpt_enable_mbox_interrupts()
429 CPTX_PF_ENGX_UCODE_BASE(0, core), 0ull); in cpt_unload_microcode()
/openbmc/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pip.h47 CVMX_PIP_L4_NO_ERR = 0ull,
78 CVMX_PIP_IP_NO_ERR = 0ull,
102 CVMX_PIP_RX_NO_ERR = 0ull,
/openbmc/linux/arch/x86/include/asm/
H A Dprocessor-flags.h50 #define CR3_PCID_MASK 0ull
H A Dpgtable-invert.h24 return __pte_needs_invert(val) ? ~0ull : 0; in protnone_mask()
/openbmc/linux/drivers/infiniband/core/
H A Dpacker.c101 mask = cpu_to_be64((~0ull >> (64 - desc[i].size_bits)) << shift); in ib_pack()
180 mask = (~0ull >> (64 - desc[i].size_bits)) << shift; in ib_unpack()
/openbmc/linux/drivers/misc/cxl/
H A Dcxllib.c14 #define CXL_INVALID_DRA ~0ull
68 (~0ull << CXL_DUMMY_READ_ALIGN); in allocate_dummy_read_buf()
/openbmc/linux/fs/ocfs2/
H A Docfs2_trace.h305 TP_PROTO(unsigned long long ull, int value1, int value2, int value3),
306 TP_ARGS(ull, value1, value2, value3),
308 __field( unsigned long long, ull )
314 __entry->ull = ull;
320 __entry->ull, __entry->value1,
326 TP_PROTO(unsigned long long ull, int value1, \
328 TP_ARGS(ull, value1, value2, value3))
331 TP_PROTO(unsigned long long ull, unsigned int value1,
333 TP_ARGS(ull, value1, value2, value3),
335 __field(unsigned long long, ull)
[all …]
/openbmc/linux/drivers/crypto/marvell/octeontx/
H A Dotx_cptpf_mbox.c89 mbx->data = 0ull; in otx_cpt_mbox_send_ack()
98 mbx->data = 0ull; in otx_cptpf_mbox_send_nack()
H A Dotx_cptpf_main.c20 writeq(~0ull, cpt->reg_base + OTX_CPT_PF_MBOX_ENA_W1CX(0)); in otx_cpt_disable_mbox_interrupts()
26 writeq(~0ull, cpt->reg_base + OTX_CPT_PF_MBOX_ENA_W1SX(0)); in otx_cpt_enable_mbox_interrupts()
/openbmc/u-boot/include/linux/
H A Dbitfield.h59 BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \
/openbmc/linux/arch/powerpc/platforms/cell/spufs/
H A Dspu_utils.h15 unsigned long long ull; member
/openbmc/qemu/tests/qtest/
H A Dpnv-host-i2c-test.c68 reg64 = SETFIELD(I2C_MODE_BIT_RATE_DIV, 0ull, 0x2be); in pnv_i2c_send()
91 reg64 = SETFIELD(I2C_FIFO, 0ull, buf[byte_num]); in pnv_i2c_send()
110 reg64 = SETFIELD(I2C_MODE_BIT_RATE_DIV, 0ull, 0x2be); in pnv_i2c_recv()

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