/openbmc/libpldm/include/libpldm/ |
H A D | pldm_types.h | 8 uint8_t byte; 10 uint8_t bit0 : 1; 11 uint8_t bit1 : 1; 12 uint8_t bit2 : 1; 13 uint8_t bit3 : 1; 14 uint8_t bit4 : 1; 15 uint8_t bit5 : 1; 16 uint8_t bit6 : 1; 17 uint8_t bit7 : 1; 26 uint8_t alpha; [all …]
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H A D | platform.h | 553 uint8_t version; 554 uint8_t type; 566 uint8_t validity; 567 uint8_t tid; 569 uint8_t terminus_locator_type; 570 uint8_t terminus_locator_value_size; 571 uint8_t terminus_locator_value[1]; 582 uint8_t sensor_count; 583 uint8_t names[1]; 592 uint8_t eid; [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/ |
H A D | dc_dp_types.h | 153 uint8_t link_rate_set; 158 uint8_t level : 4; 159 uint8_t reserved : 1; 160 uint8_t no_preshoot : 1; 161 uint8_t no_deemphasis : 1; 162 uint8_t method2 : 1; 164 uint8_t raw; 194 uint8_t VC_PAYLOAD_TABLE_UPDATED:1; 195 uint8_t ACT_HANDLED:1; 197 uint8_t raw; [all …]
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/openbmc/qemu/hw/usb/ |
H A D | desc.h | 8 uint8_t bLength; 9 uint8_t bDescriptorType; 12 uint8_t bcdUSB_lo; 13 uint8_t bcdUSB_hi; 14 uint8_t bDeviceClass; 15 uint8_t bDeviceSubClass; 16 uint8_t bDeviceProtocol; 17 uint8_t bMaxPacketSize0; 18 uint8_t idVendor_lo; 19 uint8_t idVendor_hi; [all …]
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/openbmc/phosphor-net-ipmid/command/ |
H A D | payload_cmds.hpp | 13 constexpr uint8_t IPMI_CC_PAYLOAD_ALREADY_ACTIVE = 0x80; 14 constexpr uint8_t IPMI_CC_PAYLOAD_TYPE_DISABLED = 0x81; 15 constexpr uint8_t IPMI_CC_PAYLOAD_ACTIVATION_LIMIT = 0x82; 16 constexpr uint8_t IPMI_CC_PAYLOAD_WITH_ENCRYPTION = 0x83; 17 constexpr uint8_t IPMI_CC_PAYLOAD_WITHOUT_ENCRYPTION = 0x84; 26 uint8_t payloadType:6; //!< Payload type. 27 uint8_t reserved1:2; //!< Reserved. 31 uint8_t reserved1:2; //!< Payload type. 32 uint8_t payloadType:6; //!< Payload type. 36 uint8_t payloadInstance:4; //!< Payload instance. [all …]
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/openbmc/linux/drivers/gpu/drm/amd/include/ |
H A D | atomfirmware.h | 52 #ifndef uint8_t 53 typedef unsigned char uint8_t; typedef 235 …uint8_t format_revision; //mainly used for a hw function, when the parser is not backward compa… 236 …uint8_t content_revision; //change it when a data table has a structure change, or a hw function… 245 …uint8_t atom_bios_string[4]; //enum atom_string_def atom_bios_string; //Signature to d… 448 uint8_t h_border; 449 uint8_t v_border; 451 uint8_t atom_mode_id; 452 uint8_t refreshrate; 491 uint8_t mem_module_id; [all …]
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/openbmc/ipmitool/include/ipmitool/ |
H A D | ipmi_sdr.h | 110 uint8_t version; /* SDR version (51h) */ 115 uint8_t op_support; /* supported operations */ 153 uint8_t offset; /* offset into SDR */ 155 uint8_t length; /* length to read */ 167 uint8_t version; /* SDR version (51h) */ 179 uint8_t type; /* record type */ 180 uint8_t length; /* remaining record bytes */ 325 uint8_t owner_id; 327 uint8_t channel:4; /* channel number */ 328 uint8_t __reserved:2; [all …]
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/openbmc/linux/drivers/scsi/megaraid/ |
H A D | mbox_defs.h | 158 uint8_t cmd; 159 uint8_t cmdid; 163 uint8_t logdrv; 164 uint8_t numsge; 165 uint8_t resvd; 166 uint8_t busy; 167 uint8_t numstatus; 168 uint8_t status; 169 uint8_t completed[MBOX_MAX_FIRMWARE_STATUS]; 170 uint8_t poll; [all …]
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/openbmc/linux/drivers/gpu/drm/radeon/ |
H A D | smu7_fusion.h | 46 uint8_t DisplayPhy1Config; 47 uint8_t DisplayPhy2Config; 48 uint8_t DisplayPhy3Config; 49 uint8_t DisplayPhy4Config; 51 uint8_t DisplayPhy5Config; 52 uint8_t DisplayPhy6Config; 53 uint8_t DisplayPhy7Config; 54 uint8_t DisplayPhy8Config; 60 uint8_t SClkDpmEnabledLevels; 61 uint8_t MClkDpmEnabledLevels; [all …]
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H A D | smu7_discrete.h | 55 uint8_t DisplayPhy1Config; 56 uint8_t DisplayPhy2Config; 57 uint8_t DisplayPhy3Config; 58 uint8_t DisplayPhy4Config; 60 uint8_t DisplayPhy5Config; 61 uint8_t DisplayPhy6Config; 62 uint8_t DisplayPhy7Config; 63 uint8_t DisplayPhy8Config; 69 uint8_t SClkDpmEnabledLevels; 70 uint8_t MClkDpmEnabledLevels; [all …]
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | smu7_fusion.h | 45 uint8_t DisplayPhy1Config; 46 uint8_t DisplayPhy2Config; 47 uint8_t DisplayPhy3Config; 48 uint8_t DisplayPhy4Config; 50 uint8_t DisplayPhy5Config; 51 uint8_t DisplayPhy6Config; 52 uint8_t DisplayPhy7Config; 53 uint8_t DisplayPhy8Config; 59 uint8_t SClkDpmEnabledLevels; 60 uint8_t MClkDpmEnabledLevels; [all …]
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H A D | smu74_discrete.h | 44 uint8_t vco_setting; 45 uint8_t postdiv; 55 uint8_t Smio; 56 uint8_t padding; 72 uint8_t PllRange; 73 uint8_t SSc_En; 85 uint8_t pcieDpmLevel; 86 uint8_t DeepSleepDivId; 92 uint8_t SclkDid; 93 uint8_t padding; [all …]
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H A D | smu73_discrete.h | 32 uint8_t Smio; 33 uint8_t padding; 49 uint8_t pcieDpmLevel; 50 uint8_t DeepSleepDivId; 58 uint8_t SclkDid; 59 uint8_t DisplayWatermark; 60 uint8_t EnabledForActivity; 61 uint8_t EnabledForThrottle; 62 uint8_t UpHyst; 63 uint8_t DownHyst; [all …]
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H A D | smu71_discrete.h | 41 uint8_t Smio; 42 uint8_t padding; 54 uint8_t pcieDpmLevel; 55 uint8_t DeepSleepDivId; 64 uint8_t SclkDid; 65 uint8_t DisplayWatermark; 66 uint8_t EnabledForActivity; 67 uint8_t EnabledForThrottle; 68 uint8_t UpHyst; 69 uint8_t DownHyst; [all …]
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H A D | smu75_discrete.h | 43 uint8_t vco_setting; /* 1: 3-6GHz, 3: 2-4GHz */ 44 uint8_t postdiv; /* divide by 2^n */ 53 uint8_t Smio; 54 uint8_t padding; 70 uint8_t PllRange; 71 uint8_t SSc_En; 84 uint8_t pcieDpmLevel; 85 uint8_t DeepSleepDivId; 93 uint8_t SclkDid; 94 uint8_t padding; [all …]
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H A D | smu7_discrete.h | 55 uint8_t DisplayPhy1Config; 56 uint8_t DisplayPhy2Config; 57 uint8_t DisplayPhy3Config; 58 uint8_t DisplayPhy4Config; 60 uint8_t DisplayPhy5Config; 61 uint8_t DisplayPhy6Config; 62 uint8_t DisplayPhy7Config; 63 uint8_t DisplayPhy8Config; 69 uint8_t SClkDpmEnabledLevels; 70 uint8_t MClkDpmEnabledLevels; [all …]
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/openbmc/qemu/include/hw/firmware/ |
H A D | smbios.h | 20 extern uint8_t *usr_blobs; 26 uint8_t major, minor; 62 uint8_t anchor_string[4]; 63 uint8_t checksum; 64 uint8_t length; 65 uint8_t smbios_major_version; 66 uint8_t smbios_minor_version; 68 uint8_t entry_point_revision; 69 uint8_t formatted_area[5]; 70 uint8_t intermediate_anchor_string[5]; [all …]
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/openbmc/u-boot/arch/x86/include/asm/arch-baytrail/fsp/ |
H A D | fsp_vpd.h | 11 uint8_t enable_memory_down; 12 uint8_t dram_speed; 13 uint8_t dram_type; 14 uint8_t dimm_0_enable; 15 uint8_t dimm_1_enable; 16 uint8_t dimm_width; 17 uint8_t dimm_density; 18 uint8_t dimm_bus_width; 19 uint8_t dimm_sides; /* Ranks Per dimm_ */ 20 uint8_t dimm_tcl; /* tCL */ [all …]
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/openbmc/intel-ipmi-oem/include/ |
H A D | bridgingcommands.hpp | 29 constexpr uint8_t ipmbLunMask = 0x03; 30 constexpr uint8_t ipmbSeqMask = 0x3F; 31 constexpr uint8_t ipmbMeTargetAddress = 0x2C; 32 constexpr uint8_t ipmbMeChannelNum = 1; 37 constexpr uint8_t ipmbNetFnGet(uint8_t netFnLun) in ipmbNetFnGet() 42 constexpr uint8_t ipmbLunFromNetFnLunGet(uint8_t netFnLun) in ipmbLunFromNetFnLunGet() 47 constexpr uint8_t ipmbSeqGet(uint8_t seqNumLun) in ipmbSeqGet() 52 constexpr uint8_t ipmbLunFromSeqLunGet(uint8_t seqNumLun) in ipmbLunFromSeqLunGet() 60 constexpr uint8_t ipmbNetFnLunSet(uint8_t netFn, uint8_t lun) in ipmbNetFnLunSet() 65 constexpr uint8_t ipmbSeqLunSet(uint8_t seq, uint8_t lun) in ipmbSeqLunSet() [all …]
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H A D | storagecommands.hpp | 23 static constexpr uint8_t ipmiSdrVersion = 0x51; 27 static constexpr uint8_t selOperationSupport = 0x02; 28 static constexpr uint8_t systemEvent = 0x02; 30 static constexpr uint8_t oemTsEventFirst = 0xC0; 31 static constexpr uint8_t oemTsEventLast = 0xDF; 33 static constexpr uint8_t oemEventFirst = 0xE0; 34 static constexpr uint8_t oemEventLast = 0xFF; 36 static constexpr uint8_t eventMsgRev = 0x04; 50 uint8_t record_id_lsb; 51 uint8_t record_id_msb; [all …]
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/openbmc/linux/drivers/scsi/ |
H A D | qla1280.h | 99 uint8_t flags; /* (1) Status flags. */ 100 uint8_t dir; /* direction of transfer */ 335 uint8_t id0; /* 0 */ 336 uint8_t id1; /* 1 */ 337 uint8_t id2; /* 2 */ 338 uint8_t id3; /* 3 */ 339 uint8_t version; /* 4 */ 342 uint8_t bios_configuration_mode:2; 343 uint8_t bios_disable:1; 344 uint8_t selectable_scsi_boot_enable:1; [all …]
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H A D | ips.h | 409 uint8_t op_code; 410 uint8_t command_id; 411 uint8_t log_drv; 412 uint8_t sg_count; 416 uint8_t segment_4G; 417 uint8_t enhanced_sg; 423 uint8_t op_code; 424 uint8_t command_id; 434 uint8_t op_code; 435 uint8_t command_id; [all …]
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/openbmc/ipmbbridge/ |
H A D | ipmbbridged.hpp | 58 constexpr uint8_t ipmbI2cNumberOfRetries = 2; 63 constexpr uint8_t broadcastAddress = 0x0; 84 constexpr uint8_t ipmbNetFnResponseMask = 0x01; 85 constexpr uint8_t ipmbLunMask = 0x03; 86 constexpr uint8_t ipmbRsLun = 0x0; 91 constexpr uint8_t ipmbNetFnLunSet(uint8_t netFn, uint8_t lun) in ipmbNetFnLunSet() 96 constexpr uint8_t ipmbSeqLunSet(uint8_t seq, uint8_t lun) in ipmbSeqLunSet() 101 constexpr uint8_t ipmbAddressTo7BitSet(uint8_t address) in ipmbAddressTo7BitSet() 106 constexpr uint8_t ipmbRespNetFn(uint8_t netFn) in ipmbRespNetFn() 114 constexpr uint8_t ipmbNetFnGet(uint8_t netFnLun) in ipmbNetFnGet() [all …]
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/openbmc/fb-ipmi-oem/include/ |
H A D | sdrutils.hpp | 17 uint8_t next_record_id_lsb; 18 uint8_t next_record_id_msb; 19 uint8_t record_data[64]; 25 uint8_t record_id_lsb; 26 uint8_t record_id_msb; 27 uint8_t sdr_version; 28 uint8_t record_type; 29 uint8_t record_length; // Length not counting the header 42 uint8_t owner_id; 43 uint8_t owner_lun; [all …]
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/openbmc/u-boot/include/ |
H A D | ddr_spd.h | 293 uint8_t info_size_crc; /* 0 # bytes */ 294 uint8_t spd_rev; /* 1 Total # bytes of SPD */ 295 uint8_t mem_type; /* 2 Key Byte / mem type */ 296 uint8_t module_type; /* 3 Key Byte / Module Type */ 297 uint8_t density_banks; /* 4 Density and Banks */ 298 uint8_t addressing; /* 5 Addressing */ 299 uint8_t package_type; /* 6 Package type */ 300 uint8_t opt_feature; /* 7 Optional features */ 301 uint8_t thermal_ref; /* 8 Thermal and refresh */ 302 uint8_t oth_opt_features; /* 9 Other optional features */ [all …]
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