| /openbmc/u-boot/arch/arm/dts/ |
| H A D | r8a7796-salvator-x-u-boot.dts | 29 sd-uhs-sdr12;
30 sd-uhs-sdr25;
31 sd-uhs-sdr104;
41 sd-uhs-sdr12;
42 sd-uhs-sdr25;
43 sd-uhs-sdr104;
|
| H A D | r8a7795-salvator-x-u-boot.dts | 29 sd-uhs-sdr12;
30 sd-uhs-sdr25;
31 sd-uhs-sdr104;
41 sd-uhs-sdr12;
42 sd-uhs-sdr25;
43 sd-uhs-sdr104;
|
| H A D | r8a77965-salvator-x-u-boot.dts | 29 sd-uhs-sdr12;
30 sd-uhs-sdr25;
31 sd-uhs-sdr104;
43 sd-uhs-sdr12;
44 sd-uhs-sdr25;
45 sd-uhs-sdr104;
|
| H A D | r8a77990-ebisu-u-boot.dts | 149 sd-uhs-sdr12;
150 sd-uhs-sdr25;
151 sd-uhs-sdr50;
152 sd-uhs-sdr104;
167 sd-uhs-sdr12;
168 sd-uhs-sdr25;
169 sd-uhs-sdr50;
170 sd-uhs-sdr104;
|
| H A D | am57xx-beagle-x15.dts | 28 /delete-property/ sd-uhs-sdr104;
29 /delete-property/ sd-uhs-sdr50;
30 /delete-property/ sd-uhs-ddr50;
31 /delete-property/ sd-uhs-sdr25;
32 /delete-property/ sd-uhs-sdr12;
|
| H A D | r8a7795-h3ulcb-u-boot.dts | 36 sd-uhs-sdr12;
37 sd-uhs-sdr25;
38 sd-uhs-sdr104;
|
| H A D | r8a7796-m3ulcb-u-boot.dts | 36 sd-uhs-sdr12;
37 sd-uhs-sdr25;
38 sd-uhs-sdr104;
|
| /openbmc/linux/arch/arm64/boot/dts/sprd/ |
| H A D | ums512-1h10.dts | 45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>;
46 sprd,phy-delay-sd-uhs-sdr50 = <0x6e 0x7f 0x01 0x01>;
49 sd-uhs-sdr104;
50 sd-uhs-sdr50;
|
| /openbmc/linux/arch/riscv/boot/dts/microchip/ |
| H A D | mpfs-polarberry.dts | 75 sd-uhs-sdr12;
76 sd-uhs-sdr25;
77 sd-uhs-sdr50;
78 sd-uhs-sdr104;
|
| H A D | mpfs-sev-kit.dts | 108 sd-uhs-sdr12;
109 sd-uhs-sdr25;
110 sd-uhs-sdr50;
111 sd-uhs-sdr104;
|
| H A D | mpfs-m100pfsevp.dts | 124 sd-uhs-sdr12;
125 sd-uhs-sdr25;
126 sd-uhs-sdr50;
127 sd-uhs-sdr104;
|
| H A D | mpfs-icicle-kit.dts | 147 sd-uhs-sdr12;
148 sd-uhs-sdr25;
149 sd-uhs-sdr50;
150 sd-uhs-sdr104;
|
| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1012a-rdb.dts | 29 sd-uhs-sdr104;
30 sd-uhs-sdr50;
31 sd-uhs-sdr25;
32 sd-uhs-sdr12;
|
| H A D | fsl-lx2160a-clearfog-itx.dtsi | 92 sd-uhs-sdr104;
93 sd-uhs-sdr50;
94 sd-uhs-sdr25;
95 sd-uhs-sdr12;
|
| H A D | fsl-ls1046a-rdb.dts | 41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
43 sd-uhs-sdr25;
44 sd-uhs-sdr12;
|
| H A D | fsl-lx2160a-rdb.dts | 130 sd-uhs-sdr104;
131 sd-uhs-sdr50;
132 sd-uhs-sdr25;
133 sd-uhs-sdr12;
|
| H A D | fsl-ls1028a-rdb.dts | 162 sd-uhs-sdr104;
163 sd-uhs-sdr50;
164 sd-uhs-sdr25;
165 sd-uhs-sdr12;
|
| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | stih410-b2120.dts | 39 sd-uhs-sdr50;
40 sd-uhs-sdr104;
41 sd-uhs-ddr50;
|
| H A D | stih418-b2199.dts | 92 sd-uhs-sdr50;
93 sd-uhs-sdr104;
94 sd-uhs-ddr50;
|
| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3288-veyron-sdmmc.dtsi | 89 sd-uhs-sdr12;
90 sd-uhs-sdr25;
91 sd-uhs-sdr50;
92 sd-uhs-sdr104;
|
| H A D | rv1126-edgeble-neu2-io.dts | 99 sd-uhs-sdr12;
100 sd-uhs-sdr25;
101 sd-uhs-sdr104;
|
| H A D | rk3288-phycore-rdk.dts | 231 sd-uhs-sdr12;
232 sd-uhs-sdr25;
233 sd-uhs-sdr50;
234 sd-uhs-sdr104;
|
| /openbmc/linux/Documentation/devicetree/bindings/mmc/ |
| H A D | sdhci-st.txt | 51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
107 sd-uhs-sdr50;
108 sd-uhs-sdr104;
109 sd-uhs-ddr50;
|
| H A D | sdhci-sprd.txt | 24 - pinctrl-1: should contain uhs mode pin control
35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
60 sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
|
| /openbmc/linux/drivers/mmc/host/ |
| H A D | sdhci-pxav3.c | 238 static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) in pxav3_set_uhs_signaling() argument
252 switch (uhs) { in pxav3_set_uhs_signaling()
278 if (uhs == MMC_TIMING_UHS_SDR50 || in pxav3_set_uhs_signaling()
279 uhs == MMC_TIMING_UHS_DDR50) { in pxav3_set_uhs_signaling()
282 } else if (uhs == MMC_TIMING_MMC_HS) { in pxav3_set_uhs_signaling()
295 __func__, uhs, ctrl_2); in pxav3_set_uhs_signaling()
|