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Searched refs:tve (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/drivers/video/sunxi/
H A Dtve_common.c15 void tvencoder_mode_set(struct sunxi_tve_reg * const tve, enum tve_mode mode) in tvencoder_mode_set() argument
21 SUNXI_TVE_GCTRL_DAC_INPUT(2, 3), &tve->gctrl); in tvencoder_mode_set()
22 writel(SUNXI_TVE_CFG0_VGA, &tve->cfg0); in tvencoder_mode_set()
23 writel(SUNXI_TVE_DAC_CFG0_VGA, &tve->dac_cfg0); in tvencoder_mode_set()
24 writel(SUNXI_TVE_UNKNOWN1_VGA, &tve->unknown1); in tvencoder_mode_set()
27 writel(SUNXI_TVE_CHROMA_FREQ_PAL_NC, &tve->chroma_freq); in tvencoder_mode_set()
33 SUNXI_TVE_GCTRL_DAC_INPUT(3, 4), &tve->gctrl); in tvencoder_mode_set()
34 writel(SUNXI_TVE_CFG0_PAL, &tve->cfg0); in tvencoder_mode_set()
35 writel(SUNXI_TVE_DAC_CFG0_COMPOSITE, &tve->dac_cfg0); in tvencoder_mode_set()
36 writel(SUNXI_TVE_FILTER_COMPOSITE, &tve->filter); in tvencoder_mode_set()
[all …]
H A Dsunxi_display.c821 struct sunxi_tve_reg * const tve = local
831 tvencoder_mode_set(tve, tve_mode_vga);
834 tvencoder_mode_set(tve, tve_mode_composite_pal_nc);
837 tvencoder_mode_set(tve, tve_mode_composite_pal);
840 tvencoder_mode_set(tve, tve_mode_composite_pal_m);
843 tvencoder_mode_set(tve, tve_mode_composite_ntsc);
930 struct sunxi_tve_reg * __maybe_unused const tve = local
986 tvencoder_enable(tve);
1005 tvencoder_enable(tve);
/openbmc/linux/drivers/gpu/drm/imx/ipuv3/
H A Dimx-tve.c106 struct imx_tve *tve; member
126 return container_of(c, struct imx_tve_encoder, connector)->tve; in con_to_tve()
131 return container_of(e, struct imx_tve_encoder, encoder)->tve; in enc_to_tve()
134 static void tve_enable(struct imx_tve *tve) in tve_enable() argument
136 clk_prepare_enable(tve->clk); in tve_enable()
137 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, TVE_EN); in tve_enable()
140 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff); in tve_enable()
143 if (tve->mode == TVE_MODE_VGA) in tve_enable()
144 regmap_write(tve->regmap, TVE_INT_CONT_REG, 0); in tve_enable()
146 regmap_write(tve->regmap, TVE_INT_CONT_REG, in tve_enable()
[all …]
H A DMakefile8 obj-$(CONFIG_DRM_IMX_TVE) += imx-tve.o
/openbmc/qemu/hw/pci-host/
H A Dpnv_phb3.c739 bool is_write, uint64_t tve, in pnv_phb3_translate_tve() argument
742 uint64_t tta = GETFIELD(IODA2_TVT_TABLE_ADDR, tve); in pnv_phb3_translate_tve()
743 int32_t lev = GETFIELD(IODA2_TVT_NUM_LEVELS, tve); in pnv_phb3_translate_tve()
744 uint32_t tts = GETFIELD(IODA2_TVT_TCE_TABLE_SIZE, tve); in pnv_phb3_translate_tve()
745 uint32_t tps = GETFIELD(IODA2_TVT_IO_PSIZE, tve); in pnv_phb3_translate_tve()
762 if (!(tve & PPC_BIT(51))) { in pnv_phb3_translate_tve()
812 is_write ? 'W' : 'R', tve); in pnv_phb3_translate_tve()
825 is_write ? 'W' : 'R', tve); in pnv_phb3_translate_tve()
845 uint64_t tve, cfg; in pnv_phb3_translate_iommu() local
874 tve = ds->phb->ioda_TVT[ds->pe_num * 2 + tve_sel]; in pnv_phb3_translate_iommu()
[all …]
H A Dpnv_phb4.c1223 bool is_write, uint64_t tve, in pnv_phb4_translate_tve() argument
1226 uint64_t tta = GETFIELD(IODA3_TVT_TABLE_ADDR, tve); in pnv_phb4_translate_tve()
1227 int32_t lev = GETFIELD(IODA3_TVT_NUM_LEVELS, tve); in pnv_phb4_translate_tve()
1228 uint32_t tts = GETFIELD(IODA3_TVT_TCE_TABLE_SIZE, tve); in pnv_phb4_translate_tve()
1229 uint32_t tps = GETFIELD(IODA3_TVT_IO_PSIZE, tve); in pnv_phb4_translate_tve()
1287 is_write ? 'W' : 'R', tve); in pnv_phb4_translate_tve()
1300 is_write ? 'W' : 'R', tve); in pnv_phb4_translate_tve()
1320 uint64_t tve, cfg; in pnv_phb4_translate_iommu() local
1348 tve = ds->phb->ioda_TVT[ds->pe_num * 2 + tve_sel]; in pnv_phb4_translate_iommu()
1349 pnv_phb4_translate_tve(ds, addr, flag & IOMMU_WO, tve, &ret); in pnv_phb4_translate_iommu()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dtve.h127 void tvencoder_mode_set(struct sunxi_tve_reg * const tve, enum tve_mode mode);
128 void tvencoder_enable(struct sunxi_tve_reg * const tve);
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-mba53.dts135 tve {
234 &tve {
238 fsl,tve-mode = "vga";
H A Dimx53-qsb-common.dtsi327 &tve {
331 fsl,tve-mode = "vga";
H A Dimx53-qsb.dts109 &tve {
H A Dimx53.dtsi813 tve: tve@63ff0000 { label
814 compatible = "fsl,imx53-tve";
819 clock-names = "tve", "di_sel";
H A Dimx53-qsrb.dts147 &tve {
/openbmc/u-boot/arch/arm/dts/
H A Dsunxi-h3-h5.dtsi70 framebuffer-tve {
73 allwinner,pipeline = "mixer1-lcd1-tve";
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsunxi-h3-h5.dtsi71 framebuffer-tve {
74 allwinner,pipeline = "mixer1-lcd1-tve";
/openbmc/linux/
H A Dopengrok1.0.log[all...]