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Searched refs:timing_h (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/board/compulab/common/
H A Domap3_display.c51 .timing_h = DSS_HBP(48) | DSS_HFP(16) | DSS_HSW(96),
63 .timing_h = DSS_HBP(88) | DSS_HFP(40) | DSS_HSW(128),
75 .timing_h = DSS_HBP(160) | DSS_HFP(24) | DSS_HSW(136),
87 .timing_h = DSS_HBP(256) | DSS_HFP(64) | DSS_HSW(128),
99 .timing_h = DSS_HBP(312) | DSS_HFP(96) | DSS_HSW(112),
111 .timing_h = DSS_HBP(248) | DSS_HFP(48) | DSS_HSW(112),
123 .timing_h = DSS_HBP(2) | DSS_HFP(2) | DSS_HSW(2),
279 panel_cfg.timing_h |= DSS_HBP(num_val); in parse_setting()
282 panel_cfg.timing_h |= DSS_HFP(num_val); in parse_setting()
291 panel_cfg.timing_h |= DSS_HSW(num_val); in parse_setting()
/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_wp.c165 u32 timing_h = 0; in hdmi_wp_video_config_timing() local
170 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing()
171 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing()
172 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing()
173 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_H, timing_h); in hdmi_wp_video_config_timing()
H A Ddispc.c3027 u32 timing_h, timing_v, l; in _dispc_mgr_set_lcd_timings() local
3030 timing_h = FLD_VAL(hsw-1, dispc.feat->sw_start, 0) | in _dispc_mgr_set_lcd_timings()
3037 dispc_write_reg(DISPC_TIMING_H(channel), timing_h); in _dispc_mgr_set_lcd_timings()
/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_wp.c166 u32 timing_h = 0; in hdmi_wp_video_config_timing() local
181 timing_h |= FLD_VAL(vm->hback_porch, 31, 20); in hdmi_wp_video_config_timing()
182 timing_h |= FLD_VAL(vm->hfront_porch, 19, 8); in hdmi_wp_video_config_timing()
183 timing_h |= FLD_VAL(vm->hsync_len - hsync_len_offset, 7, 0); in hdmi_wp_video_config_timing()
184 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_H, timing_h); in hdmi_wp_video_config_timing()
H A Ddispc.c3154 u32 timing_h, timing_v, l; in _dispc_mgr_set_lcd_timings() local
3157 timing_h = FLD_VAL(vm->hsync_len - 1, dispc->feat->sw_start, 0) | in _dispc_mgr_set_lcd_timings()
3164 dispc_write_reg(dispc, DISPC_TIMING_H(channel), timing_h); in _dispc_mgr_set_lcd_timings()
/openbmc/u-boot/board/teejet/mt_ventoux/
H A Dmt_ventoux.c63 .timing_h = PANEL_TIMING_H(40, 5, 2),
74 .timing_h = PANEL_TIMING_H(20, 192, 4),
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Ddss.h67 u32 timing_h; /* 0x64 */ member
203 u32 timing_h; member
/openbmc/u-boot/drivers/video/
H A Domap3_dss.c110 writel(panel_cfg->timing_h, &dispc->timing_h); in omap3_dss_panel_config()
/openbmc/u-boot/board/htkw/mcx/
H A Dmcx.c112 .timing_h = PANEL_TIMING_H(40, 40, 48),
/openbmc/u-boot/board/ti/beagle/
H A Dbeagle.h521 .timing_h = 0x0ff03f31, /* Horizontal timing */
534 .timing_h = 0x1a4024c9, /* Horizontal timing */