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Searched refs:tcg_gen_smin_i64 (Results 1 – 9 of 9) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dgengvec64.c202 tcg_gen_smin_i64(res, t, max); in gen_suqadd_bhs()
286 tcg_gen_smin_i64(res, tmp, max); in gen_usqadd_bhs()
H A Dgengvec.c1426 tcg_gen_smin_i64(res, tmp, tcg_constant_i64(max)); in gen_sqadd_bhs()
1571 tcg_gen_smin_i64(res, tmp, tcg_constant_i64(max)); in gen_sqsub_bhs()
H A Dtranslate-sve.c1755 tcg_gen_smin_i64(reg, reg, tcg_constant_i64(ibound)); in TRANS_FEAT()
7193 tcg_gen_smin_i64(d, d, m); in gen_sclamp_i64()
H A Dtranslate-a64.c6835 TRANS(SMINV, do_int_reduction, a, false, MO_SIGN, tcg_gen_smin_i64) in TRANS()
/openbmc/qemu/include/tcg/
H A Dtcg-op.h258 #define tcg_gen_smin_tl tcg_gen_smin_i64
H A Dtcg-op-common.h257 void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
/openbmc/qemu/target/hexagon/
H A Dgenptr.c1383 tcg_gen_smin_i64(dest, source, max_val); in gen_sat_i64()
/openbmc/qemu/tcg/
H A Dtcg-op.c3122 void tcg_gen_smin_i64(TCGv_i64 ret, TCGv_i64 a, TCGv_i64 b) in tcg_gen_smin_i64() function
H A Dtcg-op-gvec.c2366 { .fni8 = tcg_gen_smin_i64, in tcg_gen_gvec_smin()