/openbmc/qemu/target/i386/tcg/ |
H A D | translate.c | 694 tcg_gen_ld32s_tl(dshift, tcg_env, offsetof(CPUX86State, df)); in gen_compute_Dshift() 732 gen_helper_inb(v, tcg_env, n); in gen_helper_in_func() 735 gen_helper_inw(v, tcg_env, n); in gen_helper_in_func() 738 gen_helper_inl(v, tcg_env, n); in gen_helper_in_func() 749 gen_helper_outb(tcg_env, v, n); in gen_helper_out_func() 752 gen_helper_outw(tcg_env, v, n); in gen_helper_out_func() 755 gen_helper_outl(tcg_env, v, n); in gen_helper_out_func() 778 gen_helper_check_io(tcg_env, port, tcg_constant_i32(1 << ot)); in gen_check_io() 787 gen_helper_svm_check_io(tcg_env, port, in gen_check_io() 1279 gen_helper_bpt_io(tcg_env, t_port, t_size, t_next); in gen_bpt_io() [all …]
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H A D | emit.c.inc | 213 tcg_gen_st8_tl(temp, tcg_env, dest_ofs); 217 tcg_gen_st16_tl(temp, tcg_env, dest_ofs); 221 tcg_gen_st32_tl(temp, tcg_env, dest_ofs); 264 tcg_gen_ld32u_tl(v, tcg_env, 271 gen_helper_read_cr8(v, tcg_env); 273 tcg_gen_ld_tl(v, tcg_env, offsetof(CPUX86State, cr[op->n])); 278 gen_helper_get_dr(v, tcg_env, tcg_constant_i32(op->n)); 342 tcg_gen_addi_ptr(op->v_ptr, tcg_env, vector_reg_offset(op)); 381 gen_helper_write_crN(tcg_env, tcg_constant_i32(op->n), v); 386 gen_helper_set_dr(tcg_env, tcg_constant_i32(op->n), v); [all …]
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/openbmc/qemu/target/mips/tcg/ |
H A D | translate.c | 1240 tcg_gen_ld_i32(t2, tcg_env, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_load_srsgpr() 1245 tcg_gen_add_ptr(addr, tcg_env, addr); in gen_load_srsgpr() 1260 tcg_gen_ld_i32(t2, tcg_env, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_store_srsgpr() 1265 tcg_gen_add_ptr(addr, tcg_env, addr); in gen_store_srsgpr() 1316 gen_helper_raise_exception_err(tcg_env, tcg_constant_i32(excp), in generate_exception_err() 1323 gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); in generate_exception() 1335 tcg_gen_st_i32(tcg_constant_i32(code), tcg_env, in generate_exception_break() 1844 gen_helper_r6_cmp_ ## fmt ## _af(fp0, tcg_env, fp0, fp1); \ 1847 gen_helper_r6_cmp_ ## fmt ## _un(fp0, tcg_env, fp0, fp1); \ 1850 gen_helper_r6_cmp_ ## fmt ## _eq(fp0, tcg_env, fp0, fp1); \ [all …]
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/openbmc/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_privileged.c.inc | 206 csr->readfn(dest, tcg_env); 208 tcg_gen_ld_tl(dest, tcg_env, csr->offset); 236 csr->writefn(dest, tcg_env, src1); 239 tcg_gen_ld_tl(dest, tcg_env, csr->offset); 240 tcg_gen_st_tl(src1, tcg_env, csr->offset); 275 tcg_gen_ld_tl(oldv, tcg_env, csr->offset); 281 csr->writefn(oldv, tcg_env, newv); 283 tcg_gen_st_tl(newv, tcg_env, csr->offset); 298 func(dest, tcg_env, src1); 311 func(tcg_env, addr, val); [all …]
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H A D | trans_fmov.c.inc | 25 tcg_gen_ld8u_tl(cond, tcg_env, offsetof(CPULoongArchState, cf[a->ca])); 97 tcg_gen_st32_i64(Rj, tcg_env, offsetof(CPULoongArchState, fcsr0)); 102 tcg_gen_ld_i32(fcsr0, tcg_env, offsetof(CPULoongArchState, fcsr0)); 107 tcg_gen_st_i32(fcsr0, tcg_env, offsetof(CPULoongArchState, fcsr0)); 115 gen_helper_set_rounding_mode(tcg_env); 130 tcg_gen_ld32u_i64(dest, tcg_env, offsetof(CPULoongArchState, fcsr0)); 165 tcg_gen_st8_tl(t0, tcg_env, offsetof(CPULoongArchState, cf[a->cd & 0x7])); 180 tcg_gen_ld8u_tl(dest, tcg_env, 199 tcg_gen_st8_tl(t0, tcg_env, offsetof(CPULoongArchState, cf[a->cd & 0x7])); 212 tcg_gen_ld8u_tl(gpr_dst(ctx, a->rd, EXT_NONE), tcg_env,
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/openbmc/qemu/tcg/ |
H A D | tcg-op-gvec.c | 136 tcg_gen_addi_ptr(a0, tcg_env, dofs); in tcg_gen_gvec_2_ool() 137 tcg_gen_addi_ptr(a1, tcg_env, aofs); in tcg_gen_gvec_2_ool() 157 tcg_gen_addi_ptr(a0, tcg_env, dofs); in tcg_gen_gvec_2i_ool() 158 tcg_gen_addi_ptr(a1, tcg_env, aofs); in tcg_gen_gvec_2i_ool() 178 tcg_gen_addi_ptr(a0, tcg_env, dofs); in tcg_gen_gvec_3_ool() 179 tcg_gen_addi_ptr(a1, tcg_env, aofs); in tcg_gen_gvec_3_ool() 180 tcg_gen_addi_ptr(a2, tcg_env, bofs); in tcg_gen_gvec_3_ool() 202 tcg_gen_addi_ptr(a0, tcg_env, dofs); in tcg_gen_gvec_4_ool() 203 tcg_gen_addi_ptr(a1, tcg_env, aofs); in tcg_gen_gvec_4_ool() 204 tcg_gen_addi_ptr(a2, tcg_env, bofs); in tcg_gen_gvec_4_ool() [all …]
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/openbmc/qemu/target/hexagon/ |
H A D | gen_tcg.h | 593 gen_helper_vacsh_pred(PeV, tcg_env, RxxV, RssV, RttV); \ 594 gen_helper_vacsh_val(RxxV, tcg_env, RxxV, RssV, RttV, \ 616 gen_helper_sfrecipa(tmp, tcg_env, RsV, RtV); \ 631 gen_helper_sfinvsqrta(tmp, tcg_env, RsV); \ 1207 gen_helper_conv_sf2df(RddV, tcg_env, RsV) 1209 gen_helper_conv_df2sf(RdV, tcg_env, RssV) 1211 gen_helper_conv_uw2sf(RdV, tcg_env, RsV) 1213 gen_helper_conv_uw2df(RddV, tcg_env, RsV) 1215 gen_helper_conv_w2sf(RdV, tcg_env, RsV) 1217 gen_helper_conv_w2df(RddV, tcg_env, RsV) [all …]
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H A D | translate.c | 119 gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); in gen_exception_raw() 470 gen_helper_debug_start_packet(tcg_env); in gen_start_packet() 643 gen_helper_debug_check_store_width(tcg_env, slot, check); in gen_check_store_width() 725 gen_helper_commit_store(tcg_env, slot); in process_store() 824 gen_helper_commit_hvx_stores(tcg_env); in gen_commit_hvx() 884 gen_helper_probe_hvx_stores(tcg_env, mem_idx); in gen_commit_packet() 913 gen_helper_probe_pkt_scalar_hvx_stores(tcg_env, in gen_commit_packet() 929 gen_helper_probe_pkt_scalar_store_s0(tcg_env, args_tcgv); in gen_commit_packet() 947 gen_helper_debug_commit_end(tcg_env, tcg_constant_tl(ctx->pkt->pc), in gen_commit_packet() 1112 hex_gpr[i] = tcg_global_mem_new(tcg_env, in hexagon_translate_init() [all …]
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/openbmc/qemu/target/s390x/tcg/ |
H A D | translate.c | 199 psw_addr = tcg_global_mem_new_i64(tcg_env, in s390x_translate_init() 202 psw_mask = tcg_global_mem_new_i64(tcg_env, in s390x_translate_init() 205 gbea = tcg_global_mem_new_i64(tcg_env, in s390x_translate_init() 209 cc_op = tcg_global_mem_new_i32(tcg_env, offsetof(CPUS390XState, cc_op), in s390x_translate_init() 211 cc_src = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_src), in s390x_translate_init() 213 cc_dst = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_dst), in s390x_translate_init() 215 cc_vr = tcg_global_mem_new_i64(tcg_env, offsetof(CPUS390XState, cc_vr), in s390x_translate_init() 220 regs[i] = tcg_global_mem_new(tcg_env, in s390x_translate_init() 290 tcg_gen_ld_i64(r, tcg_env, freg64_offset(reg)); in load_freg() 298 tcg_gen_ld32u_i64(r, tcg_env, freg32_offset(reg)); in load_freg32_i64() [all …]
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/openbmc/qemu/target/alpha/ |
H A D | translate.c | 136 cpu_std_ir[i] = tcg_global_mem_new_i64(tcg_env, in alpha_translate_init() 142 cpu_fir[i] = tcg_global_mem_new_i64(tcg_env, in alpha_translate_init() 151 cpu_pal_ir[r] = tcg_global_mem_new_i64(tcg_env, in alpha_translate_init() 160 *v->var = tcg_global_mem_new_i64(tcg_env, v->ofs, v->name); in alpha_translate_init() 249 tcg_gen_ld8u_i64(val, tcg_env, get_flag_ofs(shift)); in ld_flag_byte() 254 tcg_gen_st8_i64(val, tcg_env, get_flag_ofs(shift)); in st_flag_byte() 273 gen_helper_excp(tcg_env, tmp1, tmp2); in gen_excp_1() 576 tcg_gen_ld8u_i32(tmp, tcg_env, in gen_qual_roundmode() 585 tcg_gen_st8_i32(tmp, tcg_env, in gen_qual_roundmode() 605 tcg_gen_ld8u_i32(tmp, tcg_env, in gen_qual_flushzero() [all …]
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/openbmc/qemu/target/ppc/ |
H A D | translate.c | 94 cpu_crf[i] = tcg_global_mem_new_i32(tcg_env, in ppc_translate_init() 102 cpu_gpr[i] = tcg_global_mem_new(tcg_env, in ppc_translate_init() 107 cpu_gprh[i] = tcg_global_mem_new(tcg_env, in ppc_translate_init() 113 cpu_nip = tcg_global_mem_new(tcg_env, in ppc_translate_init() 116 cpu_msr = tcg_global_mem_new(tcg_env, in ppc_translate_init() 119 cpu_ctr = tcg_global_mem_new(tcg_env, in ppc_translate_init() 122 cpu_lr = tcg_global_mem_new(tcg_env, in ppc_translate_init() 126 cpu_cfar = tcg_global_mem_new(tcg_env, in ppc_translate_init() 130 cpu_xer = tcg_global_mem_new(tcg_env, in ppc_translate_init() 132 cpu_so = tcg_global_mem_new(tcg_env, in ppc_translate_init() [all …]
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/openbmc/qemu/target/sh4/ |
H A D | translate.c | 98 cpu_gregs[i] = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 104 cpu_pc = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 106 cpu_sr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 108 cpu_sr_m = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 110 cpu_sr_q = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 112 cpu_sr_t = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 114 cpu_ssr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 116 cpu_spc = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 118 cpu_gbr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() 120 cpu_vbr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init() [all …]
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/openbmc/qemu/target/ppc/translate/ |
H A D | storage-ctrl-impl.c.inc | 33 gen_helper_SLBIE(tcg_env, cpu_gpr[a->rb]); 47 gen_helper_SLBIEG(tcg_env, cpu_gpr[a->rb]); 61 gen_helper_SLBIA(tcg_env, tcg_constant_i32(a->ih)); 75 gen_helper_SLBIAG(tcg_env, cpu_gpr[a->rs], tcg_constant_i32(a->l)); 89 gen_helper_SLBMTE(tcg_env, cpu_gpr[a->rb], cpu_gpr[a->rt]); 103 gen_helper_SLBMFEV(cpu_gpr[a->rt], tcg_env, cpu_gpr[a->rb]); 117 gen_helper_SLBMFEE(cpu_gpr[a->rt], tcg_env, cpu_gpr[a->rb]); 140 gen_helper_SLBFEE(cpu_gpr[a->rt], tcg_env, 214 gen_helper_tlbie(tcg_env, t0); 222 gen_helper_tlbie_isa300(tcg_env, cpu_gpr[rb], cpu_gpr[a->rs], [all …]
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H A D | dfp-impl.c.inc | 6 tcg_gen_addi_ptr(r, tcg_env, offsetof(CPUPPCState, vsr[reg].u64[0])); 19 gen_helper_##NAME(tcg_env, rt, ra, rb); \ 35 tcg_env, ra, rb); \ 47 tcg_env, tcg_constant_i32(a->uim), rb);\ 59 tcg_env, ra, tcg_constant_i32(a->dm)); \ 71 gen_helper_##NAME(tcg_env, rt, rb, \ 89 gen_helper_##NAME(tcg_env, rt, ra, rb, \ 105 gen_helper_##NAME(tcg_env, rt, rb); \ 120 gen_helper_##NAME(tcg_env, rt, rx, \ 191 gen_helper_DCFFIXQQ(tcg_env, rt, rb); [all …]
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/openbmc/qemu/target/m68k/ |
H A D | translate.c | 71 QREG_##name = tcg_global_mem_new_i32(tcg_env, \ in m68k_tcg_init() 74 QREG_##name = tcg_global_mem_new_i64(tcg_env, \ in m68k_tcg_init() 80 cpu_halted = tcg_global_mem_new_i32(tcg_env, in m68k_tcg_init() 83 cpu_exception_index = tcg_global_mem_new_i32(tcg_env, in m68k_tcg_init() 91 cpu_dregs[i] = tcg_global_mem_new(tcg_env, in m68k_tcg_init() 95 cpu_aregs[i] = tcg_global_mem_new(tcg_env, in m68k_tcg_init() 101 cpu_macc[i] = tcg_global_mem_new_i64(tcg_env, in m68k_tcg_init() 106 NULL_QREG = tcg_global_mem_new(tcg_env, -4, "NULL"); in m68k_tcg_init() 107 store_dummy = tcg_global_mem_new(tcg_env, -8, "NULL"); in m68k_tcg_init() 265 gen_helper_raise_exception(tcg_env, tcg_constant_i32(nr)); in gen_raise_exception() [all …]
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/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvzfh.c.inc | 98 gen_helper_fmadd_h(dest, tcg_env, src1, src2, src3); 115 gen_helper_fmsub_h(dest, tcg_env, src1, src2, src3); 132 gen_helper_fnmsub_h(dest, tcg_env, src1, src2, src3); 149 gen_helper_fnmadd_h(dest, tcg_env, src1, src2, src3); 165 gen_helper_fadd_h(dest, tcg_env, src1, src2); 181 gen_helper_fsub_h(dest, tcg_env, src1, src2); 197 gen_helper_fmul_h(dest, tcg_env, src1, src2); 213 gen_helper_fdiv_h(dest, tcg_env, src1, src2); 228 gen_helper_fsqrt_h(dest, tcg_env, src1); 369 gen_helper_fmin_h(dest, tcg_env, src1, src2); [all …]
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H A D | trans_rvzfa.c.inc | 190 gen_helper_fminm_s(dest, tcg_env, src1, src2); 207 gen_helper_fmaxm_s(dest, tcg_env, src1, src2); 224 gen_helper_fminm_d(dest, tcg_env, src1, src2); 241 gen_helper_fmaxm_d(dest, tcg_env, src1, src2); 258 gen_helper_fminm_h(dest, tcg_env, src1, src2); 275 gen_helper_fmaxm_h(dest, tcg_env, src1, src2); 292 gen_helper_fround_s(dest, tcg_env, src1); 309 gen_helper_froundnx_s(dest, tcg_env, src1); 326 gen_helper_fround_d(dest, tcg_env, src1); 343 gen_helper_froundnx_d(dest, tcg_env, src1); [all …]
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H A D | trans_rvf.c.inc | 106 gen_helper_fmadd_s(dest, tcg_env, src1, src2, src3); 123 gen_helper_fmsub_s(dest, tcg_env, src1, src2, src3); 140 gen_helper_fnmsub_s(dest, tcg_env, src1, src2, src3); 157 gen_helper_fnmadd_s(dest, tcg_env, src1, src2, src3); 173 gen_helper_fadd_s(dest, tcg_env, src1, src2); 189 gen_helper_fsub_s(dest, tcg_env, src1, src2); 205 gen_helper_fmul_s(dest, tcg_env, src1, src2); 221 gen_helper_fdiv_s(dest, tcg_env, src1, src2); 236 gen_helper_fsqrt_s(dest, tcg_env, src1); 376 gen_helper_fmin_s(dest, tcg_env, src1, src2); [all …]
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H A D | trans_rvd.c.inc | 118 gen_helper_fmadd_d(dest, tcg_env, src1, src2, src3); 136 gen_helper_fmsub_d(dest, tcg_env, src1, src2, src3); 154 gen_helper_fnmsub_d(dest, tcg_env, src1, src2, src3); 172 gen_helper_fnmadd_d(dest, tcg_env, src1, src2, src3); 189 gen_helper_fadd_d(dest, tcg_env, src1, src2); 206 gen_helper_fsub_d(dest, tcg_env, src1, src2); 223 gen_helper_fmul_d(dest, tcg_env, src1, src2); 240 gen_helper_fdiv_d(dest, tcg_env, src1, src2); 256 gen_helper_fsqrt_d(dest, tcg_env, src1); 335 gen_helper_fmin_d(dest, tcg_env, src1, src2); [all …]
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H A D | trans_rvzicfiss.c.inc | 28 tcg_gen_ld_tl(addr, tcg_env, offsetof(CPURISCVState, ssp)); 35 tcg_env, offsetof(CPURISCVState, sw_check_code)); 36 gen_helper_raise_exception(tcg_env, 40 tcg_gen_st_tl(addr, tcg_env, offsetof(CPURISCVState, ssp)); 55 tcg_gen_ld_tl(addr, tcg_env, offsetof(CPURISCVState, ssp)); 59 tcg_gen_st_tl(addr, tcg_env, offsetof(CPURISCVState, ssp)); 71 tcg_gen_ld_tl(dest, tcg_env, offsetof(CPURISCVState, ssp));
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/openbmc/qemu/target/sparc/ |
H A D | translate.c | 249 tcg_gen_ld_i32(ret, tcg_env, gen_offset_fpr_F(src)); in gen_load_fpr_F() 255 tcg_gen_st_i32(v, tcg_env, gen_offset_fpr_F(dst)); in gen_store_fpr_F() 269 tcg_gen_ld_i64(ret, tcg_env, gen_offset_fpr_D(src)); in gen_load_fpr_D() 275 tcg_gen_st_i64(v, tcg_env, gen_offset_fpr_D(dst)); in gen_store_fpr_D() 634 gen_helper_sdiv(dst, tcg_env, src1, src2); in gen_op_sdiv() 638 gen_helper_sdiv(t64, tcg_env, src1, src2); in gen_op_sdiv() 653 gen_helper_udiv(t64, tcg_env, src1, src2); in gen_op_udivcc() 678 gen_helper_sdiv(t64, tcg_env, src1, src2); in gen_op_sdivcc() 695 gen_helper_taddcctv(dst, tcg_env, src1, src2); in gen_op_taddcctv() 700 gen_helper_tsubcctv(dst, tcg_env, src1, src2); in gen_op_tsubcctv() [all …]
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/openbmc/qemu/target/openrisc/ |
H A D | translate.c | 97 cpu_sr = tcg_global_mem_new(tcg_env, in openrisc_translate_init() 99 cpu_dflag = tcg_global_mem_new_i32(tcg_env, in openrisc_translate_init() 102 cpu_pc = tcg_global_mem_new(tcg_env, in openrisc_translate_init() 104 cpu_ppc = tcg_global_mem_new(tcg_env, in openrisc_translate_init() 106 jmp_pc = tcg_global_mem_new(tcg_env, in openrisc_translate_init() 108 cpu_sr_f = tcg_global_mem_new(tcg_env, in openrisc_translate_init() 110 cpu_sr_cy = tcg_global_mem_new(tcg_env, in openrisc_translate_init() 112 cpu_sr_ov = tcg_global_mem_new(tcg_env, in openrisc_translate_init() 114 cpu_lock_addr = tcg_global_mem_new(tcg_env, in openrisc_translate_init() 117 cpu_lock_value = tcg_global_mem_new(tcg_env, in openrisc_translate_init() [all …]
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/openbmc/qemu/target/loongarch/tcg/ |
H A D | translate.c | 54 tcg_gen_ld_i64(dest, tcg_env, in get_vreg64() 60 tcg_gen_st_i64(src, tcg_env, in set_vreg64() 96 gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); in generate_exception() 224 tcg_gen_ld_i64(t, tcg_env, in get_fpr() 231 tcg_gen_st_i64(val, tcg_env, in set_fpr() 351 cpu_gpr[i] = tcg_global_mem_new(tcg_env, in loongarch_translate_init() 356 cpu_pc = tcg_global_mem_new(tcg_env, offsetof(CPULoongArchState, pc), "pc"); in loongarch_translate_init() 357 cpu_lladdr = tcg_global_mem_new(tcg_env, in loongarch_translate_init() 359 cpu_llval = tcg_global_mem_new(tcg_env, in loongarch_translate_init()
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/openbmc/qemu/target/riscv/ |
H A D | translate.c | 250 gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp)); in generate_exception() 256 tcg_gen_st_i32(tcg_constant_i32(ctx->opcode), tcg_env, in gen_exception_illegal() 267 tcg_gen_st_tl(target, tcg_env, offsetof(CPURISCVState, badaddr)); in gen_exception_inst_addr_mis() 275 gen_helper_itrigger_match(tcg_env); in lookup_and_goto_ptr() 285 gen_helper_itrigger_match(tcg_env); in exit_tb() 642 tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); in mark_fs_dirty() 644 tcg_gen_st_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); in mark_fs_dirty() 647 tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus_hs)); in mark_fs_dirty() 649 tcg_gen_st_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus_hs)); in mark_fs_dirty() 671 tcg_gen_ld_tl(tmp, tcg_env, offsetof(CPURISCVState, mstatus)); in mark_vs_dirty() [all …]
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/openbmc/qemu/target/arm/tcg/ |
H A D | translate-m-nocp.c | 88 gen_helper_v7m_vlldm(tcg_env, fptr); in trans_VLLDM_VLSTM() 90 gen_helper_v7m_vlstm(tcg_env, fptr); in trans_VLLDM_VLSTM() 325 gen_helper_vfp_set_fpscr(tcg_env, tmp); in gen_M_fp_sysreg_write() 394 gen_helper_vfp_set_fpscr(tcg_env, tmp); in gen_M_fp_sysreg_write() 454 gen_helper_vfp_get_fpscr(tmp, tcg_env); in gen_M_fp_sysreg_read() 459 gen_helper_vfp_get_fpscr(tmp, tcg_env); in gen_M_fp_sysreg_read() 478 gen_helper_vfp_get_fpscr(tmp, tcg_env); in gen_M_fp_sysreg_read() 496 gen_helper_vfp_set_fpscr(tcg_env, fpscr); in gen_M_fp_sysreg_read() 531 gen_helper_vfp_get_fpscr(fpscr, tcg_env); in gen_M_fp_sysreg_read() 543 gen_helper_vfp_set_fpscr(tcg_env, fpscr); in gen_M_fp_sysreg_read() [all …]
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