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Searched refs:sys_reg (Results 1 – 25 of 45) sorted by relevance

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/openbmc/linux/arch/arm64/include/asm/
H A Dsysreg.h39 #define sys_reg(op0, op1, crn, crm, op2) \ macro
44 #define sys_insn sys_reg
170 #define SYS_SVCR_SMSTOP_SM_EL0 sys_reg(0, 3, 4, 2, 3)
171 #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
172 #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
174 #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
175 #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
176 #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
177 #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
178 #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
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H A Dapple_m1_pmu.h10 #define SYS_IMP_APL_PMC0_EL1 sys_reg(3, 2, 15, 0, 0)
11 #define SYS_IMP_APL_PMC1_EL1 sys_reg(3, 2, 15, 1, 0)
12 #define SYS_IMP_APL_PMC2_EL1 sys_reg(3, 2, 15, 2, 0)
13 #define SYS_IMP_APL_PMC3_EL1 sys_reg(3, 2, 15, 3, 0)
14 #define SYS_IMP_APL_PMC4_EL1 sys_reg(3, 2, 15, 4, 0)
15 #define SYS_IMP_APL_PMC5_EL1 sys_reg(3, 2, 15, 5, 0)
16 #define SYS_IMP_APL_PMC6_EL1 sys_reg(3, 2, 15, 6, 0)
17 #define SYS_IMP_APL_PMC7_EL1 sys_reg(3, 2, 15, 7, 0)
18 #define SYS_IMP_APL_PMC8_EL1 sys_reg(3, 2, 15, 9, 0)
19 #define SYS_IMP_APL_PMC9_EL1 sys_reg(3, 2, 15, 10, 0)
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H A Darm_dsu_pmu.h18 #define CLUSTERPMCR_EL1 sys_reg(3, 0, 15, 5, 0)
19 #define CLUSTERPMCNTENSET_EL1 sys_reg(3, 0, 15, 5, 1)
20 #define CLUSTERPMCNTENCLR_EL1 sys_reg(3, 0, 15, 5, 2)
21 #define CLUSTERPMOVSSET_EL1 sys_reg(3, 0, 15, 5, 3)
22 #define CLUSTERPMOVSCLR_EL1 sys_reg(3, 0, 15, 5, 4)
23 #define CLUSTERPMSELR_EL1 sys_reg(3, 0, 15, 5, 5)
24 #define CLUSTERPMINTENSET_EL1 sys_reg(3, 0, 15, 5, 6)
25 #define CLUSTERPMINTENCLR_EL1 sys_reg(3, 0, 15, 5, 7)
26 #define CLUSTERPMCCNTR_EL1 sys_reg(3, 0, 15, 6, 0)
27 #define CLUSTERPMXEVTYPER_EL1 sys_reg(3, 0, 15, 6, 1)
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H A Desr.h270 sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >> \
282 sys_reg(3, \
/openbmc/linux/tools/arch/arm64/include/asm/
H A Dsysreg.h36 #define sys_reg(op0, op1, crn, crm, op2) \ macro
41 #define sys_insn sys_reg
118 #define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
119 #define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
120 #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
121 #define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
122 #define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
123 #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
124 #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
125 #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
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/openbmc/linux/drivers/input/misc/
H A Diqs626a.c446 struct iqs626_sys_reg sys_reg; member
463 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; in iqs626_parse_events() local
473 thresh = sys_reg->ch_reg_ulp.thresh; in iqs626_parse_events()
474 hyst = &sys_reg->ch_reg_ulp.hyst; in iqs626_parse_events()
479 thresh = &sys_reg->tp_grp_reg.ch_reg_tp[0].thresh; in iqs626_parse_events()
480 hyst = &sys_reg->tp_grp_reg.hyst; in iqs626_parse_events()
487 thresh = sys_reg->ch_reg_gen[i].thresh; in iqs626_parse_events()
488 hyst = &sys_reg->ch_reg_gen[i].hyst; in iqs626_parse_events()
492 thresh = &sys_reg->ch_reg_hall.thresh; in iqs626_parse_events()
493 hyst = &sys_reg->ch_reg_hall.hyst; in iqs626_parse_events()
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H A Diqs269a.c288 struct iqs269_sys_reg sys_reg; member
301 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; in iqs269_ati_mode_set()
328 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; in iqs269_ati_mode_get()
347 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; in iqs269_ati_base_set()
392 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; in iqs269_ati_base_get()
427 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; in iqs269_ati_target_set()
454 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; in iqs269_ati_target_get()
518 iqs269->sys_reg.active |= BIT(reg); in iqs269_parse_chan()
520 iqs269->sys_reg.reseed |= BIT(reg); in iqs269_parse_chan()
523 iqs269->sys_reg.blocking |= BIT(reg); in iqs269_parse_chan()
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/openbmc/linux/tools/testing/selftests/kvm/include/aarch64/
H A Dgic_v3.h64 #define SYS_ICC_PMR_EL1 sys_reg(3, 0, 4, 6, 0)
65 #define SYS_ICC_IAR1_EL1 sys_reg(3, 0, 12, 12, 0)
66 #define SYS_ICC_EOIR1_EL1 sys_reg(3, 0, 12, 12, 1)
67 #define SYS_ICC_DIR_EL1 sys_reg(3, 0, 12, 11, 1)
68 #define SYS_ICC_CTLR_EL1 sys_reg(3, 0, 12, 12, 4)
69 #define SYS_ICC_SRE_EL1 sys_reg(3, 0, 12, 12, 5)
70 #define SYS_ICC_GRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
72 #define SYS_ICV_AP1R0_EL1 sys_reg(3, 0, 12, 9, 0)
/openbmc/u-boot/arch/arm/mach-rockchip/
H A Dsdram_common.c21 u32 sys_reg = readl(reg); in rockchip_sdram_size() local
22 u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT) in rockchip_sdram_size()
25 debug("%s %x %x\n", __func__, (u32)reg, sys_reg); in rockchip_sdram_size()
27 rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) & in rockchip_sdram_size()
29 col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK); in rockchip_sdram_size()
30 bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK); in rockchip_sdram_size()
31 cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) & in rockchip_sdram_size()
33 cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) & in rockchip_sdram_size()
35 bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) & in rockchip_sdram_size()
37 row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) & in rockchip_sdram_size()
/openbmc/linux/arch/arm64/kvm/
H A Demulate-nested.c486 sys_reg(3, 0, 0, 7, 7), CGT_HCR_TID3),
490 SR_RANGE_TRAP(sys_reg(3, 0, 11, 0, 0),
491 sys_reg(3, 0, 11, 15, 7), CGT_HCR_TIDCP),
492 SR_RANGE_TRAP(sys_reg(3, 1, 11, 0, 0),
493 sys_reg(3, 1, 11, 15, 7), CGT_HCR_TIDCP),
494 SR_RANGE_TRAP(sys_reg(3, 2, 11, 0, 0),
495 sys_reg(3, 2, 11, 15, 7), CGT_HCR_TIDCP),
496 SR_RANGE_TRAP(sys_reg(3, 3, 11, 0, 0),
497 sys_reg(3, 3, 11, 15, 7), CGT_HCR_TIDCP),
498 SR_RANGE_TRAP(sys_reg(3, 4, 11, 0, 0),
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/openbmc/linux/tools/testing/selftests/kvm/aarch64/
H A Daarch32_id_regs.c43 GUEST_ASSERT_REG_RAZ(sys_reg(3, 0, 0, 3, 3)); in guest_main()
47 GUEST_ASSERT_REG_RAZ(sys_reg(3, 0, 0, 3, 7)); in guest_main()
116 KVM_ARM64_SYS_REG(sys_reg(3, 0, 0, 3, 3)),
118 KVM_ARM64_SYS_REG(sys_reg(3, 0, 0, 3, 7)),
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3188.c536 u32 sys_reg = 0; in dram_all_config() local
538 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
539 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
544 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
545 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan); in dram_all_config()
546 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan); in dram_all_config()
547 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan); in dram_all_config()
548 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan); in dram_all_config()
549 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan); in dram_all_config()
550 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan); in dram_all_config()
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H A Dsdram_rk322x.c581 u32 sys_reg = 0; in dram_all_config() local
583 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
584 sys_reg |= (1 - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
585 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(0); in dram_all_config()
586 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(0); in dram_all_config()
587 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(0); in dram_all_config()
588 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(0); in dram_all_config()
589 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(0); in dram_all_config()
590 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(0); in dram_all_config()
591 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(0); in dram_all_config()
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H A Ddmc-rk3368.c774 u32 sys_reg = 0; in dram_all_config() local
777 sys_reg |= DDR3 << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
778 sys_reg |= 0 << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
780 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
781 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan); in dram_all_config()
782 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan); in dram_all_config()
783 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan); in dram_all_config()
784 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan); in dram_all_config()
785 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan); in dram_all_config()
786 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan); in dram_all_config()
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H A Dsdram_rk3288.c593 u32 sys_reg = 0; in dram_all_config() local
595 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
596 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
601 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
602 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan); in dram_all_config()
603 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan); in dram_all_config()
604 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan); in dram_all_config()
605 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan); in dram_all_config()
606 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan); in dram_all_config()
607 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan); in dram_all_config()
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H A Dsdram_rk3399.c934 u32 sys_reg = 0; in dram_all_config() local
937 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
938 sys_reg |= (sdram_params->base.num_channels - 1) in dram_all_config()
951 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(channel); in dram_all_config()
952 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(channel); in dram_all_config()
953 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(channel); in dram_all_config()
954 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(channel); in dram_all_config()
955 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(channel); in dram_all_config()
956 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(channel); in dram_all_config()
957 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(channel); in dram_all_config()
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/openbmc/linux/drivers/soc/qcom/
H A Dkryo-l2-accessors.c11 #define L2CPUSRSELR_EL1 sys_reg(3, 3, 15, 0, 6)
12 #define L2CPUSRDR_EL1 sys_reg(3, 3, 15, 0, 7)
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dpmu_rk3288.h49 u32 sys_reg[4]; member
51 check_member(rk3288_pmu, sys_reg[3], 0x00a0);
H A Dpmu_rk3188.h28 u32 sys_reg[4]; member
/openbmc/linux/drivers/irqchip/
H A Dirq-apple-aic.c167 #define SYS_IMP_APL_IPI_RR_LOCAL_EL1 sys_reg(3, 5, 15, 0, 0)
168 #define SYS_IMP_APL_IPI_RR_GLOBAL_EL1 sys_reg(3, 5, 15, 0, 1)
179 #define SYS_IMP_APL_IPI_SR_EL1 sys_reg(3, 5, 15, 1, 1)
183 #define SYS_IMP_APL_VM_TMR_FIQ_ENA_EL2 sys_reg(3, 5, 15, 1, 3)
188 #define SYS_IMP_APL_IPI_CR_EL1 sys_reg(3, 5, 15, 3, 1)
191 #define SYS_IMP_APL_UPMCR0_EL1 sys_reg(3, 7, 15, 0, 4)
199 #define SYS_IMP_APL_UPMSR_EL1 sys_reg(3, 7, 15, 6, 4)
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20-tamonten.dtsi344 vin-sm0-supply = <&sys_reg>;
345 vin-sm1-supply = <&sys_reg>;
346 vin-sm2-supply = <&sys_reg>;
354 sys_reg: sys { label
H A Dtegra20-paz00.dts347 vin-sm0-supply = <&sys_reg>;
348 vin-sm1-supply = <&sys_reg>;
349 vin-sm2-supply = <&sys_reg>;
357 sys_reg: sys { label
H A Dtegra20-ventana.dts429 vin-sm0-supply = <&sys_reg>;
430 vin-sm1-supply = <&sys_reg>;
431 vin-sm2-supply = <&sys_reg>;
439 sys_reg: sys { label
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-tamonten.dtsi322 vin-sm0-supply = <&sys_reg>;
323 vin-sm1-supply = <&sys_reg>;
324 vin-sm2-supply = <&sys_reg>;
332 sys_reg: sys { label
/openbmc/linux/arch/arm64/kernel/
H A Dcpufeature.c144 .sys_reg = SYS_##reg, \
895 static void init_cpu_ftr_reg(u32 sys_reg, u64 new) in init_cpu_ftr_reg() argument
903 struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg); in init_cpu_ftr_reg()
1455 return read_sanitised_ftr_reg(entry->sys_reg); in read_scoped_sysreg()
1457 return __read_sysreg_by_encoding(entry->sys_reg); in read_scoped_sysreg()
1467 regp = get_arm64_ftr_reg(entry->sys_reg); in has_user_cpuid_feature()
2067 boot_val = cpuid_feature_extract_field(read_sanitised_ftr_reg(entry->sys_reg), in has_address_auth_cpucap()
2072 sec_val = cpuid_feature_extract_field(__read_sysreg_by_encoding(entry->sys_reg), in has_address_auth_cpucap()
3515 int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt) in do_emulate_mrs() argument
3520 rc = emulate_sys_reg(sys_reg, &val); in do_emulate_mrs()
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