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/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Dia_css_isp_params.c72 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
76 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
78 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
82 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
92 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
99 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
102 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
109 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
113 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
127 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr2() argument
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H A Dsh_css_sp.c124 unsigned int stage) in store_sp_stage_data() argument
132 sh_css_store_isp_stage_to_ddr(pipe_num, stage); in store_sp_stage_data()
133 sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = in store_sp_stage_data()
134 sh_css_store_sp_stage_to_ddr(pipe_num, stage); in store_sp_stage_data()
806 is_sp_stage(struct ia_css_pipeline_stage *stage) in is_sp_stage() argument
808 assert(stage); in is_sp_stage()
809 return stage->sp_func != IA_CSS_PIPELINE_NO_FUNC; in is_sp_stage()
914 unsigned int stage, in sh_css_sp_init_stage() argument
952 sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = mmgr_NULL; in sh_css_sp_init_stage()
959 sh_css_sp_stage.deinterleaved = ((stage == 0) && continuous); in sh_css_sp_init_stage()
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/openbmc/linux/drivers/staging/media/atomisp/pci/runtime/pipeline/src/
H A Dpipeline.c49 static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage);
274 struct ia_css_pipeline_stage **stage) in ia_css_pipeline_create_and_add_stage() argument
327 if (stage) in ia_css_pipeline_create_and_add_stage()
328 *stage = new_stage; in ia_css_pipeline_create_and_add_stage()
339 struct ia_css_pipeline_stage *stage; in ia_css_pipeline_finalize_stages() local
342 for (stage = pipeline->stages; stage; stage = stage->next) { in ia_css_pipeline_finalize_stages()
343 stage->stage_num = i; in ia_css_pipeline_finalize_stages()
354 struct ia_css_pipeline_stage **stage) in ia_css_pipeline_get_stage() argument
359 assert(stage); in ia_css_pipeline_get_stage()
364 *stage = s; in ia_css_pipeline_get_stage()
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/openbmc/linux/arch/riscv/errata/thead/
H A Derrata.c20 static bool errata_probe_pbmt(unsigned int stage, in errata_probe_pbmt() argument
29 if (stage == RISCV_ALTERNATIVES_EARLY_BOOT || in errata_probe_pbmt()
30 stage == RISCV_ALTERNATIVES_MODULE) in errata_probe_pbmt()
36 static bool errata_probe_cmo(unsigned int stage, in errata_probe_cmo() argument
45 if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) in errata_probe_cmo()
48 if (stage == RISCV_ALTERNATIVES_BOOT) { in errata_probe_cmo()
56 static bool errata_probe_pmu(unsigned int stage, in errata_probe_pmu() argument
66 if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) in errata_probe_pmu()
72 static u32 thead_errata_probe(unsigned int stage, in thead_errata_probe() argument
77 if (errata_probe_pbmt(stage, archid, impid)) in thead_errata_probe()
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/openbmc/linux/arch/powerpc/crypto/
H A Daesp10-ppc.pl122 my ($stage,$outperm,$outmask,$outhead,$outtail)=map("v$_",(7..11));
204 vsel $stage,$outhead,$outtail,$outmask
207 stvx $stage,0,$out
224 vsel $stage,$outhead,$outtail,$outmask
227 stvx $stage,0,$out
241 vsel $stage,$outhead,$outtail,$outmask
244 stvx $stage,0,$out
254 vsel $stage,$outhead,$outtail,$outmask
256 stvx $stage,0,$out
269 vsel $stage,$outhead,$outtail,$outmask
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/openbmc/linux/tools/testing/selftests/kvm/s390x/
H A Dtprot.c63 enum stage { enum
73 enum stage stage; member
139 static enum stage perform_next_stage(int *i, bool mapped_0) in perform_next_stage()
141 enum stage stage = tests[*i].stage; in perform_next_stage() local
145 for (; tests[*i].stage == stage; (*i)++) { in perform_next_stage()
163 return stage; in perform_next_stage()
185 #define HOST_SYNC_NO_TAP(vcpup, stage) \ argument
189 int __stage = (stage); \
199 #define HOST_SYNC(vcpu, stage) \ argument
201 HOST_SYNC_NO_TAP(vcpu, stage); \
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/openbmc/linux/drivers/watchdog/
H A Dkempld_wdt.c77 struct kempld_wdt_stage stage[KEMPLD_WDT_MAX_STAGES]; member
103 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_action() argument
109 if (!stage || !stage->mask) in kempld_wdt_set_stage_action()
113 stage_cfg = kempld_read8(pld, KEMPLD_WDT_STAGE_CFG(stage->id)); in kempld_wdt_set_stage_action()
122 kempld_write8(pld, KEMPLD_WDT_STAGE_CFG(stage->id), stage_cfg); in kempld_wdt_set_stage_action()
129 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_timeout() argument
141 if (!stage) in kempld_wdt_set_stage_timeout()
149 if (stage_timeout64 > stage->mask) in kempld_wdt_set_stage_timeout()
152 stage_timeout = stage_timeout64 & stage->mask; in kempld_wdt_set_stage_timeout()
155 stage_cfg = kempld_read8(pld, KEMPLD_WDT_STAGE_CFG(stage->id)); in kempld_wdt_set_stage_timeout()
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/openbmc/linux/drivers/thermal/qcom/
H A Dqcom-spmi-temp-alarm.c76 unsigned int stage; member
116 static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage) in qpnp_tm_decode_temp() argument
118 if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 || in qpnp_tm_decode_temp()
119 stage > STAGE_COUNT) in qpnp_tm_decode_temp()
122 return (*chip->temp_map)[chip->thresh][stage - 1]; in qpnp_tm_decode_temp()
154 unsigned int stage, stage_new, stage_old; in qpnp_tm_update_temp_no_adc() local
162 stage = ret; in qpnp_tm_update_temp_no_adc()
165 stage_new = stage; in qpnp_tm_update_temp_no_adc()
166 stage_old = chip->stage; in qpnp_tm_update_temp_no_adc()
168 stage_new = alarm_state_map[stage]; in qpnp_tm_update_temp_no_adc()
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/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dhyperv_ipi.c92 int stage = 1, ipis_expected[2] = {0}; in sender_guest_code() local
95 GUEST_SYNC(stage++); in sender_guest_code()
109 GUEST_SYNC(stage++); in sender_guest_code()
116 GUEST_SYNC(stage++); in sender_guest_code()
129 GUEST_SYNC(stage++); in sender_guest_code()
138 GUEST_SYNC(stage++); in sender_guest_code()
151 GUEST_SYNC(stage++); in sender_guest_code()
160 GUEST_SYNC(stage++); in sender_guest_code()
174 GUEST_SYNC(stage++); in sender_guest_code()
183 GUEST_SYNC(stage++); in sender_guest_code()
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H A Dset_boot_cpu_id.c48 int stage; in run_vcpu() local
50 for (stage = 0; stage < 2; stage++) { in run_vcpu()
57 uc.args[1] == stage + 1, in run_vcpu()
59 stage + 1, (ulong)uc.args[1]); in run_vcpu()
63 TEST_ASSERT(stage == 1, in run_vcpu()
65 stage); in run_vcpu()
H A Dhyperv_tlb_flush.c207 int i, stage = 1; in sender_guest_code() local
214 GUEST_SYNC(stage++); in sender_guest_code()
226 GUEST_SYNC(stage++); in sender_guest_code()
240 GUEST_SYNC(stage++); in sender_guest_code()
253 GUEST_SYNC(stage++); in sender_guest_code()
268 GUEST_SYNC(stage++); in sender_guest_code()
283 GUEST_SYNC(stage++); in sender_guest_code()
301 GUEST_SYNC(stage++); in sender_guest_code()
319 GUEST_SYNC(stage++); in sender_guest_code()
340 GUEST_SYNC(stage++); in sender_guest_code()
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H A Dvmx_preemption_timer_test.c163 int stage; in main() local
181 for (stage = 1;; stage++) { in main()
199 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", in main()
200 stage, (ulong)uc.args[1]); in main()
209 if (stage == 2) { in main()
212 stage, uc.args[2], uc.args[3]); in main()
215 stage, uc.args[4], uc.args[5]); in main()
219 stage, uc.args[2], uc.args[3]); in main()
223 stage, uc.args[4], uc.args[5]); in main()
H A Dhyperv_clock.c212 int stage; in main() local
226 for (stage = 1;; stage++) { in main()
238 TEST_ASSERT(stage == 11, "Testing ended prematurely, stage %d\n", in main()
239 stage); in main()
246 uc.args[1] == stage, in main()
248 stage, (ulong)uc.args[1]); in main()
251 if (stage == 7 || stage == 8 || stage == 10) { in main()
H A Dsmm_test.c137 int stage, stage_reported; in main() local
167 for (stage = 1;; stage++) { in main()
179 TEST_ASSERT(stage_reported == stage || in main()
182 stage, stage_reported); in main()
188 if (stage == 8) { in main()
197 if (stage == 10) in main()
/openbmc/linux/tools/testing/selftests/kvm/aarch64/
H A Dhypercalls.c50 static int stage = TEST_STAGE_REG_IFACE; variable
104 switch (stage) { in guest_test_hvc()
109 res.a0, hc_info->func_id, hc_info->arg1, stage); in guest_test_hvc()
114 res.a0, hc_info->func_id, hc_info->arg1, stage); in guest_test_hvc()
117 GUEST_FAIL("Unexpected stage = %u", stage); in guest_test_hvc()
124 while (stage != TEST_STAGE_END) { in guest_code()
125 switch (stage) { in guest_code()
136 GUEST_FAIL("Unexpected stage = %u", stage); in guest_code()
139 GUEST_SYNC(stage); in guest_code()
247 int prev_stage = stage; in test_guest_stage()
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/sblim-sfcb/sblim-sfcb/
H A Dsblim-sfcb-1.4.5-service.patch20 …test -d $(DESTDIR)$(sfcbstatedir)/stage/mofs/root/interop || $(mkdir_p) $(DESTDIR)$(sfcbstatedir)/…
21 test -d $(DESTDIR)$(sfcbstatedir)/stage/regs || $(mkdir_p) $(DESTDIR)$(sfcbstatedir)/stage/regs
24 rm -f $(DESTDIR)$(sfcbstatedir)/stage/default.reg
25 rm -f $(DESTDIR)$(sfcbstatedir)/stage/mofs/root/interop/10_interop.mof
27 @INDICATIONS_TRUE@ rm -f $(DESTDIR)$(sfcbstatedir)/stage/mofs/root/interop/20_indication.mof
28 @INDICATIONS_TRUE@ rm -f $(DESTDIR)$(sfcbstatedir)/stage/mofs/indication.mof
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_lm.c39 static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage) in _stage_offset() argument
42 if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) in _stage_offset()
43 return sblk->blendstage_base[stage - DPU_STAGE_0]; in _stage_offset()
95 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config_combined_alpha() argument
101 if (stage == DPU_STAGE_BASE) in dpu_hw_lm_setup_blend_config_combined_alpha()
104 stage_off = _stage_offset(ctx, stage); in dpu_hw_lm_setup_blend_config_combined_alpha()
114 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config() argument
119 if (stage == DPU_STAGE_BASE) in dpu_hw_lm_setup_blend_config()
122 stage_off = _stage_offset(ctx, stage); in dpu_hw_lm_setup_blend_config()
/openbmc/linux/Documentation/leds/
H A Dleds-sc27xx.rst16 for the high stage. To be compatible with the hardware pattern
17 format, we should set brightness as 0 for rise stage, fall
18 stage and low stage.
20 - Min stage duration: 125 ms
21 - Max stage duration: 31875 ms
23 Since the stage duration step is 125 ms, the duration should be
/openbmc/linux/tools/testing/selftests/tc-testing/plugin-lib/
H A DnsPlugin.py45 def adjust_command(self, stage, command): argument
46 super().adjust_command(stage, command)
61 if stage == 'setup' or stage == 'execute' or stage == 'verify' or stage == 'teardown':
63 …nd: stage is {}; inserting netns stuff in command [{}] list [{}]'.format(stage, command, cmdlist))
121 def _exec_cmd(self, stage, command): argument
129 self.adjust_command(stage, command)
/openbmc/boost-dbus/
H A DJenkinsfile2 stage 'Debug Build'
9 stage 'Debug Test'
13 stage 'Release Build'
20 stage 'Release Test'
/openbmc/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_ctl.c289 enum mdp_mixer_stage_id stage) in mdp_ctl_blend_mask() argument
292 case SSPP_VIG0: return MDP5_CTL_LAYER_REG_VIG0(stage); in mdp_ctl_blend_mask()
293 case SSPP_VIG1: return MDP5_CTL_LAYER_REG_VIG1(stage); in mdp_ctl_blend_mask()
294 case SSPP_VIG2: return MDP5_CTL_LAYER_REG_VIG2(stage); in mdp_ctl_blend_mask()
295 case SSPP_RGB0: return MDP5_CTL_LAYER_REG_RGB0(stage); in mdp_ctl_blend_mask()
296 case SSPP_RGB1: return MDP5_CTL_LAYER_REG_RGB1(stage); in mdp_ctl_blend_mask()
297 case SSPP_RGB2: return MDP5_CTL_LAYER_REG_RGB2(stage); in mdp_ctl_blend_mask()
298 case SSPP_DMA0: return MDP5_CTL_LAYER_REG_DMA0(stage); in mdp_ctl_blend_mask()
299 case SSPP_DMA1: return MDP5_CTL_LAYER_REG_DMA1(stage); in mdp_ctl_blend_mask()
300 case SSPP_VIG3: return MDP5_CTL_LAYER_REG_VIG3(stage); in mdp_ctl_blend_mask()
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/openbmc/qemu/block/
H A Dreplication.c37 ReplicationStage stage; member
145 if (s->stage == BLOCK_REPLICATION_RUNNING) { in replication_close()
148 if (s->stage == BLOCK_REPLICATION_FAILOVER) { in replication_close()
190 switch (s->stage) { in replication_get_io_status()
422 if (s->stage != BLOCK_REPLICATION_FAILOVER) { in backup_job_completed()
465 if (s->stage == BLOCK_REPLICATION_DONE || in replication_start()
466 s->stage == BLOCK_REPLICATION_FAILOVER) { in replication_start()
475 if (s->stage != BLOCK_REPLICATION_NONE) { in replication_start()
601 s->stage = BLOCK_REPLICATION_RUNNING; in replication_start()
615 if (s->stage == BLOCK_REPLICATION_DONE || in replication_do_checkpoint()
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/openbmc/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_kms.h96 enum mdp4_pipe pipe, enum mdp_mixer_stage_id stage) in mixercfg() argument
102 mixer_cfg |= MDP4_LAYERMIXER_IN_CFG_PIPE0(stage) | in mixercfg()
108 mixer_cfg |= MDP4_LAYERMIXER_IN_CFG_PIPE1(stage) | in mixercfg()
114 mixer_cfg |= MDP4_LAYERMIXER_IN_CFG_PIPE2(stage) | in mixercfg()
120 mixer_cfg |= MDP4_LAYERMIXER_IN_CFG_PIPE3(stage) | in mixercfg()
126 mixer_cfg |= MDP4_LAYERMIXER_IN_CFG_PIPE4(stage) | in mixercfg()
132 mixer_cfg |= MDP4_LAYERMIXER_IN_CFG_PIPE5(stage) | in mixercfg()
138 mixer_cfg |= MDP4_LAYERMIXER_IN_CFG_PIPE6(stage) | in mixercfg()
/openbmc/linux/arch/riscv/errata/andes/
H A Derrata.c41 static void errata_probe_iocp(unsigned int stage, unsigned long arch_id, unsigned long impid) in errata_probe_iocp() argument
66 unsigned int stage) in andes_errata_patch_func() argument
68 if (stage == RISCV_ALTERNATIVES_BOOT) in andes_errata_patch_func()
69 errata_probe_iocp(stage, archid, impid); in andes_errata_patch_func()
/openbmc/u-boot/arch/arm/mach-bcmstb/
H A DKconfig8 is acting as the second stage bootloader, and U-Boot is
9 acting as the third stage bootloader (TSBL), loaded by BOLT.
16 is acting as the second stage bootloader, and U-Boot is
17 acting as the third stage bootloader (TSBL), loaded by BOLT.
36 hex "Address to which the prior stage provided DTB will be copied"

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