xref: /openbmc/linux/tools/testing/selftests/kvm/aarch64/hypercalls.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
15ca24697SRaghavendra Rao Ananta // SPDX-License-Identifier: GPL-2.0-only
25ca24697SRaghavendra Rao Ananta 
35ca24697SRaghavendra Rao Ananta /* hypercalls: Check the ARM64's psuedo-firmware bitmap register interface.
45ca24697SRaghavendra Rao Ananta  *
55ca24697SRaghavendra Rao Ananta  * The test validates the basic hypercall functionalities that are exposed
65ca24697SRaghavendra Rao Ananta  * via the psuedo-firmware bitmap register. This includes the registers'
75ca24697SRaghavendra Rao Ananta  * read/write behavior before and after the VM has started, and if the
85ca24697SRaghavendra Rao Ananta  * hypercalls are properly masked or unmasked to the guest when disabled or
95ca24697SRaghavendra Rao Ananta  * enabled from the KVM userspace, respectively.
105ca24697SRaghavendra Rao Ananta  */
115ca24697SRaghavendra Rao Ananta #include <errno.h>
125ca24697SRaghavendra Rao Ananta #include <linux/arm-smccc.h>
135ca24697SRaghavendra Rao Ananta #include <asm/kvm.h>
145ca24697SRaghavendra Rao Ananta #include <kvm_util.h>
155ca24697SRaghavendra Rao Ananta 
165ca24697SRaghavendra Rao Ananta #include "processor.h"
175ca24697SRaghavendra Rao Ananta 
185ca24697SRaghavendra Rao Ananta #define FW_REG_ULIMIT_VAL(max_feat_bit) (GENMASK(max_feat_bit, 0))
195ca24697SRaghavendra Rao Ananta 
205ca24697SRaghavendra Rao Ananta /* Last valid bits of the bitmapped firmware registers */
215ca24697SRaghavendra Rao Ananta #define KVM_REG_ARM_STD_BMAP_BIT_MAX		0
225ca24697SRaghavendra Rao Ananta #define KVM_REG_ARM_STD_HYP_BMAP_BIT_MAX	0
235ca24697SRaghavendra Rao Ananta #define KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_MAX	1
245ca24697SRaghavendra Rao Ananta 
255ca24697SRaghavendra Rao Ananta struct kvm_fw_reg_info {
265ca24697SRaghavendra Rao Ananta 	uint64_t reg;		/* Register definition */
275ca24697SRaghavendra Rao Ananta 	uint64_t max_feat_bit;	/* Bit that represents the upper limit of the feature-map */
285ca24697SRaghavendra Rao Ananta };
295ca24697SRaghavendra Rao Ananta 
305ca24697SRaghavendra Rao Ananta #define FW_REG_INFO(r)			\
315ca24697SRaghavendra Rao Ananta 	{					\
325ca24697SRaghavendra Rao Ananta 		.reg = r,			\
335ca24697SRaghavendra Rao Ananta 		.max_feat_bit = r##_BIT_MAX,	\
345ca24697SRaghavendra Rao Ananta 	}
355ca24697SRaghavendra Rao Ananta 
365ca24697SRaghavendra Rao Ananta static const struct kvm_fw_reg_info fw_reg_info[] = {
375ca24697SRaghavendra Rao Ananta 	FW_REG_INFO(KVM_REG_ARM_STD_BMAP),
385ca24697SRaghavendra Rao Ananta 	FW_REG_INFO(KVM_REG_ARM_STD_HYP_BMAP),
395ca24697SRaghavendra Rao Ananta 	FW_REG_INFO(KVM_REG_ARM_VENDOR_HYP_BMAP),
405ca24697SRaghavendra Rao Ananta };
415ca24697SRaghavendra Rao Ananta 
425ca24697SRaghavendra Rao Ananta enum test_stage {
435ca24697SRaghavendra Rao Ananta 	TEST_STAGE_REG_IFACE,
445ca24697SRaghavendra Rao Ananta 	TEST_STAGE_HVC_IFACE_FEAT_DISABLED,
455ca24697SRaghavendra Rao Ananta 	TEST_STAGE_HVC_IFACE_FEAT_ENABLED,
465ca24697SRaghavendra Rao Ananta 	TEST_STAGE_HVC_IFACE_FALSE_INFO,
475ca24697SRaghavendra Rao Ananta 	TEST_STAGE_END,
485ca24697SRaghavendra Rao Ananta };
495ca24697SRaghavendra Rao Ananta 
505ca24697SRaghavendra Rao Ananta static int stage = TEST_STAGE_REG_IFACE;
515ca24697SRaghavendra Rao Ananta 
525ca24697SRaghavendra Rao Ananta struct test_hvc_info {
535ca24697SRaghavendra Rao Ananta 	uint32_t func_id;
545ca24697SRaghavendra Rao Ananta 	uint64_t arg1;
555ca24697SRaghavendra Rao Ananta };
565ca24697SRaghavendra Rao Ananta 
575ca24697SRaghavendra Rao Ananta #define TEST_HVC_INFO(f, a1)	\
585ca24697SRaghavendra Rao Ananta 	{			\
595ca24697SRaghavendra Rao Ananta 		.func_id = f,	\
605ca24697SRaghavendra Rao Ananta 		.arg1 = a1,	\
615ca24697SRaghavendra Rao Ananta 	}
625ca24697SRaghavendra Rao Ananta 
635ca24697SRaghavendra Rao Ananta static const struct test_hvc_info hvc_info[] = {
645ca24697SRaghavendra Rao Ananta 	/* KVM_REG_ARM_STD_BMAP */
655ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_TRNG_VERSION, 0),
665ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_TRNG_FEATURES, ARM_SMCCC_TRNG_RND64),
675ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_TRNG_GET_UUID, 0),
685ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_TRNG_RND32, 0),
695ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_TRNG_RND64, 0),
705ca24697SRaghavendra Rao Ananta 
715ca24697SRaghavendra Rao Ananta 	/* KVM_REG_ARM_STD_HYP_BMAP */
725ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_HV_PV_TIME_FEATURES),
735ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_HV_PV_TIME_FEATURES, ARM_SMCCC_HV_PV_TIME_ST),
745ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_HV_PV_TIME_ST, 0),
755ca24697SRaghavendra Rao Ananta 
765ca24697SRaghavendra Rao Ananta 	/* KVM_REG_ARM_VENDOR_HYP_BMAP */
775ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID,
785ca24697SRaghavendra Rao Ananta 			ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID),
795ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID, 0),
805ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID, KVM_PTP_VIRT_COUNTER),
815ca24697SRaghavendra Rao Ananta };
825ca24697SRaghavendra Rao Ananta 
835ca24697SRaghavendra Rao Ananta /* Feed false hypercall info to test the KVM behavior */
845ca24697SRaghavendra Rao Ananta static const struct test_hvc_info false_hvc_info[] = {
855ca24697SRaghavendra Rao Ananta 	/* Feature support check against a different family of hypercalls */
865ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_TRNG_FEATURES, ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID),
875ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, ARM_SMCCC_TRNG_RND64),
885ca24697SRaghavendra Rao Ananta 	TEST_HVC_INFO(ARM_SMCCC_HV_PV_TIME_FEATURES, ARM_SMCCC_TRNG_RND64),
895ca24697SRaghavendra Rao Ananta };
905ca24697SRaghavendra Rao Ananta 
guest_test_hvc(const struct test_hvc_info * hc_info)915ca24697SRaghavendra Rao Ananta static void guest_test_hvc(const struct test_hvc_info *hc_info)
925ca24697SRaghavendra Rao Ananta {
935ca24697SRaghavendra Rao Ananta 	unsigned int i;
945ca24697SRaghavendra Rao Ananta 	struct arm_smccc_res res;
955ca24697SRaghavendra Rao Ananta 	unsigned int hvc_info_arr_sz;
965ca24697SRaghavendra Rao Ananta 
975ca24697SRaghavendra Rao Ananta 	hvc_info_arr_sz =
985ca24697SRaghavendra Rao Ananta 	hc_info == hvc_info ? ARRAY_SIZE(hvc_info) : ARRAY_SIZE(false_hvc_info);
995ca24697SRaghavendra Rao Ananta 
1005ca24697SRaghavendra Rao Ananta 	for (i = 0; i < hvc_info_arr_sz; i++, hc_info++) {
1015ca24697SRaghavendra Rao Ananta 		memset(&res, 0, sizeof(res));
1025ca24697SRaghavendra Rao Ananta 		smccc_hvc(hc_info->func_id, hc_info->arg1, 0, 0, 0, 0, 0, 0, &res);
1035ca24697SRaghavendra Rao Ananta 
1045ca24697SRaghavendra Rao Ananta 		switch (stage) {
1055ca24697SRaghavendra Rao Ananta 		case TEST_STAGE_HVC_IFACE_FEAT_DISABLED:
1065ca24697SRaghavendra Rao Ananta 		case TEST_STAGE_HVC_IFACE_FALSE_INFO:
107*af5b41b9SSean Christopherson 			__GUEST_ASSERT(res.a0 == SMCCC_RET_NOT_SUPPORTED,
108*af5b41b9SSean Christopherson 				       "a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%llx, stage = %u",
109*af5b41b9SSean Christopherson 					res.a0, hc_info->func_id, hc_info->arg1, stage);
1105ca24697SRaghavendra Rao Ananta 			break;
1115ca24697SRaghavendra Rao Ananta 		case TEST_STAGE_HVC_IFACE_FEAT_ENABLED:
112*af5b41b9SSean Christopherson 			__GUEST_ASSERT(res.a0 != SMCCC_RET_NOT_SUPPORTED,
113*af5b41b9SSean Christopherson 				       "a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%llx, stage = %u",
114*af5b41b9SSean Christopherson 					res.a0, hc_info->func_id, hc_info->arg1, stage);
1155ca24697SRaghavendra Rao Ananta 			break;
1165ca24697SRaghavendra Rao Ananta 		default:
117*af5b41b9SSean Christopherson 			GUEST_FAIL("Unexpected stage = %u", stage);
1185ca24697SRaghavendra Rao Ananta 		}
1195ca24697SRaghavendra Rao Ananta 	}
1205ca24697SRaghavendra Rao Ananta }
1215ca24697SRaghavendra Rao Ananta 
guest_code(void)1225ca24697SRaghavendra Rao Ananta static void guest_code(void)
1235ca24697SRaghavendra Rao Ananta {
1245ca24697SRaghavendra Rao Ananta 	while (stage != TEST_STAGE_END) {
1255ca24697SRaghavendra Rao Ananta 		switch (stage) {
1265ca24697SRaghavendra Rao Ananta 		case TEST_STAGE_REG_IFACE:
1275ca24697SRaghavendra Rao Ananta 			break;
1285ca24697SRaghavendra Rao Ananta 		case TEST_STAGE_HVC_IFACE_FEAT_DISABLED:
1295ca24697SRaghavendra Rao Ananta 		case TEST_STAGE_HVC_IFACE_FEAT_ENABLED:
1305ca24697SRaghavendra Rao Ananta 			guest_test_hvc(hvc_info);
1315ca24697SRaghavendra Rao Ananta 			break;
1325ca24697SRaghavendra Rao Ananta 		case TEST_STAGE_HVC_IFACE_FALSE_INFO:
1335ca24697SRaghavendra Rao Ananta 			guest_test_hvc(false_hvc_info);
1345ca24697SRaghavendra Rao Ananta 			break;
1355ca24697SRaghavendra Rao Ananta 		default:
136*af5b41b9SSean Christopherson 			GUEST_FAIL("Unexpected stage = %u", stage);
1375ca24697SRaghavendra Rao Ananta 		}
1385ca24697SRaghavendra Rao Ananta 
1395ca24697SRaghavendra Rao Ananta 		GUEST_SYNC(stage);
1405ca24697SRaghavendra Rao Ananta 	}
1415ca24697SRaghavendra Rao Ananta 
1425ca24697SRaghavendra Rao Ananta 	GUEST_DONE();
1435ca24697SRaghavendra Rao Ananta }
1445ca24697SRaghavendra Rao Ananta 
1455ca24697SRaghavendra Rao Ananta struct st_time {
1465ca24697SRaghavendra Rao Ananta 	uint32_t rev;
1475ca24697SRaghavendra Rao Ananta 	uint32_t attr;
1485ca24697SRaghavendra Rao Ananta 	uint64_t st_time;
1495ca24697SRaghavendra Rao Ananta };
1505ca24697SRaghavendra Rao Ananta 
1515ca24697SRaghavendra Rao Ananta #define STEAL_TIME_SIZE		((sizeof(struct st_time) + 63) & ~63)
1525ca24697SRaghavendra Rao Ananta #define ST_GPA_BASE		(1 << 30)
1535ca24697SRaghavendra Rao Ananta 
steal_time_init(struct kvm_vcpu * vcpu)1548a093ea0SSean Christopherson static void steal_time_init(struct kvm_vcpu *vcpu)
1555ca24697SRaghavendra Rao Ananta {
1565ca24697SRaghavendra Rao Ananta 	uint64_t st_ipa = (ulong)ST_GPA_BASE;
1575ca24697SRaghavendra Rao Ananta 	unsigned int gpages;
1585ca24697SRaghavendra Rao Ananta 
1595ca24697SRaghavendra Rao Ananta 	gpages = vm_calc_num_guest_pages(VM_MODE_DEFAULT, STEAL_TIME_SIZE);
1608a093ea0SSean Christopherson 	vm_userspace_mem_region_add(vcpu->vm, VM_MEM_SRC_ANONYMOUS, ST_GPA_BASE, 1, gpages, 0);
1615ca24697SRaghavendra Rao Ananta 
162768e9a61SSean Christopherson 	vcpu_device_attr_set(vcpu, KVM_ARM_VCPU_PVTIME_CTRL,
1638a093ea0SSean Christopherson 			     KVM_ARM_VCPU_PVTIME_IPA, &st_ipa);
1645ca24697SRaghavendra Rao Ananta }
1655ca24697SRaghavendra Rao Ananta 
test_fw_regs_before_vm_start(struct kvm_vcpu * vcpu)1668a093ea0SSean Christopherson static void test_fw_regs_before_vm_start(struct kvm_vcpu *vcpu)
1675ca24697SRaghavendra Rao Ananta {
1685ca24697SRaghavendra Rao Ananta 	uint64_t val;
1695ca24697SRaghavendra Rao Ananta 	unsigned int i;
1705ca24697SRaghavendra Rao Ananta 	int ret;
1715ca24697SRaghavendra Rao Ananta 
1725ca24697SRaghavendra Rao Ananta 	for (i = 0; i < ARRAY_SIZE(fw_reg_info); i++) {
1735ca24697SRaghavendra Rao Ananta 		const struct kvm_fw_reg_info *reg_info = &fw_reg_info[i];
1745ca24697SRaghavendra Rao Ananta 
1755ca24697SRaghavendra Rao Ananta 		/* First 'read' should be an upper limit of the features supported */
176768e9a61SSean Christopherson 		vcpu_get_reg(vcpu, reg_info->reg, &val);
1775ca24697SRaghavendra Rao Ananta 		TEST_ASSERT(val == FW_REG_ULIMIT_VAL(reg_info->max_feat_bit),
1785ca24697SRaghavendra Rao Ananta 			"Expected all the features to be set for reg: 0x%lx; expected: 0x%lx; read: 0x%lx\n",
1795ca24697SRaghavendra Rao Ananta 			reg_info->reg, FW_REG_ULIMIT_VAL(reg_info->max_feat_bit), val);
1805ca24697SRaghavendra Rao Ananta 
1815ca24697SRaghavendra Rao Ananta 		/* Test a 'write' by disabling all the features of the register map */
182768e9a61SSean Christopherson 		ret = __vcpu_set_reg(vcpu, reg_info->reg, 0);
1835ca24697SRaghavendra Rao Ananta 		TEST_ASSERT(ret == 0,
1845ca24697SRaghavendra Rao Ananta 			"Failed to clear all the features of reg: 0x%lx; ret: %d\n",
1855ca24697SRaghavendra Rao Ananta 			reg_info->reg, errno);
1865ca24697SRaghavendra Rao Ananta 
187768e9a61SSean Christopherson 		vcpu_get_reg(vcpu, reg_info->reg, &val);
1885ca24697SRaghavendra Rao Ananta 		TEST_ASSERT(val == 0,
1895ca24697SRaghavendra Rao Ananta 			"Expected all the features to be cleared for reg: 0x%lx\n", reg_info->reg);
1905ca24697SRaghavendra Rao Ananta 
1915ca24697SRaghavendra Rao Ananta 		/*
1925ca24697SRaghavendra Rao Ananta 		 * Test enabling a feature that's not supported.
1935ca24697SRaghavendra Rao Ananta 		 * Avoid this check if all the bits are occupied.
1945ca24697SRaghavendra Rao Ananta 		 */
1955ca24697SRaghavendra Rao Ananta 		if (reg_info->max_feat_bit < 63) {
196768e9a61SSean Christopherson 			ret = __vcpu_set_reg(vcpu, reg_info->reg, BIT(reg_info->max_feat_bit + 1));
1975ca24697SRaghavendra Rao Ananta 			TEST_ASSERT(ret != 0 && errno == EINVAL,
1985ca24697SRaghavendra Rao Ananta 			"Unexpected behavior or return value (%d) while setting an unsupported feature for reg: 0x%lx\n",
1995ca24697SRaghavendra Rao Ananta 			errno, reg_info->reg);
2005ca24697SRaghavendra Rao Ananta 		}
2015ca24697SRaghavendra Rao Ananta 	}
2025ca24697SRaghavendra Rao Ananta }
2035ca24697SRaghavendra Rao Ananta 
test_fw_regs_after_vm_start(struct kvm_vcpu * vcpu)2048a093ea0SSean Christopherson static void test_fw_regs_after_vm_start(struct kvm_vcpu *vcpu)
2055ca24697SRaghavendra Rao Ananta {
2065ca24697SRaghavendra Rao Ananta 	uint64_t val;
2075ca24697SRaghavendra Rao Ananta 	unsigned int i;
2085ca24697SRaghavendra Rao Ananta 	int ret;
2095ca24697SRaghavendra Rao Ananta 
2105ca24697SRaghavendra Rao Ananta 	for (i = 0; i < ARRAY_SIZE(fw_reg_info); i++) {
2115ca24697SRaghavendra Rao Ananta 		const struct kvm_fw_reg_info *reg_info = &fw_reg_info[i];
2125ca24697SRaghavendra Rao Ananta 
2135ca24697SRaghavendra Rao Ananta 		/*
2145ca24697SRaghavendra Rao Ananta 		 * Before starting the VM, the test clears all the bits.
2155ca24697SRaghavendra Rao Ananta 		 * Check if that's still the case.
2165ca24697SRaghavendra Rao Ananta 		 */
217768e9a61SSean Christopherson 		vcpu_get_reg(vcpu, reg_info->reg, &val);
2185ca24697SRaghavendra Rao Ananta 		TEST_ASSERT(val == 0,
2195ca24697SRaghavendra Rao Ananta 			"Expected all the features to be cleared for reg: 0x%lx\n",
2205ca24697SRaghavendra Rao Ananta 			reg_info->reg);
2215ca24697SRaghavendra Rao Ananta 
2225ca24697SRaghavendra Rao Ananta 		/*
2235ca24697SRaghavendra Rao Ananta 		 * Since the VM has run at least once, KVM shouldn't allow modification of
2245ca24697SRaghavendra Rao Ananta 		 * the registers and should return EBUSY. Set the registers and check for
2255ca24697SRaghavendra Rao Ananta 		 * the expected errno.
2265ca24697SRaghavendra Rao Ananta 		 */
227768e9a61SSean Christopherson 		ret = __vcpu_set_reg(vcpu, reg_info->reg, FW_REG_ULIMIT_VAL(reg_info->max_feat_bit));
2285ca24697SRaghavendra Rao Ananta 		TEST_ASSERT(ret != 0 && errno == EBUSY,
2295ca24697SRaghavendra Rao Ananta 		"Unexpected behavior or return value (%d) while setting a feature while VM is running for reg: 0x%lx\n",
2305ca24697SRaghavendra Rao Ananta 		errno, reg_info->reg);
2315ca24697SRaghavendra Rao Ananta 	}
2325ca24697SRaghavendra Rao Ananta }
2335ca24697SRaghavendra Rao Ananta 
test_vm_create(struct kvm_vcpu ** vcpu)2348a093ea0SSean Christopherson static struct kvm_vm *test_vm_create(struct kvm_vcpu **vcpu)
2355ca24697SRaghavendra Rao Ananta {
2365ca24697SRaghavendra Rao Ananta 	struct kvm_vm *vm;
2375ca24697SRaghavendra Rao Ananta 
2388a093ea0SSean Christopherson 	vm = vm_create_with_one_vcpu(vcpu, guest_code);
2395ca24697SRaghavendra Rao Ananta 
2408a093ea0SSean Christopherson 	steal_time_init(*vcpu);
2415ca24697SRaghavendra Rao Ananta 
2425ca24697SRaghavendra Rao Ananta 	return vm;
2435ca24697SRaghavendra Rao Ananta }
2445ca24697SRaghavendra Rao Ananta 
test_guest_stage(struct kvm_vm ** vm,struct kvm_vcpu ** vcpu)2458a093ea0SSean Christopherson static void test_guest_stage(struct kvm_vm **vm, struct kvm_vcpu **vcpu)
2465ca24697SRaghavendra Rao Ananta {
247f05427faSSean Christopherson 	int prev_stage = stage;
2485ca24697SRaghavendra Rao Ananta 
249f05427faSSean Christopherson 	pr_debug("Stage: %d\n", prev_stage);
2505ca24697SRaghavendra Rao Ananta 
251f05427faSSean Christopherson 	/* Sync the stage early, the VM might be freed below. */
252f05427faSSean Christopherson 	stage++;
253f05427faSSean Christopherson 	sync_global_to_guest(*vm, stage);
254f05427faSSean Christopherson 
255f05427faSSean Christopherson 	switch (prev_stage) {
2565ca24697SRaghavendra Rao Ananta 	case TEST_STAGE_REG_IFACE:
2578a093ea0SSean Christopherson 		test_fw_regs_after_vm_start(*vcpu);
2585ca24697SRaghavendra Rao Ananta 		break;
2595ca24697SRaghavendra Rao Ananta 	case TEST_STAGE_HVC_IFACE_FEAT_DISABLED:
2605ca24697SRaghavendra Rao Ananta 		/* Start a new VM so that all the features are now enabled by default */
261f05427faSSean Christopherson 		kvm_vm_free(*vm);
2628a093ea0SSean Christopherson 		*vm = test_vm_create(vcpu);
2635ca24697SRaghavendra Rao Ananta 		break;
2645ca24697SRaghavendra Rao Ananta 	case TEST_STAGE_HVC_IFACE_FEAT_ENABLED:
2655ca24697SRaghavendra Rao Ananta 	case TEST_STAGE_HVC_IFACE_FALSE_INFO:
2665ca24697SRaghavendra Rao Ananta 		break;
2675ca24697SRaghavendra Rao Ananta 	default:
268f05427faSSean Christopherson 		TEST_FAIL("Unknown test stage: %d\n", prev_stage);
2695ca24697SRaghavendra Rao Ananta 	}
2705ca24697SRaghavendra Rao Ananta }
2715ca24697SRaghavendra Rao Ananta 
test_run(void)2725ca24697SRaghavendra Rao Ananta static void test_run(void)
2735ca24697SRaghavendra Rao Ananta {
2748a093ea0SSean Christopherson 	struct kvm_vcpu *vcpu;
2755ca24697SRaghavendra Rao Ananta 	struct kvm_vm *vm;
2765ca24697SRaghavendra Rao Ananta 	struct ucall uc;
2775ca24697SRaghavendra Rao Ananta 	bool guest_done = false;
2785ca24697SRaghavendra Rao Ananta 
2798a093ea0SSean Christopherson 	vm = test_vm_create(&vcpu);
2805ca24697SRaghavendra Rao Ananta 
2818a093ea0SSean Christopherson 	test_fw_regs_before_vm_start(vcpu);
2825ca24697SRaghavendra Rao Ananta 
2835ca24697SRaghavendra Rao Ananta 	while (!guest_done) {
284768e9a61SSean Christopherson 		vcpu_run(vcpu);
2855ca24697SRaghavendra Rao Ananta 
286768e9a61SSean Christopherson 		switch (get_ucall(vcpu, &uc)) {
2875ca24697SRaghavendra Rao Ananta 		case UCALL_SYNC:
2888a093ea0SSean Christopherson 			test_guest_stage(&vm, &vcpu);
2895ca24697SRaghavendra Rao Ananta 			break;
2905ca24697SRaghavendra Rao Ananta 		case UCALL_DONE:
2915ca24697SRaghavendra Rao Ananta 			guest_done = true;
2925ca24697SRaghavendra Rao Ananta 			break;
2935ca24697SRaghavendra Rao Ananta 		case UCALL_ABORT:
294*af5b41b9SSean Christopherson 			REPORT_GUEST_ASSERT(uc);
2955ca24697SRaghavendra Rao Ananta 			break;
2965ca24697SRaghavendra Rao Ananta 		default:
2975ca24697SRaghavendra Rao Ananta 			TEST_FAIL("Unexpected guest exit\n");
2985ca24697SRaghavendra Rao Ananta 		}
2995ca24697SRaghavendra Rao Ananta 	}
3005ca24697SRaghavendra Rao Ananta 
3015ca24697SRaghavendra Rao Ananta 	kvm_vm_free(vm);
3025ca24697SRaghavendra Rao Ananta }
3035ca24697SRaghavendra Rao Ananta 
main(void)3045ca24697SRaghavendra Rao Ananta int main(void)
3055ca24697SRaghavendra Rao Ananta {
3065ca24697SRaghavendra Rao Ananta 	test_run();
3075ca24697SRaghavendra Rao Ananta 	return 0;
3085ca24697SRaghavendra Rao Ananta }
309