/openbmc/linux/arch/sparc/lib/ |
H A D | fls.S | 29 sra %o0, 0, %o0 39 sra %o0, 0, %o0 51 sra %o1, 0, %o0 55 sra %o0, 0, %o0 59 sra %o0, 0, %o0
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H A D | ashrdi3.S | 22 sra %o0, %o2, %o4 24 sra %o0, 31, %o4 27 sra %o0, %g2, %o5
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H A D | atomic_64.S | 46 sra %g1, 0, %o0; \ 61 sra %g1, 0, %o0; \
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H A D | fls64.S | 59 sra %g1, 0, %o0
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H A D | muldi3.S | 15 sra %i3, 0x1f, %g2
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H A D | strncmp_32.S | 19 sra %o2, 2, %o4
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/openbmc/linux/arch/loongarch/include/asm/ |
H A D | asm.h | 80 #define INT_SRAV sra.w 94 #define INT_SRAV sra.d 111 #define LONG_SRAV sra.w 132 #define LONG_SRAV sra.d 157 #define PTR_SRAV sra.w 180 #define PTR_SRAV sra.d
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/openbmc/linux/arch/xtensa/lib/ |
H A D | ashrdi3.S | 20 sra uh, uh 24 sra ul, uh
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/openbmc/qemu/tests/tcg/xtensa/ |
H A D | test_shift.S | 149 sra \dst, \src 156 sra \dst, \src 167 test sra 168 tests_shift sra, 0xa3c51249 170 tests_shift sra, 0x49a3c512
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/openbmc/linux/arch/riscv/lib/ |
H A D | tishift.S | 41 sra a2,a1,a2 49 sra a0,a1,a0
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/openbmc/linux/arch/mips/include/asm/ |
H A D | asm.h | 183 #define INT_SRA sra 223 #define LONG_SRA sra 283 #define PTR_SRA sra
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/openbmc/linux/arch/alpha/lib/ |
H A D | csum_ipv6_magic.S | 36 sra $4,32,$4 # e0 : 74 sra $19,32,$19 # e0 : proto complete
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H A D | memset.S | 72 sra $18,3,$3 /* E0 */
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H A D | ev6-memset.S | 103 sra $18,3,$3 # U : Number of remaining quads to write 281 sra $18,3,$3 # U : Number of remaining quads to write 469 sra $18,3,$3 # U : Number of remaining quads to write
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/openbmc/u-boot/arch/mips/include/asm/ |
H A D | asm.h | 279 #define INT_SRA sra 317 #define LONG_SRA sra 367 #define PTR_SRA sra
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/openbmc/linux/arch/sparc/kernel/ |
H A D | una_asm_64.S | 95 sra %g2, 0, %g2 124 sra %g7, 0, %g7
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H A D | una_asm_32.S | 101 sra %g1, 16, %g1
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H A D | hvcalls.S | 255 sra %o1, 0, %o0 266 sra %o0, 0, %o0
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/openbmc/qemu/hw/block/ |
H A D | fdc-internal.h | 102 uint8_t sra; member
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H A D | fdc.c | 1031 VMSTATE_UINT8(sra, FDCtrl), 1072 if (!(fdctrl->sra & FD_SRA_INTPEND)) in fdctrl_reset_irq() 1076 fdctrl->sra &= ~FD_SRA_INTPEND; in fdctrl_reset_irq() 1081 if (!(fdctrl->sra & FD_SRA_INTPEND)) { in fdctrl_raise_irq() 1083 fdctrl->sra |= FD_SRA_INTPEND; in fdctrl_raise_irq() 1098 fdctrl->sra = 0; in fdctrl_reset() 1101 fdctrl->sra |= FD_SRA_nDRV2; in fdctrl_reset() 1188 uint32_t retval = fdctrl->sra; in fdctrl_read_statusA() 2024 } else if (!(fdctrl->sra & FD_SRA_INTPEND)) { in fdctrl_handle_sense_interrupt_status()
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/openbmc/qemu/tests/tcg/mips/include/ |
H A D | wrappers_msa.h | 711 DO_MSA__WD__WS_WT(SRA_B, sra.b) 712 DO_MSA__WD__WS_WT(SRA_H, sra.h) 713 DO_MSA__WD__WS_WT(SRA_W, sra.w) 714 DO_MSA__WD__WS_WT(SRA_D, sra.d)
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/openbmc/linux/drivers/ipack/devices/ |
H A D | scc2698.h | 49 u8 d1, sra; /* Status register (a) */ member
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/openbmc/qemu/tests/tcg/s390x/ |
H A D | shift.c | 59 DEFINE_SHIFT_SINGLE_2(sra, 0x67e);
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/openbmc/linux/sound/soc/atmel/ |
H A D | mchp-i2s-mcc.c | 261 u32 sra, imra, srb, imrb, pendinga, pendingb, idra = 0, idrb = 0; in mchp_i2s_mcc_interrupt() local 265 regmap_read(dev->regmap, MCHP_I2SMCC_ISRA, &sra); in mchp_i2s_mcc_interrupt() 266 pendinga = imra & sra; in mchp_i2s_mcc_interrupt()
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/openbmc/qemu/target/microblaze/ |
H A D | insns.decode | 244 sra 100100 ..... ..... 00000 000 0000 0001 @typea0
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