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Searched refs:soc_con0 (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/arch/arm/mach-rockchip/
H A Drk3188-board.c35 rk_clrsetreg(&grf->soc_con0, in board_late_init()
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dgrf_rk3036.h37 unsigned int soc_con0; member
H A Dgrf_rk3399.h158 u32 soc_con0; member
254 u32 soc_con0; member
293 u32 soc_con0; member
H A Dgrf_rv1108.h65 u32 soc_con0; member
H A Dgrf_rk3368.h60 u32 soc_con0; member
H A Dgrf_rk3188.h38 u32 soc_con0; member
H A Dgrf_rk3288.h58 u32 soc_con0; member
100 u32 soc_con0; member
H A Dgrf_rk3128.h41 unsigned int soc_con0; member
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3288.c204 rk_clrsetreg(&grf->soc_con0, in ddr_set_enable()
217 rk_clrsetreg(&grf->soc_con0, mask, val); in ddr_set_ddr3_mode()
443 rk_setreg(&grf->soc_con0, 1 << (8 + channel)); in set_bandwidth_ratio()
453 rk_clrreg(&grf->soc_con0, 1 << (8 + channel)); in set_bandwidth_ratio()