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Searched refs:smu_cmn_feature_is_enabled (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.c318 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in aldebaran_set_default_dpm_table()
334 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in aldebaran_set_default_dpm_table()
353 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in aldebaran_set_default_dpm_table()
369 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in aldebaran_set_default_dpm_table()
701 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) in aldebaran_get_current_clk_freq_by_table()
707 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) in aldebaran_get_current_clk_freq_by_table()
713 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) in aldebaran_get_current_clk_freq_by_table()
719 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) in aldebaran_get_current_clk_freq_by_table()
725 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) in aldebaran_get_current_clk_freq_by_table()
946 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) && in aldebaran_upload_dpm_level()
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H A Dsmu_v13_0.c897 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks()
908 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks()
919 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in smu_v13_0_init_max_sustainable_clocks()
967 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) in smu_v13_0_get_current_power_limit()
997 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in smu_v13_0_set_power_limit()
1025 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_ACDC_BIT)) in smu_v13_0_process_pending_interrupt()
1087 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) || in smu_v13_0_display_clock_voltage_request()
1088 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_display_clock_voltage_request()
1129 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT)) in smu_v13_0_get_fan_control_mode()
2237 !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)) in smu_v13_0_baco_is_support()
H A Dsmu_v13_0_7_ppt.c580 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
596 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
620 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
636 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
652 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_VCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
668 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCLK_BIT)) { in smu_v13_0_7_set_default_dpm_table()
2211 .feature_is_enabled = smu_cmn_feature_is_enabled,
H A Dsmu_v13_0_0_ppt.c581 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
597 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
630 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
646 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
662 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_VCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
678 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCLK_BIT)) { in smu_v13_0_0_set_default_dpm_table()
2611 .feature_is_enabled = smu_cmn_feature_is_enabled,
H A Dsmu_v13_0_6_ppt.c514 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in smu_v13_0_6_set_default_dpm_table()
541 if (smu_cmn_feature_is_enabled(smu, dpm_map[j].feature_num)) { in smu_v13_0_6_set_default_dpm_table()
1013 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) && in smu_v13_0_6_upload_dpm_level()
1029 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) && in smu_v13_0_6_upload_dpm_level()
1046 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT) && in smu_v13_0_6_upload_dpm_level()
2241 .feature_is_enabled = smu_cmn_feature_is_enabled,
H A Dsmu_v13_0_5_ppt.c716 return smu_cmn_feature_is_enabled(smu, feature_id); in smu_v13_0_5_clk_dpm_is_enabled()
H A Dsmu_v13_0_4_ppt.c741 return smu_cmn_feature_is_enabled(smu, feature_id); in smu_v13_0_4_clk_dpm_is_enabled()
H A Dyellow_carp_ppt.c850 return smu_cmn_feature_is_enabled(smu, feature_id); in yellow_carp_clk_dpm_is_enabled()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c978 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in navi10_set_default_dpm_table()
996 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in navi10_set_default_dpm_table()
1014 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in navi10_set_default_dpm_table()
1032 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_set_default_dpm_table()
1050 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_set_default_dpm_table()
1068 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in navi10_set_default_dpm_table()
1086 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in navi10_set_default_dpm_table()
1104 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in navi10_set_default_dpm_table()
1122 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in navi10_set_default_dpm_table()
1147 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in navi10_dpm_set_vcn_enable()
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H A Darcturus_ppt.c336 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in arcturus_set_default_dpm_table()
354 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in arcturus_set_default_dpm_table()
372 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in arcturus_set_default_dpm_table()
390 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in arcturus_set_default_dpm_table()
719 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) in arcturus_get_current_clk_freq_by_table()
725 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) in arcturus_get_current_clk_freq_by_table()
731 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) in arcturus_get_current_clk_freq_by_table()
737 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_DPM_BIT)) in arcturus_get_current_clk_freq_by_table()
743 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_DPM_BIT)) in arcturus_get_current_clk_freq_by_table()
957 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) && in arcturus_upload_dpm_level()
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H A Dsmu_v11_0.c785 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) && in smu_v11_0_notify_display_change()
843 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks()
854 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks()
865 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in smu_v11_0_init_max_sustainable_clocks()
913 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) in smu_v11_0_get_current_power_limit()
949 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in smu_v11_0_set_power_limit()
993 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_ACDC_BIT)) in smu_v11_0_process_pending_interrupt()
1061 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) || in smu_v11_0_display_clock_voltage_request()
1062 smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in smu_v11_0_display_clock_voltage_request()
1132 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT)) in smu_v11_0_get_fan_control_mode()
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H A Dsienna_cichlid_ppt.c945 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
963 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
981 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
999 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
1021 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { in sienna_cichlid_set_default_dpm_table()
1043 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { in sienna_cichlid_set_default_dpm_table()
1062 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
1080 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
1098 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
1116 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT)) { in sienna_cichlid_set_default_dpm_table()
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H A Dvangogh_ppt.c913 if (!smu_cmn_feature_is_enabled(smu, feature_id)) in vangogh_clk_dpm_is_enabled()
1360 if (!smu_cmn_feature_is_enabled(smu, clk_feature_map[i].feature)) in vangogh_unforce_dpm_levels()
2271 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) && in vangogh_post_smu_init()
2432 if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_PPT_BIT)) { in vangogh_set_power_limit()
2576 .feature_is_enabled = smu_cmn_feature_is_enabled,
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/
H A Dsmu_cmn.h68 int smu_cmn_feature_is_enabled(struct smu_context *smu,
H A Dsmu_cmn.c521 int smu_cmn_feature_is_enabled(struct smu_context *smu, in smu_cmn_feature_is_enabled() function
582 if (!smu_cmn_feature_is_enabled(smu, feature_id)) in smu_cmn_clk_dpm_is_enabled()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c656 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in renoir_dpm_set_vcn_enable()
662 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) { in renoir_dpm_set_vcn_enable()
677 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) { in renoir_dpm_set_jpeg_enable()
683 if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) { in renoir_dpm_set_jpeg_enable()
736 if (!smu_cmn_feature_is_enabled(smu, clk_feature_map[i].feature)) in renoir_unforce_dpm_levels()
1448 .feature_is_enabled = smu_cmn_feature_is_enabled,