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Searched refs:sim (Results 1 – 25 of 71) sorted by relevance

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/openbmc/linux/tools/testing/selftests/bpf/
H A Dtest_offload.py640 fail(dev["ifname"] != sim["ifname"],
641 "Ifname incorrect %s vs %s" % (dev["ifname"], sim["ifname"]))
680 def test_spurios_extack(sim, obj, skip_hw, needle): argument
681 res = sim.cls_bpf_add_filter(obj, prio=1, handle=1, skip_hw=skip_hw,
684 res = sim.cls_bpf_add_filter(obj, op="replace", prio=1, handle=1,
687 res = sim.cls_filter_op(op="delete", prio=1, handle=1, cls="bpf",
691 def test_multi_prog(simdev, sim, obj, modename, modeid): argument
694 sim.set_xdp(obj, "offload")
695 xdp = sim.ip_link_show(xdp=True)["xdp"]
696 offloaded = sim.dfs_read("bpf_offloaded_id")
[all …]
/openbmc/linux/Documentation/admin-guide/gpio/
H A Dgpio-sim.rst6 The configfs GPIO Simulator (gpio-sim) provides a way to create simulated GPIO
14 The gpio-sim module registers a configfs subsystem called ``'gpio-sim'``. For
21 **Group:** ``/config/gpio-sim``
23 This is the top directory of the gpio-sim configfs tree.
25 **Group:** ``/config/gpio-sim/gpio-device``
27 **Attribute:** ``/config/gpio-sim/gpio-device/dev_name``
29 **Attribute:** ``/config/gpio-sim/gpio-device/live``
33 name (e.g. ``'gpio-sim.0'``). The ``'live'`` attribute allows to trigger the
38 **Group:** ``/config/gpio-sim/gpio-device/gpio-bankX``
40 **Attribute:** ``/config/gpio-sim/gpio-device/gpio-bankX/chip_name``
[all …]
H A Dindex.rst13 gpio-sim
/openbmc/linux/arch/arm/mach-imx/
H A Dmach-imx7ulp.c22 struct regmap *sim; in imx7ulp_set_revision() local
25 sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim"); in imx7ulp_set_revision()
26 if (IS_ERR(sim)) { in imx7ulp_set_revision()
31 if (regmap_read(sim, SIM_JTAG_ID_REG, &revision)) { in imx7ulp_set_revision()
/openbmc/linux/arch/powerpc/boot/dts/
H A Diss4xx.dts34 model = "PowerPC,4xx"; // real CPU changed in sim
38 i-cache-line-size = <32>; // may need fixup in sim
39 d-cache-line-size = <32>; // may need fixup in sim
40 i-cache-size = <32768>; /* may need fixup in sim */
41 d-cache-size = <32768>; /* may need fixup in sim */
109 compatible = "ibm,iss-sim-block-device";
H A Diss4xx-mpic.dts36 model = "PowerPC,4xx"; // real CPU changed in sim
50 model = "PowerPC,4xx"; // real CPU changed in sim
66 model = "PowerPC,4xx"; // real CPU changed in sim
82 model = "PowerPC,4xx"; // real CPU changed in sim
148 compatible = "ibm,iss-sim-block-device";
/openbmc/u-boot/arch/m68k/cpu/mcf530x/
H A Dcpu_init.c106 sim_t *sim = (sim_t *)(MMAP_SIM); in cpu_init_f() local
108 out_8(&sim->sypcr, 0x00); in cpu_init_f()
109 out_8(&sim->swivr, 0x0f); in cpu_init_f()
110 out_8(&sim->swsr, 0x00); in cpu_init_f()
111 out_8(&sim->mpark, 0x00); in cpu_init_f()
H A Dcpu.c14 sim_t *sim = (sim_t *)(MMAP_SIM); in do_reset() local
17 out_8(&sim->sypcr, SYPCR_SWE | SYPCR_SWRI); in do_reset()
/openbmc/linux/drivers/iio/common/st_sensors/
H A Dst_sensors_spi.c63 if (settings->sim.addr) { in st_sensors_configure_spi_3_wire()
65 settings->sim.addr, in st_sensors_configure_spi_3_wire()
66 settings->sim.value in st_sensors_configure_spi_3_wire()
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8916-thwc-ufi001c.dts44 sim_ctrl_default: sim-ctrl-default-state {
52 sim-en-pins {
59 sim-sel-pins {
/openbmc/linux/drivers/pci/pcie/
H A Daer_inject.c220 u32 *sim; in aer_inj_read_config() local
236 sim = find_pci_config_dword(err, where, NULL); in aer_inj_read_config()
237 if (sim) { in aer_inj_read_config()
238 *val = *sim; in aer_inj_read_config()
251 u32 *sim; in aer_inj_write_config() local
268 sim = find_pci_config_dword(err, where, &rw1cs); in aer_inj_write_config()
269 if (sim) { in aer_inj_write_config()
271 *sim ^= val; in aer_inj_write_config()
273 *sim = val; in aer_inj_write_config()
/openbmc/linux/drivers/iio/accel/
H A Dst_accel_core.c191 .sim = {
273 .sim = {
363 .sim = {
435 .sim = {
508 .sim = {
580 .sim = {
637 .sim = {
712 .sim = {
793 .sim = {
921 .sim = {
[all …]
/openbmc/linux/arch/powerpc/tools/
H A Dunrel_branch_check.sh24 sim=0x$($nm -p "$vmlinux" |
65 if [ "$to" = "$sim" ]; then
/openbmc/u-boot/board/sysam/amcore/
H A Damcore.c21 sim_t *sim = (sim_t *)(MMAP_SIM); in init_lcd() local
23 out_be16(&sim->par, 0x300); in init_lcd()
/openbmc/openpower-hw-diags/test/
H A Dpdbg-sim-only.cpp46 int rc = sim::ScomAccess::getSingleton().get(i_target, i_addr, o_val); in getScom()
66 int rc = sim::CfamAccess::getSingleton().get(i_target, i_addr, o_val); in getCfam()
H A Dtest-pdbg-dts.cpp178 sim::ScomAccess& scom = sim::ScomAccess::getSingleton(); in TEST()
212 sim::CfamAccess& cfam = sim::CfamAccess::getSingleton(); in TEST()
H A Dtest-tod-step-check-fault.cpp26 sim::ScomAccess& scom = sim::ScomAccess::getSingleton(); in TEST()
/openbmc/linux/drivers/iio/pressure/
H A Dst_pressure_core.c293 .sim = {
343 .sim = {
410 .sim = {
479 .sim = {
548 .sim = {
618 .sim = {
/openbmc/qemu/docs/system/
H A Dtarget-xtensa.rst10 - Xtensa emulator pseudo board \"sim\"
14 The sim pseudo board emulation provides an environment similar to one
/openbmc/linux/drivers/iio/gyro/
H A Dst_gyro_core.c137 .sim = {
215 .sim = {
289 .sim = {
363 .sim = {
/openbmc/openbmc/poky/meta/recipes-devtools/gcc/
H A Dgcc-testsuite.inc39 content.append('load_generic_config "sim"')
40 content.append('load_base_board_description "basic-sim"')
69 content.append('set_board_info sim "{0}"'.format(qemu_binary))
70 content.append('set_board_info sim,options "{0}"'.format(" ".join(args)))
/openbmc/qemu/docs/system/openrisc/
H A Dor1k-sim.rst22 $ qemu-system-or1k -cpu or1220 -M or1k-sim -nographic \
37 The ``or1k-sim`` board automatically generates a device tree blob ("dtb")
/openbmc/u-boot/arch/arm/dts/
H A Dimx7ulp.dtsi316 nxp,sim = <&sim>;
479 sim = <&sim>;
555 sim: sim@410a3000 { label
556 compatible = "fsl,imx7ulp-sim", "syscon";
/openbmc/openpower-hw-diags/
H A Dmeson.build161 # functions to simulate them for testing (see `test/*-sim-only.cpp`).
175 'test/dbus-sim-only.cpp',
176 'test/pdbg-sim-only.cpp',
/openbmc/linux/tools/testing/selftests/gpio/
H A DMakefile3 TEST_PROGS := gpio-mockup.sh gpio-sim.sh

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