/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | marvell,dove-pinctrl.txt | 24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu* 25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu* 26 mpp6 6 gpio, pmu, uart3(txd), sdio1(buspwr), spi1(mosi), pmu* 27 mpp7 7 gpio, pmu, uart3(rxd), sdio1(ledctrl), spi1(sck), pmu* 32 sdio1(ledctrl), pex0(clkreq), pmu* 33 mpp12 12 gpio, pmu, uart2(rts), audio0(extclk), sdio1(cd), 35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp), 37 mpp14 14 gpio, pmu, uart2(txd), sdio1(buspwr), ssp(rxd), pmu* 38 mpp15 15 gpio, pmu, uart2(rxd), sdio1(ledctrl), ssp(sfrm), pmu* 44 mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso), [all …]
|
H A D | brcm,cygnus-pinmux.txt | 115 "sdio1": "sdio1_data_0_grp", "sdio1_data_1_grp", "sdio1_cd_grp",
|
/openbmc/linux/Documentation/devicetree/bindings/reset/ |
H A D | zynq-reset.txt | 38 193: sdio1 reset 40 197: sdio1 ref reset
|
/openbmc/linux/arch/arm/mach-dove/ |
H A D | common.c | 83 struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1; in dove_clk_init() local 95 sdio1 = dove_register_gate("sdio1", "tclk", CLOCK_GATING_BIT_SDIO1); in dove_clk_init() 120 orion_clkdev_add(NULL, "sdhci-dove.1", sdio1); in dove_clk_init()
|
/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3288.dtsi | 36 mmc3 = &sdio1; 40 mshc3 = &sdio1; 190 sdio1: dwmmc@ff0e0000 { label 1259 sdio1 { 1260 sdio1_bus1: sdio1-bus1 { 1264 sdio1_bus4: sdio1-bus4 { 1271 sdio1_cd: sdio1-cd { 1275 sdio1_wp: sdio1-wp { 1279 sdio1_bkpwr: sdio1-bkpwr { 1283 sdio1_int: sdio1-int { [all …]
|
H A D | tegra20-tamonten.dtsi | 145 sdio1 { 146 nvidia,pins = "sdio1"; 147 nvidia,function = "sdio1"; 194 "dtc", "dte", "dtf", "gpu", "sdio1",
|
H A D | tegra20-paz00.dts | 184 sdio1 { 185 nvidia,pins = "sdio1"; 186 nvidia,function = "sdio1"; 221 "rm", "sdio1", "slxk", "spdo", "uac",
|
H A D | zynq-cse-nand.dts | 59 "can1", "sdio0", "sdio1",
|
H A D | zynq-cse-nor.dts | 66 "can1", "sdio0", "sdio1",
|
H A D | tegra20-ventana.dts | 198 sdio1 { 199 nvidia,pins = "sdio1"; 200 nvidia,function = "sdio1"; 271 "kbce", "kbcf", "sdio1", "uaa", "uab";
|
/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | zynq-7000.txt | 63 22: sdio1 100 "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
|
H A D | brcm,kona-ccu.txt | 81 master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1 122 master sdio1 peri 0 BCM21664_MASTER_CCU_SDIO1
|
/openbmc/linux/arch/arm/boot/dts/broadcom/ |
H A D | bcm21664-garnet.dts | 20 &sdio1 {
|
H A D | bcm21664.dtsi | 114 sdio1: mmc@3f180000 { label 304 clock-output-names = "sdio1",
|
/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | dove-dove-db.dts | 23 &sdio1 { status = "okay"; };
|
H A D | dove-d2plug.dts | 55 &sdio1 {
|
H A D | dove-d3plug.dts | 66 &sdio1 {
|
H A D | dove.dtsi | 360 sdio1: sdio-host@90000 { label 643 pmx_sdio1: pmx-sdio1 { 645 marvell,function = "sdio1"; 648 pmx_sdio1_gpio: pmx-sdio1-gpio {
|
/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra20-trimslice.dts | 165 sdio1 { 166 nvidia,pins = "sdio1"; 167 nvidia,function = "sdio1"; 213 "gpv", "sdio1", "slxa", "slxk", "uac";
|
H A D | tegra20-tamonten.dtsi | 156 sdio1 { 157 nvidia,pins = "sdio1"; 158 nvidia,function = "sdio1"; 206 "dtc", "dte", "gpu", "sdio1",
|
H A D | tegra20-paz00.dts | 168 sdio1 { 169 nvidia,pins = "sdio1"; 170 nvidia,function = "sdio1"; 205 "rm", "sdio1", "slxk", "spdo", "uac",
|
H A D | tegra20-ventana.dts | 179 sdio1 { 180 nvidia,pins = "sdio1"; 181 nvidia,function = "sdio1"; 252 "kbce", "kbcf", "sdio1", "uaa", "uab";
|
/openbmc/linux/arch/arm64/boot/dts/broadcom/stingray/ |
H A D | stingray-board-base.dtsi | 41 &sdio1 {
|
/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288.dtsi | 31 mshc3 = &sdio1; 236 sdio1: mmc@ff0e0000 { label 1768 sdio1 { 1769 sdio1_bus1: sdio1-bus1 { 1773 sdio1_bus4: sdio1-bus4 { 1780 sdio1_cd: sdio1-cd { 1784 sdio1_wp: sdio1-wp { 1788 sdio1_bkpwr: sdio1-bkpwr { 1792 sdio1_int: sdio1-int { 1796 sdio1_cmd: sdio1-cmd { [all …]
|
/openbmc/linux/drivers/clk/zynq/ |
H A D | clkc.c | 55 sdio0, sdio1, uart0, uart1, spi0, spi1, dma, enumerator 368 zynq_clk_register_periph_clk(sdio0, sdio1, clk_output_name[sdio0], in zynq_clk_setup() 369 clk_output_name[sdio1], SLCR_SDIO_CLK_CTRL, in zynq_clk_setup()
|