| /openbmc/u-boot/board/engicam/common/ |
| H A D | spl.c | 246 .sde_to_rst = 0x10,
278 .sde_to_rst = 0x10,
295 .sde_to_rst = 0x10,
343 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /openbmc/u-boot/board/liebherr/mccmon6/ |
| H A D | spl.c | 187 .sde_to_rst = 0x10,
228 .sde_to_rst = 0x10,
245 .sde_to_rst = 0x10,
|
| /openbmc/u-boot/board/wandboard/ |
| H A D | spl.c | 236 .sde_to_rst = 0x10,
279 .sde_to_rst = 0x10,
298 .sde_to_rst = 0x10,
|
| /openbmc/u-boot/board/compulab/cm_fx6/ |
| H A D | spl.c | 106 .sde_to_rst = 0x10,
173 .sde_to_rst = 0x10,
|
| /openbmc/u-boot/board/bachmann/ot1200/ |
| H A D | ot1200_spl.c | 83 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /openbmc/u-boot/board/ccv/xpress/ |
| H A D | spl.c | 59 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /openbmc/u-boot/board/barco/platinum/ |
| H A D | spl_picon.c | 135 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| H A D | spl_titanium.c | 138 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /openbmc/u-boot/board/phytec/pcl063/ |
| H A D | spl.c | 64 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /openbmc/u-boot/board/freescale/mx6memcal/ |
| H A D | spl.c | 230 .sde_to_rst = 0x10, /* JEDEC value for LPDDR2 - 200us */
235 .sde_to_rst = 0, /* LPDDR2 does not need this field */
|
| /openbmc/u-boot/board/bticino/mamoj/ |
| H A D | spl.c | 125 .sde_to_rst = 0x10,
|
| /openbmc/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | litesom.c | 127 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| H A D | opos6ul.c | 192 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /openbmc/u-boot/board/technexion/pico-imx6ul/ |
| H A D | spl.c | 72 .sde_to_rst = 0x10,
|
| /openbmc/u-boot/board/dhelectronics/dh_imx6/ |
| H A D | dh_imx6_spl.c | 250 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
269 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /openbmc/u-boot/board/freescale/mx6ul_14x14_evk/ |
| H A D | mx6ul_14x14_evk.c | 636 .sde_to_rst = 0, /* LPDDR2 does not need this field */
676 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /openbmc/u-boot/board/udoo/ |
| H A D | udoo_spl.c | 193 .sde_to_rst = 0x10,
|
| /openbmc/u-boot/board/liebherr/display5/ |
| H A D | spl.c | 179 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /openbmc/u-boot/board/k+p/kp_imx6q_tpc/ |
| H A D | kp_imx6q_tpc_spl.c | 242 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /openbmc/u-boot/board/sks-kinkel/sksimx6/ |
| H A D | sksimx6.c | 334 .sde_to_rst = 0x10,
|
| /openbmc/u-boot/board/freescale/mx6slevk/ |
| H A D | mx6slevk.c | 411 .sde_to_rst = 0, /* LPDDR2 does not need this field */ in spl_dram_init()
|
| /openbmc/u-boot/board/phytec/pcm058/ |
| H A D | pcm058.c | 505 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /openbmc/u-boot/board/gateworks/gw_ventana/ |
| H A D | gw_ventana_spl.c | 506 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|
| /openbmc/u-boot/board/kosagi/novena/ |
| H A D | novena_spl.c | 518 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
|
| /openbmc/u-boot/board/freescale/mx6sxsabresd/ |
| H A D | mx6sxsabresd.c | 521 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ in spl_dram_init()
|