Searched refs:rpu_base (Results 1 – 4 of 4) sorted by relevance
58 tmp = readl(&rpu_base->rpu0_cfg); in set_r5_halt_mode()63 writel(tmp, &rpu_base->rpu0_cfg); in set_r5_halt_mode()66 tmp = readl(&rpu_base->rpu1_cfg); in set_r5_halt_mode()71 writel(tmp, &rpu_base->rpu1_cfg); in set_r5_halt_mode()79 tmp = readl(&rpu_base->rpu_glbl_ctrl); in set_r5_tcm_mode()90 writel(tmp, &rpu_base->rpu_glbl_ctrl); in set_r5_tcm_mode()170 tmp = readl(&rpu_base->rpu0_cfg); in set_r5_start()175 writel(tmp, &rpu_base->rpu0_cfg); in set_r5_start()177 tmp = readl(&rpu_base->rpu1_cfg); in set_r5_start()182 writel(tmp, &rpu_base->rpu1_cfg); in set_r5_start()
32 tmp = readl(&rpu_base->rpu0_cfg); in set_r5_halt_mode()37 writel(tmp, &rpu_base->rpu0_cfg); in set_r5_halt_mode()40 tmp = readl(&rpu_base->rpu1_cfg); in set_r5_halt_mode()45 writel(tmp, &rpu_base->rpu1_cfg); in set_r5_halt_mode()53 tmp = readl(&rpu_base->rpu_glbl_ctrl); in set_r5_tcm_mode()64 writel(tmp, &rpu_base->rpu_glbl_ctrl); in set_r5_tcm_mode()
53 #define rpu_base ((struct rpu_regs *)VERSAL_RPU_BASEADDR) macro
99 #define rpu_base ((struct rpu_regs *)ZYNQMP_RPU_BASEADDR) macro