Home
last modified time | relevance | path

Searched refs:ro_mask (Results 1 – 7 of 7) sorted by relevance

/openbmc/qemu/hw/xen/
H A Dxen_pt_config_init.c104 uint32_t throughable_mask = ~(reg->emu_mask | reg->ro_mask); in get_throughable_mask()
181 writable_mask = reg->emu_mask & ~reg->ro_mask & valid_mask; in xen_pt_byte_reg_write()
200 writable_mask = reg->emu_mask & ~reg->ro_mask & valid_mask; in xen_pt_word_reg_write()
219 writable_mask = reg->emu_mask & ~reg->ro_mask & valid_mask; in xen_pt_long_reg_write()
324 writable_mask = ~reg->ro_mask & valid_mask; in xen_pt_cmd_reg_write()
565 bar_ro_mask = (reg->ro_mask | (r_size - 1)) & ~PCI_ROM_ADDRESS_ENABLE; in xen_pt_exp_rom_bar_reg_write()
600 .ro_mask = 0xFFFF,
611 .ro_mask = 0xFFFF,
633 .ro_mask = 0xFF,
648 .ro_mask = 0x06F8,
[all …]
H A Dxen_pt.h138 uint32_t ro_mask; member
H A Dxen_pt.c330 uint32_t wp_mask = reg->emu_mask | reg->ro_mask; in xen_pt_pci_write_config()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dmmio.h64 u64 ro_mask; member
H A Dhandlers.c112 u16 flags, u32 addr_mask, u32 ro_mask, u32 device, in setup_mmio_info() argument
134 p->ro_mask = ro_mask; in setup_mmio_info()
3164 u64 ro_mask = mmio_info->ro_mask; in intel_vgpu_mmio_reg_rw() local
3172 if (likely(!ro_mask)) in intel_vgpu_mmio_reg_rw()
3174 else if (!~ro_mask) { in intel_vgpu_mmio_reg_rw()
3180 data &= ~ro_mask; in intel_vgpu_mmio_reg_rw()
3181 data |= vgpu_vreg(vgpu, offset) & ro_mask; in intel_vgpu_mmio_reg_rw()
H A Dcmd_parser.c981 u64 ro_mask = mmio_info->ro_mask; in cmd_reg_handler() local
984 if (likely(!ro_mask)) in cmd_reg_handler()
/openbmc/linux/drivers/net/ethernet/broadcom/
H A Dbnx2.c5555 u32 ro_mask; in bnx2_test_registers() member
5671 u32 offset, rw_mask, ro_mask, save_val, val; in bnx2_test_registers() local
5679 ro_mask = reg_tbl[i].ro_mask; in bnx2_test_registers()
5690 if ((val & ro_mask) != (save_val & ro_mask)) { in bnx2_test_registers()
5701 if ((val & ro_mask) != (save_val & ro_mask)) { in bnx2_test_registers()