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Searched refs:rd32 (Results 1 – 25 of 104) sorted by relevance

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/openbmc/linux/drivers/net/ethernet/intel/igc/
H A Digc_mac.c27 ctrl = rd32(IGC_CTRL); in igc_disable_pcie_master()
32 if (!(rd32(IGC_STATUS) & in igc_disable_pcie_master()
181 ctrl = rd32(IGC_CTRL); in igc_force_mac_fc()
237 rd32(IGC_CRCERRS); in igc_clear_hw_cntrs_base()
238 rd32(IGC_MPC); in igc_clear_hw_cntrs_base()
239 rd32(IGC_SCC); in igc_clear_hw_cntrs_base()
240 rd32(IGC_ECOL); in igc_clear_hw_cntrs_base()
241 rd32(IGC_MCC); in igc_clear_hw_cntrs_base()
242 rd32(IGC_LATECOL); in igc_clear_hw_cntrs_base()
243 rd32(IGC_COLC); in igc_clear_hw_cntrs_base()
[all …]
H A Digc_i225.c49 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
65 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
82 swsm = rd32(IGC_SWSM); in igc_get_hw_semaphore_i225()
86 if (rd32(IGC_SWSM) & IGC_SWSM_SWESMBI) in igc_get_hw_semaphore_i225()
124 swfw_sync = rd32(IGC_SW_FW_SYNC); in igc_acquire_swfw_sync_i225()
170 swfw_sync = rd32(IGC_SW_FW_SYNC); in igc_release_swfw_sync_i225()
253 rd32(IGC_SRWR)) { in igc_write_nvm_srwr()
357 reg = rd32(IGC_EECD); in igc_pool_flash_update_done_i225()
383 flup = rd32(IGC_EECD) | IGC_EECD_FLUPD_I225; in igc_update_flash_i225()
464 eec = rd32(IGC_EECD); in igc_get_flash_presence_i225()
[all …]
H A Digc_tsn.c56 return !!(rd32(IGC_TQAVCTRL) & IGC_TQAVCTRL_TRANSMIT_MODE_TSN); in igc_tsn_is_tx_mode_in_tsn()
93 retxctl = rd32(IGC_RETX_CTL) & IGC_RETX_CTL_WATERMARK_MASK; in igc_tsn_restore_retx_default()
101 return (rd32(IGC_BASET_H) || rd32(IGC_BASET_L)) && in igc_tsn_is_taprio_activated_by_user()
121 tqavctrl = rd32(IGC_TQAVCTRL); in igc_tsn_disable_offload()
152 retxctl = rd32(IGC_RETX_CTL); in igc_tsn_set_retx_qbvfullthreshold()
273 tqavcc = rd32(IGC_TQAVCC(i)); in igc_tsn_enable_offload()
285 tqavcc = rd32(IGC_TQAVCC(i)); in igc_tsn_enable_offload()
297 tqavctrl = rd32(IGC_TQAVCTRL) & ~IGC_TQAVCTRL_FUTSCDDIS; in igc_tsn_enable_offload()
306 nsec = rd32(IGC_SYSTIML); in igc_tsn_enable_offload()
307 sec = rd32(IGC_SYSTIMH); in igc_tsn_enable_offload()
[all …]
H A Digc_ptp.c30 nsec = rd32(IGC_SYSTIML); in igc_ptp_read()
31 sec = rd32(IGC_SYSTIMH); in igc_ptp_read()
102 ts->tv_nsec = rd32(IGC_SYSTIML); in igc_ptp_gettimex64_i225()
103 ts->tv_sec = rd32(IGC_SYSTIMH); in igc_ptp_gettimex64_i225()
177 ctrl = rd32(IGC_CTRL); in igc_pin_perout()
178 ctrl_ext = rd32(IGC_CTRL_EXT); in igc_pin_perout()
179 tssdp = rd32(IGC_TSSDP); in igc_pin_perout()
223 ctrl = rd32(IGC_CTRL); in igc_pin_extts()
224 ctrl_ext = rd32(IGC_CTRL_EXT); in igc_pin_extts()
225 tssdp = rd32(IGC_TSSDP); in igc_pin_extts()
[all …]
H A Digc_base.c40 ctrl = rd32(IGC_CTRL); in igc_reset_hw_base()
56 rd32(IGC_ICR); in igc_reset_hw_base()
68 u32 eecd = rd32(IGC_EECD); in igc_init_nvm_params_base()
116 ctrl = rd32(IGC_CTRL); in igc_setup_copper_link_base()
168 hw->bus.func = FIELD_GET(IGC_STATUS_FUNC_MASK, rd32(IGC_STATUS)); in igc_init_phy_params_base()
342 rfctl = rd32(IGC_RFCTL); in igc_rx_fifo_flush_base()
346 if (!(rd32(IGC_MANC) & IGC_MANC_RCV_TCO_EN)) in igc_rx_fifo_flush_base()
351 rxdctl[i] = rd32(IGC_RXDCTL(i)); in igc_rx_fifo_flush_base()
360 rx_enabled |= rd32(IGC_RXDCTL(i)); in igc_rx_fifo_flush_base()
374 rlpml = rd32(IGC_RLPML); in igc_rx_fifo_flush_base()
[all …]
H A Digc_dump.c54 regs[n] = rd32(IGC_RDLEN(n)); in igc_regdump()
58 regs[n] = rd32(IGC_RDH(n)); in igc_regdump()
62 regs[n] = rd32(IGC_RDT(n)); in igc_regdump()
66 regs[n] = rd32(IGC_RXDCTL(n)); in igc_regdump()
70 regs[n] = rd32(IGC_RDBAL(n)); in igc_regdump()
74 regs[n] = rd32(IGC_RDBAH(n)); in igc_regdump()
78 regs[n] = rd32(IGC_TDBAL(n)); in igc_regdump()
82 regs[n] = rd32(IGC_TDBAH(n)); in igc_regdump()
86 regs[n] = rd32(IGC_TDLEN(n)); in igc_regdump()
90 regs[n] = rd32(IGC_TDH(n)); in igc_regdump()
[all …]
H A Digc_nvm.c23 reg = rd32(IGC_EERD); in igc_poll_eerd_eewr_done()
25 reg = rd32(IGC_EEWR); in igc_poll_eerd_eewr_done()
49 u32 eecd = rd32(IGC_EECD); in igc_acquire_nvm()
53 eecd = rd32(IGC_EECD); in igc_acquire_nvm()
59 eecd = rd32(IGC_EECD); in igc_acquire_nvm()
83 eecd = rd32(IGC_EECD); in igc_release_nvm()
122 data[i] = (rd32(IGC_EERD) >> IGC_NVM_RW_REG_DATA); in igc_read_nvm_eerd()
139 rar_high = rd32(IGC_RAH(0)); in igc_read_mac_addr()
140 rar_low = rd32(IGC_RAL(0)); in igc_read_mac_addr()
H A Digc_ethtool.c180 regs_buff[0] = rd32(IGC_CTRL); in igc_ethtool_get_regs()
181 regs_buff[1] = rd32(IGC_STATUS); in igc_ethtool_get_regs()
182 regs_buff[2] = rd32(IGC_CTRL_EXT); in igc_ethtool_get_regs()
183 regs_buff[3] = rd32(IGC_MDIC); in igc_ethtool_get_regs()
184 regs_buff[4] = rd32(IGC_CONNSW); in igc_ethtool_get_regs()
187 regs_buff[5] = rd32(IGC_EECD); in igc_ethtool_get_regs()
193 regs_buff[6] = rd32(IGC_EICS); in igc_ethtool_get_regs()
194 regs_buff[7] = rd32(IGC_EICS); in igc_ethtool_get_regs()
195 regs_buff[8] = rd32(IGC_EIMS); in igc_ethtool_get_regs()
196 regs_buff[9] = rd32(IGC_EIMC); in igc_ethtool_get_regs()
[all …]
H A Digc_diag.c45 before = rd32(reg); in reg_pattern_test()
47 val = rd32(reg); in reg_pattern_test()
67 before = rd32(reg); in reg_set_and_check()
69 val = rd32(reg); in reg_set_and_check()
95 before = rd32(IGC_STATUS); in igc_reg_test()
98 after = rd32(IGC_STATUS) & toggle; in igc_reg_test()
H A Digc_main.c158 ctrl_ext = rd32(IGC_CTRL_EXT); in igc_release_hw_control()
177 ctrl_ext = rd32(IGC_CTRL_EXT); in igc_get_hw_control()
325 txdctl = rd32(IGC_TXDCTL(idx)); in igc_disable_tx_ring_hw()
677 srrctl = rd32(IGC_SRRCTL(reg_idx)); in igc_configure_rx_ring()
803 rxcsum = rd32(IGC_RXCSUM); in igc_setup_mrqc()
840 rctl = rd32(IGC_RCTL); in igc_setup_rctl()
891 tctl = rd32(IGC_TCTL); in igc_setup_tctl()
1835 ctrl = rd32(IGC_CTRL); in igc_vlan_mode()
3062 !(rd32(IGC_STATUS) & IGC_STATUS_TXOFF) && in igc_clean_tx_irq()
3063 (rd32(IGC_TDH(tx_ring->reg_idx)) != readl(tx_ring->tail)) && in igc_clean_tx_irq()
[all …]
/openbmc/linux/drivers/net/ethernet/intel/igb/
H A De1000_mac.c58 reg = rd32(E1000_STATUS); in igb_get_bus_info_pcie()
153 bits = rd32(E1000_VLVF(regindex)) & E1000_VLVF_VLANID_MASK; in igb_find_vlvf_slot()
224 bits = rd32(E1000_VLVF(vlvf_index)); in igb_vfta_set()
560 rd32(E1000_CRCERRS); in igb_clear_hw_cntrs_base()
561 rd32(E1000_SYMERRS); in igb_clear_hw_cntrs_base()
562 rd32(E1000_MPC); in igb_clear_hw_cntrs_base()
563 rd32(E1000_SCC); in igb_clear_hw_cntrs_base()
564 rd32(E1000_ECOL); in igb_clear_hw_cntrs_base()
565 rd32(E1000_MCC); in igb_clear_hw_cntrs_base()
566 rd32(E1000_LATECOL); in igb_clear_hw_cntrs_base()
[all …]
H A De1000_82575.c96 reg = rd32(E1000_MDIC); in igb_sgmii_uses_mdio_82575()
104 reg = rd32(E1000_MDICNFG); in igb_sgmii_uses_mdio_82575()
192 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_init_phy_params_82575()
225 hw->bus.func = FIELD_GET(E1000_STATUS_FUNC_MASK, rd32(E1000_STATUS)); in igb_init_phy_params_82575()
329 u32 eecd = rd32(E1000_EECD); in igb_init_nvm_params_82575()
451 (rd32(E1000_FWSM) & E1000_FWSM_MODE_MASK) in igb_init_mac_params_82575()
500 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_set_sfp_media_type_82575()
625 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_get_invariants_82575()
849 mdic = rd32(E1000_MDIC); in igb_get_phy_id_82575()
858 mdic = rd32(E1000_MDICNFG); in igb_get_phy_id_82575()
[all …]
H A Digb_ethtool.c147 0 : rd32(E1000_STATUS); in igb_get_link_ksettings()
477 regs_buff[0] = rd32(E1000_CTRL); in igb_get_regs()
478 regs_buff[1] = rd32(E1000_STATUS); in igb_get_regs()
479 regs_buff[2] = rd32(E1000_CTRL_EXT); in igb_get_regs()
480 regs_buff[3] = rd32(E1000_MDIC); in igb_get_regs()
481 regs_buff[4] = rd32(E1000_SCTL); in igb_get_regs()
482 regs_buff[5] = rd32(E1000_CONNSW); in igb_get_regs()
483 regs_buff[6] = rd32(E1000_VET); in igb_get_regs()
484 regs_buff[7] = rd32(E1000_LEDCTL); in igb_get_regs()
485 regs_buff[8] = rd32(E1000_PBA); in igb_get_regs()
[all …]
H A Digb_ptp.c83 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82576()
84 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82576()
104 rd32(E1000_SYSTIMR); in igb_ptp_read_82580()
105 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82580()
106 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82580()
125 rd32(E1000_SYSTIMR); in igb_ptp_read_i210()
126 nsec = rd32(E1000_SYSTIML); in igb_ptp_read_i210()
127 sec = rd32(E1000_SYSTIMH); in igb_ptp_read_i210()
273 lo = rd32(E1000_SYSTIML); in igb_ptp_gettimex_82576()
275 hi = rd32(E1000_SYSTIMH); in igb_ptp_gettimex_82576()
[all …]
H A De1000_i210.c30 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
46 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
63 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
67 if (rd32(E1000_SWSM) & E1000_SWSM_SWESMBI) in igb_get_hw_semaphore_i210()
131 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_acquire_swfw_sync_i210()
170 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_release_swfw_sync_i210()
254 rd32(E1000_SRWR)) { in igb_write_nvm_srwr()
332 invm_dword = rd32(E1000_INVM_DATA_REG(i)); in igb_read_invm_word_i210()
458 invm_dword = rd32(E1000_INVM_DATA_REG(i)); in igb_read_invm_version()
635 reg = rd32(E1000_EECD); in igb_pool_flash_update_done_i210()
[all …]
H A Digb_main.c296 regs[n] = rd32(E1000_RDLEN(n)); in igb_regdump()
300 regs[n] = rd32(E1000_RDH(n)); in igb_regdump()
304 regs[n] = rd32(E1000_RDT(n)); in igb_regdump()
308 regs[n] = rd32(E1000_RXDCTL(n)); in igb_regdump()
312 regs[n] = rd32(E1000_RDBAL(n)); in igb_regdump()
316 regs[n] = rd32(E1000_RDBAH(n)); in igb_regdump()
320 regs[n] = rd32(E1000_TDBAL(n)); in igb_regdump()
324 regs[n] = rd32(E1000_TDBAH(n)); in igb_regdump()
328 regs[n] = rd32(E1000_TDLEN(n)); in igb_regdump()
332 regs[n] = rd32(E1000_TDH(n)); in igb_regdump()
[all …]
H A De1000_nvm.c53 u32 eecd = rd32(E1000_EECD); in igb_shift_out_eec_bits()
98 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
107 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
135 reg = rd32(E1000_EERD); in igb_poll_eerd_eewr_done()
137 reg = rd32(E1000_EEWR); in igb_poll_eerd_eewr_done()
160 u32 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
166 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
172 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
195 u32 eecd = rd32(E1000_EECD); in igb_standby_nvm()
220 eecd = rd32(E1000_EECD); in e1000_stop_nvm()
[all …]
/openbmc/linux/drivers/net/fjes/
H A Dfjes_ethtool.c194 regs_buff[0] = rd32(XSCT_OWNER_EPID); in fjes_get_regs()
195 regs_buff[1] = rd32(XSCT_MAX_EP); in fjes_get_regs()
198 regs_buff[4] = rd32(XSCT_DCTL); in fjes_get_regs()
201 regs_buff[8] = rd32(XSCT_CR); in fjes_get_regs()
202 regs_buff[9] = rd32(XSCT_CS); in fjes_get_regs()
203 regs_buff[10] = rd32(XSCT_SHSTSAL); in fjes_get_regs()
204 regs_buff[11] = rd32(XSCT_SHSTSAH); in fjes_get_regs()
206 regs_buff[13] = rd32(XSCT_REQBL); in fjes_get_regs()
207 regs_buff[14] = rd32(XSCT_REQBAL); in fjes_get_regs()
208 regs_buff[15] = rd32(XSCT_REQBAH); in fjes_get_regs()
[all …]
/openbmc/linux/drivers/net/ethernet/wangxun/libwx/
H A Dwx_hw.c82 return read_poll_timeout(rd32, val, (val & 0x1), 10, 100000, in wx_fmgr_cmd_op()
94 *data = rd32(wx, WX_SPI_DATA); in wx_flash_read_dword()
105 if (!(rd32(hw, WX_SPI_STATUS) & in wx_check_flash_load()
108 err = read_poll_timeout(rd32, reg, !(reg & check_bit), 20000, 2000000, in wx_check_flash_load()
136 fwsm = rd32(wx, WX_MIS_ST); in wx_mng_present()
176 ret = read_poll_timeout(rd32, sem, !(sem & mask), in wx_acquire_sw_sync()
242 status = read_poll_timeout(rd32, hicr, hicr & WX_MNG_MBOX_CTL_FWRDY, 1000, in wx_host_interface_command()
245 buf[0] = rd32(wx, WX_MNG_MBOX); in wx_host_interface_command()
413 value = rd32(wx, reg); in wx_read_ee_hostif_buffer()
449 if (!(rd32(wx, WX_SPI_STATUS) & in wx_init_eeprom_params()
[all …]
/openbmc/linux/drivers/net/ethernet/wangxun/ngbe/
H A Dngbe_mdio.c20 return (u16)rd32(wx, NGBE_PHY_CONFIG(regnum)); in ngbe_phy_read_reg_internal()
50 ret = read_poll_timeout(rd32, val, !(val & WX_MSCC_BUSY), 1000, in ngbe_phy_read_reg_mdi_c22()
57 return (u16)rd32(wx, WX_MSCC); in ngbe_phy_read_reg_mdi_c22()
79 ret = read_poll_timeout(rd32, val, !(val & WX_MSCC_BUSY), 1000, in ngbe_phy_write_reg_mdi_c22()
105 ret = read_poll_timeout(rd32, val, !(val & WX_MSCC_BUSY), 1000, in ngbe_phy_read_reg_mdi_c45()
112 return (u16)rd32(wx, WX_MSCC); in ngbe_phy_read_reg_mdi_c45()
135 ret = read_poll_timeout(rd32, val, !(val & WX_MSCC_BUSY), 1000, in ngbe_phy_write_reg_mdi_c45()
200 reg = rd32(wx, WX_MAC_TX_CFG); in ngbe_handle_link_change()
205 reg = rd32(wx, WX_MAC_RX_CFG); in ngbe_handle_link_change()
208 reg = rd32(wx, WX_MAC_WDG_TIMEOUT); in ngbe_handle_link_change()
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ptp.c163 lo = rd32(hw, I40E_PRTTSYN_EVNT_L(0)); in i40e_ptp_extts0_work()
164 hi = rd32(hw, I40E_PRTTSYN_EVNT_H(0)); in i40e_ptp_extts0_work()
232 rd32(&pf->hw, I40E_PRTTSYN_RXTIME_L(i)); in i40_ptp_reset_timing_events()
233 rd32(&pf->hw, I40E_PRTTSYN_RXTIME_H(i)); in i40_ptp_reset_timing_events()
237 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_L); in i40_ptp_reset_timing_events()
238 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_H); in i40_ptp_reset_timing_events()
290 lo = rd32(hw, I40E_PRTTSYN_TIME_L); in i40e_ptp_read()
292 hi = rd32(hw, I40E_PRTTSYN_TIME_H); in i40e_ptp_read()
641 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_1); in i40e_ptp_get_rx_events()
700 rd32(hw, I40E_PRTTSYN_RXTIME_H(i)); in i40e_ptp_rx_hang()
[all …]
H A Di40e_dcb.c24 reg = rd32(hw, I40E_PRTDCB_GENS); in i40e_get_dcbx_status()
1323 u32 reg = rd32(hw, I40E_PRTDCB_RETSC); in i40e_dcb_hw_rx_fifo_config()
1392 reg = rd32(hw, I40E_PRT_SWR_PM_THR); in i40e_dcb_hw_rx_cmd_monitor_config()
1398 reg = rd32(hw, I40E_PRTDCB_RPPMC); in i40e_dcb_hw_rx_cmd_monitor_config()
1437 reg = rd32(hw, I40E_PRTDCB_MFLCN); in i40e_dcb_hw_pfc_config()
1450 reg = rd32(hw, I40E_PRTDCB_FCCFG); in i40e_dcb_hw_pfc_config()
1461 reg = rd32(hw, I40E_PRTMAC_HSEC_CTL_RX_ENABLE_GPP); in i40e_dcb_hw_pfc_config()
1465 reg = rd32(hw, I40E_PRTMAC_HSEC_CTL_RX_ENABLE_PPP); in i40e_dcb_hw_pfc_config()
1471 reg = rd32(hw, I40E_PRTMAC_HSEC_CTL_RX_PAUSE_ENABLE); in i40e_dcb_hw_pfc_config()
1478 reg = rd32(hw, I40E_PRTMAC_HSEC_CTL_TX_PAUSE_ENABLE); in i40e_dcb_hw_pfc_config()
[all …]
H A Di40e_diag.c22 orig_val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
26 val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
36 val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
/openbmc/linux/drivers/net/ethernet/wangxun/txgbe/
H A Dtxgbe_phy.c98 val = rd32(wx, TXGBE_XPCS_IDA_DATA); in txgbe_pcs_read()
192 txcfg = rd32(wx, WX_MAC_TX_CFG); in txgbe_mac_link_up()
213 wdg = rd32(wx, WX_MAC_WDG_TIMEOUT); in txgbe_mac_link_up()
310 val = rd32(wx, WX_GPIO_DDR); in txgbe_gpio_get_direction()
391 pol = rd32(wx, WX_GPIO_POLARITY); in txgbe_toggle_trigger()
392 val = rd32(wx, WX_GPIO_EXT); in txgbe_toggle_trigger()
464 gpioirq = rd32(wx, WX_GPIO_INTSTATUS); in txgbe_irq_handler()
484 u32 reg = rd32(wx, TXGBE_CFG_PORT_ST); in txgbe_irq_handler()
577 *val = rd32(wx, reg + TXGBE_I2C_BASE); in txgbe_i2c_read()
667 ret = read_poll_timeout(rd32, val, !(val & WX_MSCC_BUSY), 1000, in txgbe_phy_read()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/core/
H A Dgpuobj.c76 .rd32 = nvkm_gpuobj_rd32_fast,
84 .rd32 = nvkm_gpuobj_heap_rd32,
139 .rd32 = nvkm_gpuobj_rd32_fast,
147 .rd32 = nvkm_gpuobj_rd32,

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