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Searched refs:qe_clrsetbits_be32 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/soc/fsl/qe/
H A Dgpio.c249 qe_clrsetbits_be32(&regs->cpdir2, mask2, in qe_pin_set_dedicated()
251 qe_clrsetbits_be32(&regs->cppar2, mask2, in qe_pin_set_dedicated()
254 qe_clrsetbits_be32(&regs->cpdir1, mask2, in qe_pin_set_dedicated()
256 qe_clrsetbits_be32(&regs->cppar1, mask2, in qe_pin_set_dedicated()
266 qe_clrsetbits_be32(&regs->cpodr, mask1, sregs->cpodr & mask1); in qe_pin_set_dedicated()
H A Ducc.c37 qe_clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, in ucc_set_qe_mux_mii_mng()
209 qe_clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, in ucc_set_qe_mux_rxtx()
542 qe_clrsetbits_be32(cmxs1cr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, in ucc_set_tdm_rxtx_clk()
652 qe_clrsetbits_be32(&qe_mux_reg->cmxsi1syr, in ucc_set_tdm_rxtx_sync()
H A Dusb.c46 qe_clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val); in qe_usb_clock_set()
/openbmc/linux/drivers/tty/serial/
H A Ducc_uart.c678 qe_clrsetbits_be32(&uccp->gumr_l, in qe_uart_init_ucc()
682 qe_clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW, in qe_uart_init_ucc()
685 qe_clrsetbits_be32(&uccp->gumr_l, in qe_uart_init_ucc()
689 qe_clrsetbits_be32(&uccp->gumr_h, in qe_uart_init_ucc()
695 qe_clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK, in qe_uart_init_ucc()
697 qe_clrsetbits_be32(&uccp->gumr_h, in qe_uart_init_ucc()
740 qe_clrsetbits_be32(&uccp->gumr_l, in qe_uart_init_ucc()
744 qe_clrsetbits_be32(&uccp->gumr_h, in qe_uart_init_ucc()
749 qe_clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK, in qe_uart_init_ucc()
/openbmc/linux/include/soc/fsl/qe/
H A Dqe.h252 #define qe_clrsetbits_be32(addr, clear, set) \ macro