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Searched refs:pll_params (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-pll.c1202 static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params, in _pll_fixed_mdiv() argument
1205 u16 mdiv = parent_rate / pll_params->cf_min; in _pll_fixed_mdiv()
1207 if (pll_params->flags & TEGRA_MDIV_NEW) in _pll_fixed_mdiv()
1208 return (!pll_params->mdiv_default ? mdiv : in _pll_fixed_mdiv()
1209 min(mdiv, pll_params->mdiv_default)); in _pll_fixed_mdiv()
1211 if (pll_params->mdiv_default) in _pll_fixed_mdiv()
1212 return pll_params->mdiv_default; in _pll_fixed_mdiv()
1214 if (parent_rate > pll_params->cf_max) in _pll_fixed_mdiv()
1267 static int _setup_dynamic_ramp(struct tegra_clk_pll_params *pll_params, in _setup_dynamic_ramp() argument
1296 val = step_a << pll_params->stepa_shift; in _setup_dynamic_ramp()
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H A Dclk.h344 unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params,
397 struct tegra_clk_pll_params *pll_params; member
406 unsigned long flags, struct tegra_clk_pll_params *pll_params,
411 unsigned long flags, struct tegra_clk_pll_params *pll_params,
417 struct tegra_clk_pll_params *pll_params,
423 struct tegra_clk_pll_params *pll_params,
429 struct tegra_clk_pll_params *pll_params,
435 struct tegra_clk_pll_params *pll_params,
441 struct tegra_clk_pll_params *pll_params,
447 struct tegra_clk_pll_params *pll_params,
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H A Dclk-tegra-periph.c941 struct tegra_clk_pll_params *pll_params) in init_pllp() argument
951 pmc_base, 0, pll_params, NULL); in init_pllp()
1024 struct tegra_clk_pll_params *pll_params) in tegra_periph_clk_init() argument
1026 init_pllp(clk_base, pmc_base, tegra_clks, pll_params); in tegra_periph_clk_init()
H A Dclk-tegra-audio.c184 clk_base, pmc_base, 0, info->pll_params, in tegra_audio_clk_init()
/openbmc/u-boot/drivers/phy/
H A Dphy-stm32-usbphyc.c46 struct pll_params { struct
64 void stm32_usbphyc_get_pll_params(u32 clk_rate, struct pll_params *pll_params) in stm32_usbphyc_get_pll_params() argument
81 pll_params->ndiv = (u8)ndiv; in stm32_usbphyc_get_pll_params()
86 pll_params->frac = (u16)frac; in stm32_usbphyc_get_pll_params()
91 struct pll_params pll_params; in stm32_usbphyc_pll_init() local
101 stm32_usbphyc_get_pll_params(clk_rate, &pll_params); in stm32_usbphyc_pll_init()
104 usbphyc_pll |= ((pll_params.ndiv << PLLNDIV_SHIFT) & PLLNDIV); in stm32_usbphyc_pll_init()
106 if (pll_params.frac) { in stm32_usbphyc_pll_init()
108 usbphyc_pll |= ((pll_params.frac << PLLFRACIN_SHIFT) in stm32_usbphyc_pll_init()
115 clk_rate, pll_params.ndiv, pll_params.frac); in stm32_usbphyc_pll_init()
/openbmc/linux/drivers/phy/st/
H A Dphy-stm32-usbphyc.c131 struct pll_params { struct
205 struct pll_params *pll_params) in stm32_usbphyc_get_pll_params() argument
223 pll_params->ndiv = (u8)ndiv; in stm32_usbphyc_get_pll_params()
228 pll_params->frac = (u16)frac; in stm32_usbphyc_get_pll_params()
233 struct pll_params pll_params; in stm32_usbphyc_pll_init() local
245 stm32_usbphyc_get_pll_params(clk_rate, &pll_params); in stm32_usbphyc_pll_init()
246 ndiv = FIELD_PREP(PLLNDIV, pll_params.ndiv); in stm32_usbphyc_pll_init()
247 frac = FIELD_PREP(PLLFRACIN, pll_params.frac); in stm32_usbphyc_pll_init()
251 if (pll_params.frac) in stm32_usbphyc_pll_init()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.c2558 struct skl_wrpll_params *pll_params) in icl_calc_dp_combo_pll() argument
2570 *pll_params = params[i].wrpll; in icl_calc_dp_combo_pll()
2580 struct skl_wrpll_params *pll_params) in icl_calc_tbt_pll() argument
2591 *pll_params = tgl_tbt_pll_19_2MHz_values; in icl_calc_tbt_pll()
2594 *pll_params = tgl_tbt_pll_24MHz_values; in icl_calc_tbt_pll()
2604 *pll_params = icl_tbt_pll_19_2MHz_values; in icl_calc_tbt_pll()
2607 *pll_params = icl_tbt_pll_24MHz_values; in icl_calc_tbt_pll()
2748 const struct skl_wrpll_params *pll_params, in icl_calc_dpll_state() argument
2751 u32 dco_fraction = pll_params->dco_fraction; in icl_calc_dpll_state()
2757 pll_params->dco_integer; in icl_calc_dpll_state()
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