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Searched refs:pll3_cfg (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dclock_sun6i.c159 clrbits_le32(&ccm->pll3_cfg, CCM_PLL3_CTRL_EN); in clock_set_pll3()
166 &ccm->pll3_cfg); in clock_set_pll3()
178 &ccm->pll3_cfg); in clock_set_pll3_factors()
180 while (!(readl(&ccm->pll3_cfg) & CCM_PLL3_CTRL_LOCK)) in clock_set_pll3_factors()
303 uint32_t rval = readl(&ccm->pll3_cfg); in clock_get_pll3()
H A Dclock_sun4i.c188 clrbits_le32(&ccm->pll3_cfg, CCM_PLL3_CTRL_EN); in clock_set_pll3()
194 CCM_PLL3_CTRL_M(clk / 3000000), &ccm->pll3_cfg); in clock_set_pll3()
201 uint32_t rval = readl(&ccm->pll3_cfg); in clock_get_pll3()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun8i_a83t.h21 u32 pll3_cfg; /* 0x10 pll3 video0 control */ member
H A Dclock_sun4i.h18 u32 pll3_cfg; /* 0x10 pll3 control */ member
H A Dclock_sun50i_h6.h23 u32 pll3_cfg; /* 0x040 pll3 (video0) control */ member
H A Dclock_sun6i.h18 u32 pll3_cfg; /* 0x10 pll3 control */ member